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Thomas Gleixner1a59d1b82019-05-27 08:55:05 +02001/* SPDX-License-Identifier: GPL-2.0-or-later */
Josh Cartwright45aa2c22012-11-13 17:26:48 -06002/*
Soren Brinkmann30e1e282013-05-13 10:46:38 -07003 * Copyright (C) 2013 Xilinx Inc.
Josh Cartwright45aa2c22012-11-13 17:26:48 -06004 * Copyright (C) 2012 National Instruments
Josh Cartwright45aa2c22012-11-13 17:26:48 -06005 */
6
7#ifndef __LINUX_CLK_ZYNQ_H_
8#define __LINUX_CLK_ZYNQ_H_
9
Soren Brinkmann30e1e282013-05-13 10:46:38 -070010#include <linux/spinlock.h>
Josh Cartwright45aa2c22012-11-13 17:26:48 -060011
Michal Simekb0504e32013-11-18 16:48:19 +010012void zynq_clock_init(void);
Soren Brinkmann30e1e282013-05-13 10:46:38 -070013
14struct clk *clk_register_zynq_pll(const char *name, const char *parent,
15 void __iomem *pll_ctrl, void __iomem *pll_status, u8 lock_index,
16 spinlock_t *lock);
Josh Cartwright45aa2c22012-11-13 17:26:48 -060017#endif