blob: 07224c019892006248a98fe58343d2a0f6c4fe36 [file] [log] [blame]
Steffen Trumtrara39a4932014-04-15 17:06:44 -05001/*
Paul Gortmaker02163192016-06-13 14:03:35 -04002 * Socfpga Reset Controller Driver
3 *
Steffen Trumtrara39a4932014-04-15 17:06:44 -05004 * Copyright 2014 Steffen Trumtrar <s.trumtrar@pengutronix.de>
5 *
6 * based on
7 * Allwinner SoCs Reset Controller driver
8 *
9 * Copyright 2013 Maxime Ripard
10 *
11 * Maxime Ripard <maxime.ripard@free-electrons.com>
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version.
17 */
18
19#include <linux/err.h>
20#include <linux/io.h>
Paul Gortmaker02163192016-06-13 14:03:35 -040021#include <linux/init.h>
Steffen Trumtrara39a4932014-04-15 17:06:44 -050022#include <linux/of.h>
23#include <linux/platform_device.h>
24#include <linux/reset-controller.h>
25#include <linux/spinlock.h>
26#include <linux/types.h>
27
Rojhalat Ibrahimd518d9c2017-02-15 19:10:58 +010028#define BANK_INCREMENT 4
29#define NR_BANKS 8
Steffen Trumtrara39a4932014-04-15 17:06:44 -050030
31struct socfpga_reset_data {
32 spinlock_t lock;
33 void __iomem *membase;
34 struct reset_controller_dev rcdev;
35};
36
37static int socfpga_reset_assert(struct reset_controller_dev *rcdev,
38 unsigned long id)
39{
40 struct socfpga_reset_data *data = container_of(rcdev,
41 struct socfpga_reset_data,
42 rcdev);
43 int bank = id / BITS_PER_LONG;
44 int offset = id % BITS_PER_LONG;
45 unsigned long flags;
46 u32 reg;
47
48 spin_lock_irqsave(&data->lock, flags);
49
Rojhalat Ibrahimd518d9c2017-02-15 19:10:58 +010050 reg = readl(data->membase + (bank * BANK_INCREMENT));
51 writel(reg | BIT(offset), data->membase + (bank * BANK_INCREMENT));
Steffen Trumtrara39a4932014-04-15 17:06:44 -050052 spin_unlock_irqrestore(&data->lock, flags);
53
54 return 0;
55}
56
57static int socfpga_reset_deassert(struct reset_controller_dev *rcdev,
58 unsigned long id)
59{
60 struct socfpga_reset_data *data = container_of(rcdev,
61 struct socfpga_reset_data,
62 rcdev);
63
64 int bank = id / BITS_PER_LONG;
65 int offset = id % BITS_PER_LONG;
66 unsigned long flags;
67 u32 reg;
68
69 spin_lock_irqsave(&data->lock, flags);
70
Rojhalat Ibrahimd518d9c2017-02-15 19:10:58 +010071 reg = readl(data->membase + (bank * BANK_INCREMENT));
72 writel(reg & ~BIT(offset), data->membase + (bank * BANK_INCREMENT));
Steffen Trumtrara39a4932014-04-15 17:06:44 -050073
74 spin_unlock_irqrestore(&data->lock, flags);
75
76 return 0;
77}
78
Dinh Nguyenf2008902014-11-03 16:33:05 -060079static int socfpga_reset_status(struct reset_controller_dev *rcdev,
80 unsigned long id)
81{
82 struct socfpga_reset_data *data = container_of(rcdev,
83 struct socfpga_reset_data, rcdev);
84 int bank = id / BITS_PER_LONG;
85 int offset = id % BITS_PER_LONG;
86 u32 reg;
87
Rojhalat Ibrahimd518d9c2017-02-15 19:10:58 +010088 reg = readl(data->membase + (bank * BANK_INCREMENT));
Dinh Nguyenf2008902014-11-03 16:33:05 -060089
90 return !(reg & BIT(offset));
91}
92
Philipp Zabel387eb3f2016-01-17 15:13:41 +010093static const struct reset_control_ops socfpga_reset_ops = {
Steffen Trumtrara39a4932014-04-15 17:06:44 -050094 .assert = socfpga_reset_assert,
95 .deassert = socfpga_reset_deassert,
Dinh Nguyenf2008902014-11-03 16:33:05 -060096 .status = socfpga_reset_status,
Steffen Trumtrara39a4932014-04-15 17:06:44 -050097};
98
99static int socfpga_reset_probe(struct platform_device *pdev)
100{
101 struct socfpga_reset_data *data;
102 struct resource *res;
Dinh Nguyen27e44642015-07-31 16:03:10 -0500103 struct device *dev = &pdev->dev;
104 struct device_node *np = dev->of_node;
Philipp Zabel6b37d3e2016-07-04 19:47:56 +0200105 u32 modrst_offset;
Steffen Trumtrara39a4932014-04-15 17:06:44 -0500106
107 /*
108 * The binding was mainlined without the required property.
109 * Do not continue, when we encounter an old DT.
110 */
111 if (!of_find_property(pdev->dev.of_node, "#reset-cells", NULL)) {
112 dev_err(&pdev->dev, "%s missing #reset-cells property\n",
113 pdev->dev.of_node->full_name);
114 return -EINVAL;
115 }
116
117 data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
118 if (!data)
119 return -ENOMEM;
120
121 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
122 data->membase = devm_ioremap_resource(&pdev->dev, res);
123 if (IS_ERR(data->membase))
124 return PTR_ERR(data->membase);
125
Philipp Zabel6b37d3e2016-07-04 19:47:56 +0200126 if (of_property_read_u32(np, "altr,modrst-offset", &modrst_offset)) {
Dinh Nguyen27e44642015-07-31 16:03:10 -0500127 dev_warn(dev, "missing altr,modrst-offset property, assuming 0x10!\n");
Philipp Zabel6b37d3e2016-07-04 19:47:56 +0200128 modrst_offset = 0x10;
Dinh Nguyen27e44642015-07-31 16:03:10 -0500129 }
Philipp Zabel6b37d3e2016-07-04 19:47:56 +0200130 data->membase += modrst_offset;
Dinh Nguyen27e44642015-07-31 16:03:10 -0500131
Steffen Trumtrara39a4932014-04-15 17:06:44 -0500132 spin_lock_init(&data->lock);
133
134 data->rcdev.owner = THIS_MODULE;
135 data->rcdev.nr_resets = NR_BANKS * BITS_PER_LONG;
136 data->rcdev.ops = &socfpga_reset_ops;
137 data->rcdev.of_node = pdev->dev.of_node;
Steffen Trumtrara39a4932014-04-15 17:06:44 -0500138
Masahiro Yamadadc22e082016-05-01 19:37:02 +0900139 return devm_reset_controller_register(dev, &data->rcdev);
Steffen Trumtrara39a4932014-04-15 17:06:44 -0500140}
141
142static const struct of_device_id socfpga_reset_dt_ids[] = {
143 { .compatible = "altr,rst-mgr", },
144 { /* sentinel */ },
145};
146
147static struct platform_driver socfpga_reset_driver = {
148 .probe = socfpga_reset_probe,
Steffen Trumtrara39a4932014-04-15 17:06:44 -0500149 .driver = {
150 .name = "socfpga-reset",
Steffen Trumtrara39a4932014-04-15 17:06:44 -0500151 .of_match_table = socfpga_reset_dt_ids,
152 },
153};
Paul Gortmaker02163192016-06-13 14:03:35 -0400154builtin_platform_driver(socfpga_reset_driver);