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review.shift-gmbh.com / SHIFTPHONES / kernel / common / 98817a84ff1c755c347ac633ff017a623a631fad / . / arch / arm / boot / dts / at91sam9x5_isi.dtsi
blob: 4ce98f05d7db4753920515605bf6f0b979d3be26 [file] [log] [blame]
Thomas Gleixnerf50a7f32019-05-28 09:57:18 -0700[diff] [blame]1// SPDX-License-Identifier: GPL-2.0-only
Boris BREZILLONa80d3ec2014-05-12 18:23:35 +0200[diff] [blame]2/*
3 * at91sam9x5_isi.dtsi - Device Tree Include file for AT91SAM9x5 SoC with an
4 * Image Sensor Interface.
5 *
6 * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
Boris BREZILLONa80d3ec2014-05-12 18:23:35 +0200[diff] [blame]7 */
8
9#include <dt-bindings/pinctrl/at91.h>
10#include <dt-bindings/interrupt-controller/irq.h>
11
12/ {
13 ahb {
14 apb {
Josh Wu7f9acb12015-02-12 16:06:23 +0800[diff] [blame]15 pinctrl@fffff400 {
16 isi {
17 pinctrl_isi_data_0_7: isi-0-data-0-7 {
18 atmel,pins =
19 <AT91_PIOC 0 AT91_PERIPH_B AT91_PINCTRL_NONE /* ISI_D0, conflicts with LCDDAT0 */
20 AT91_PIOC 1 AT91_PERIPH_B AT91_PINCTRL_NONE /* ISI_D1, conflicts with LCDDAT1 */
21 AT91_PIOC 2 AT91_PERIPH_B AT91_PINCTRL_NONE /* ISI_D2, conflicts with LCDDAT2 */
22 AT91_PIOC 3 AT91_PERIPH_B AT91_PINCTRL_NONE /* ISI_D3, conflicts with LCDDAT3 */
23 AT91_PIOC 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* ISI_D4, conflicts with LCDDAT4 */
24 AT91_PIOC 5 AT91_PERIPH_B AT91_PINCTRL_NONE /* ISI_D5, conflicts with LCDDAT5 */
25 AT91_PIOC 6 AT91_PERIPH_B AT91_PINCTRL_NONE /* ISI_D6, conflicts with LCDDAT6 */
26 AT91_PIOC 7 AT91_PERIPH_B AT91_PINCTRL_NONE /* ISI_D7, conflicts with LCDDAT7 */
27 AT91_PIOC 12 AT91_PERIPH_B AT91_PINCTRL_NONE /* ISI_PCK, conflicts with LCDDAT12 */
28 AT91_PIOC 14 AT91_PERIPH_B AT91_PINCTRL_NONE /* ISI_HSYNC, conflicts with LCDDAT14 */
29 AT91_PIOC 13 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* ISI_VSYNC, conflicts with LCDDAT13 */
30 };
31
32 pinctrl_isi_data_8_9: isi-0-data-8-9 {
33 atmel,pins =
34 <AT91_PIOC 8 AT91_PERIPH_B AT91_PINCTRL_NONE /* ISI_D8, conflicts with LCDDAT8 */
35 AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* ISI_D9, conflicts with LCDDAT9 */
36 };
37
38 pinctrl_isi_data_10_11: isi-0-data-10-11 {
39 atmel,pins =
40 <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* ISI_D10, conflicts with LCDDAT10 */
41 AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* ISI_D11, conflicts with LCDDAT11 */
42 };
43 };
44 };
45
Josh Wu7f9acb12015-02-12 16:06:23 +0800[diff] [blame]46 isi: isi@f8048000 {
47 compatible = "atmel,at91sam9g45-isi";
48 reg = <0xf8048000 0x4000>;
49 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 5>;
50 pinctrl-names = "default";
51 pinctrl-0 = <&pinctrl_isi_data_0_7>;
Alexandre Belloni6cf8f822018-07-16 11:24:17 +0200[diff] [blame]52 clocks = <&pmc PMC_TYPE_PERIPHERAL 25>;
Josh Wu7f9acb12015-02-12 16:06:23 +0800[diff] [blame]53 clock-names = "isi_clk";
54 status = "disabled";
55 port {
56 #address-cells = <1>;
57 #size-cells = <0>;
58 };
59 };
Boris BREZILLONa80d3ec2014-05-12 18:23:35 +0200[diff] [blame]60 };
61 };
62};