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Thomas Gleixnerd2912cb2019-06-04 10:11:33 +02001// SPDX-License-Identifier: GPL-2.0-only
Alessandro Zummo1d98af82006-03-27 01:16:47 -08002/*
3 * ST M48T86 / Dallas DS12887 RTC driver
4 * Copyright (c) 2006 Tower Technologies
5 *
6 * Author: Alessandro Zummo <a.zummo@towertech.it>
7 *
Alessandro Zummo1d98af82006-03-27 01:16:47 -08008 * This drivers only supports the clock running in BCD and 24H mode.
9 * If it will be ever adapted to binary and 12H mode, care must be taken
10 * to not introduce bugs.
11 */
12
13#include <linux/module.h>
14#include <linux/rtc.h>
15#include <linux/platform_device.h>
Alessandro Zummo1d98af82006-03-27 01:16:47 -080016#include <linux/bcd.h>
H Hartley Sweeten8057c862017-02-10 11:11:56 -070017#include <linux/io.h>
Alessandro Zummo1d98af82006-03-27 01:16:47 -080018
H Hartley Sweeten68b54f42017-02-10 11:11:55 -070019#define M48T86_SEC 0x00
20#define M48T86_SECALRM 0x01
21#define M48T86_MIN 0x02
22#define M48T86_MINALRM 0x03
23#define M48T86_HOUR 0x04
24#define M48T86_HOURALRM 0x05
25#define M48T86_DOW 0x06 /* 1 = sunday */
26#define M48T86_DOM 0x07
27#define M48T86_MONTH 0x08 /* 1 - 12 */
28#define M48T86_YEAR 0x09 /* 0 - 99 */
29#define M48T86_A 0x0a
30#define M48T86_B 0x0b
31#define M48T86_B_SET BIT(7)
32#define M48T86_B_DM BIT(2)
33#define M48T86_B_H24 BIT(1)
34#define M48T86_C 0x0c
35#define M48T86_D 0x0d
36#define M48T86_D_VRT BIT(7)
H Hartley Sweetenb180cf82017-02-10 11:11:57 -070037#define M48T86_NVRAM(x) (0x0e + (x))
38#define M48T86_NVRAM_LEN 114
Alessandro Zummo1d98af82006-03-27 01:16:47 -080039
H Hartley Sweeten8057c862017-02-10 11:11:56 -070040struct m48t86_rtc_info {
41 void __iomem *index_reg;
42 void __iomem *data_reg;
43 struct rtc_device *rtc;
H Hartley Sweeten8057c862017-02-10 11:11:56 -070044};
45
46static unsigned char m48t86_readb(struct device *dev, unsigned long addr)
47{
48 struct m48t86_rtc_info *info = dev_get_drvdata(dev);
49 unsigned char value;
50
H Hartley Sweeten0500ce52017-02-15 09:35:27 -070051 writeb(addr, info->index_reg);
52 value = readb(info->data_reg);
53
H Hartley Sweeten8057c862017-02-10 11:11:56 -070054 return value;
55}
56
57static void m48t86_writeb(struct device *dev,
58 unsigned char value, unsigned long addr)
59{
60 struct m48t86_rtc_info *info = dev_get_drvdata(dev);
61
H Hartley Sweeten0500ce52017-02-15 09:35:27 -070062 writeb(addr, info->index_reg);
63 writeb(value, info->data_reg);
H Hartley Sweeten8057c862017-02-10 11:11:56 -070064}
65
Alessandro Zummo1d98af82006-03-27 01:16:47 -080066static int m48t86_rtc_read_time(struct device *dev, struct rtc_time *tm)
67{
68 unsigned char reg;
Alessandro Zummo1d98af82006-03-27 01:16:47 -080069
H Hartley Sweeten8057c862017-02-10 11:11:56 -070070 reg = m48t86_readb(dev, M48T86_B);
Alessandro Zummo1d98af82006-03-27 01:16:47 -080071
H Hartley Sweeten68b54f42017-02-10 11:11:55 -070072 if (reg & M48T86_B_DM) {
Alessandro Zummo1d98af82006-03-27 01:16:47 -080073 /* data (binary) mode */
H Hartley Sweeten8057c862017-02-10 11:11:56 -070074 tm->tm_sec = m48t86_readb(dev, M48T86_SEC);
75 tm->tm_min = m48t86_readb(dev, M48T86_MIN);
76 tm->tm_hour = m48t86_readb(dev, M48T86_HOUR) & 0x3f;
77 tm->tm_mday = m48t86_readb(dev, M48T86_DOM);
Alessandro Zummo1d98af82006-03-27 01:16:47 -080078 /* tm_mon is 0-11 */
H Hartley Sweeten8057c862017-02-10 11:11:56 -070079 tm->tm_mon = m48t86_readb(dev, M48T86_MONTH) - 1;
80 tm->tm_year = m48t86_readb(dev, M48T86_YEAR) + 100;
81 tm->tm_wday = m48t86_readb(dev, M48T86_DOW);
Alessandro Zummo1d98af82006-03-27 01:16:47 -080082 } else {
83 /* bcd mode */
H Hartley Sweeten8057c862017-02-10 11:11:56 -070084 tm->tm_sec = bcd2bin(m48t86_readb(dev, M48T86_SEC));
85 tm->tm_min = bcd2bin(m48t86_readb(dev, M48T86_MIN));
86 tm->tm_hour = bcd2bin(m48t86_readb(dev, M48T86_HOUR) &
87 0x3f);
88 tm->tm_mday = bcd2bin(m48t86_readb(dev, M48T86_DOM));
Alessandro Zummo1d98af82006-03-27 01:16:47 -080089 /* tm_mon is 0-11 */
H Hartley Sweeten8057c862017-02-10 11:11:56 -070090 tm->tm_mon = bcd2bin(m48t86_readb(dev, M48T86_MONTH)) - 1;
91 tm->tm_year = bcd2bin(m48t86_readb(dev, M48T86_YEAR)) + 100;
92 tm->tm_wday = bcd2bin(m48t86_readb(dev, M48T86_DOW));
Alessandro Zummo1d98af82006-03-27 01:16:47 -080093 }
94
95 /* correct the hour if the clock is in 12h mode */
H Hartley Sweeten68b54f42017-02-10 11:11:55 -070096 if (!(reg & M48T86_B_H24))
H Hartley Sweeten8057c862017-02-10 11:11:56 -070097 if (m48t86_readb(dev, M48T86_HOUR) & 0x80)
Alessandro Zummo1d98af82006-03-27 01:16:47 -080098 tm->tm_hour += 12;
99
Alexandre Belloni22652ba2018-02-19 16:23:56 +0100100 return 0;
Alessandro Zummo1d98af82006-03-27 01:16:47 -0800101}
102
103static int m48t86_rtc_set_time(struct device *dev, struct rtc_time *tm)
104{
105 unsigned char reg;
Alessandro Zummo1d98af82006-03-27 01:16:47 -0800106
H Hartley Sweeten8057c862017-02-10 11:11:56 -0700107 reg = m48t86_readb(dev, M48T86_B);
Alessandro Zummo1d98af82006-03-27 01:16:47 -0800108
109 /* update flag and 24h mode */
H Hartley Sweeten68b54f42017-02-10 11:11:55 -0700110 reg |= M48T86_B_SET | M48T86_B_H24;
H Hartley Sweeten8057c862017-02-10 11:11:56 -0700111 m48t86_writeb(dev, reg, M48T86_B);
Alessandro Zummo1d98af82006-03-27 01:16:47 -0800112
H Hartley Sweeten68b54f42017-02-10 11:11:55 -0700113 if (reg & M48T86_B_DM) {
Alessandro Zummo1d98af82006-03-27 01:16:47 -0800114 /* data (binary) mode */
H Hartley Sweeten8057c862017-02-10 11:11:56 -0700115 m48t86_writeb(dev, tm->tm_sec, M48T86_SEC);
116 m48t86_writeb(dev, tm->tm_min, M48T86_MIN);
117 m48t86_writeb(dev, tm->tm_hour, M48T86_HOUR);
118 m48t86_writeb(dev, tm->tm_mday, M48T86_DOM);
119 m48t86_writeb(dev, tm->tm_mon + 1, M48T86_MONTH);
120 m48t86_writeb(dev, tm->tm_year % 100, M48T86_YEAR);
121 m48t86_writeb(dev, tm->tm_wday, M48T86_DOW);
Alessandro Zummo1d98af82006-03-27 01:16:47 -0800122 } else {
123 /* bcd mode */
H Hartley Sweeten8057c862017-02-10 11:11:56 -0700124 m48t86_writeb(dev, bin2bcd(tm->tm_sec), M48T86_SEC);
125 m48t86_writeb(dev, bin2bcd(tm->tm_min), M48T86_MIN);
126 m48t86_writeb(dev, bin2bcd(tm->tm_hour), M48T86_HOUR);
127 m48t86_writeb(dev, bin2bcd(tm->tm_mday), M48T86_DOM);
128 m48t86_writeb(dev, bin2bcd(tm->tm_mon + 1), M48T86_MONTH);
129 m48t86_writeb(dev, bin2bcd(tm->tm_year % 100), M48T86_YEAR);
130 m48t86_writeb(dev, bin2bcd(tm->tm_wday), M48T86_DOW);
Alessandro Zummo1d98af82006-03-27 01:16:47 -0800131 }
132
133 /* update ended */
H Hartley Sweeten68b54f42017-02-10 11:11:55 -0700134 reg &= ~M48T86_B_SET;
H Hartley Sweeten8057c862017-02-10 11:11:56 -0700135 m48t86_writeb(dev, reg, M48T86_B);
Alessandro Zummo1d98af82006-03-27 01:16:47 -0800136
137 return 0;
138}
139
140static int m48t86_rtc_proc(struct device *dev, struct seq_file *seq)
141{
142 unsigned char reg;
Alessandro Zummo1d98af82006-03-27 01:16:47 -0800143
H Hartley Sweeten8057c862017-02-10 11:11:56 -0700144 reg = m48t86_readb(dev, M48T86_B);
Alessandro Zummo1d98af82006-03-27 01:16:47 -0800145
Alessandro Zummo1d98af82006-03-27 01:16:47 -0800146 seq_printf(seq, "mode\t\t: %s\n",
H Hartley Sweeten68b54f42017-02-10 11:11:55 -0700147 (reg & M48T86_B_DM) ? "binary" : "bcd");
Alessandro Zummo1d98af82006-03-27 01:16:47 -0800148
H Hartley Sweeten8057c862017-02-10 11:11:56 -0700149 reg = m48t86_readb(dev, M48T86_D);
Alessandro Zummo1d98af82006-03-27 01:16:47 -0800150
151 seq_printf(seq, "battery\t\t: %s\n",
H Hartley Sweeten68b54f42017-02-10 11:11:55 -0700152 (reg & M48T86_D_VRT) ? "ok" : "exhausted");
Alessandro Zummo1d98af82006-03-27 01:16:47 -0800153
154 return 0;
155}
156
David Brownellff8371a2006-09-30 23:28:17 -0700157static const struct rtc_class_ops m48t86_rtc_ops = {
Alessandro Zummo1d98af82006-03-27 01:16:47 -0800158 .read_time = m48t86_rtc_read_time,
159 .set_time = m48t86_rtc_set_time,
160 .proc = m48t86_rtc_proc,
161};
162
Alexandre Bellonif8033aa2017-10-13 00:04:21 +0200163static int m48t86_nvram_read(void *priv, unsigned int off, void *buf,
164 size_t count)
H Hartley Sweetenb180cf82017-02-10 11:11:57 -0700165{
Alexandre Bellonif8033aa2017-10-13 00:04:21 +0200166 struct device *dev = priv;
H Hartley Sweetenb180cf82017-02-10 11:11:57 -0700167 unsigned int i;
168
169 for (i = 0; i < count; i++)
Alexandre Bellonif8033aa2017-10-13 00:04:21 +0200170 ((u8 *)buf)[i] = m48t86_readb(dev, M48T86_NVRAM(off + i));
H Hartley Sweetenb180cf82017-02-10 11:11:57 -0700171
Alexandre Bellonif8033aa2017-10-13 00:04:21 +0200172 return 0;
H Hartley Sweetenb180cf82017-02-10 11:11:57 -0700173}
174
Alexandre Bellonif8033aa2017-10-13 00:04:21 +0200175static int m48t86_nvram_write(void *priv, unsigned int off, void *buf,
176 size_t count)
H Hartley Sweetenb180cf82017-02-10 11:11:57 -0700177{
Alexandre Bellonif8033aa2017-10-13 00:04:21 +0200178 struct device *dev = priv;
H Hartley Sweetenb180cf82017-02-10 11:11:57 -0700179 unsigned int i;
180
181 for (i = 0; i < count; i++)
Alexandre Bellonif8033aa2017-10-13 00:04:21 +0200182 m48t86_writeb(dev, ((u8 *)buf)[i], M48T86_NVRAM(off + i));
H Hartley Sweetenb180cf82017-02-10 11:11:57 -0700183
Alexandre Bellonif8033aa2017-10-13 00:04:21 +0200184 return 0;
H Hartley Sweetenb180cf82017-02-10 11:11:57 -0700185}
186
H Hartley Sweeten3ea07122017-02-15 09:35:23 -0700187/*
188 * The RTC is an optional feature at purchase time on some Technologic Systems
189 * boards. Verify that it actually exists by checking if the last two bytes
190 * of the NVRAM can be changed.
191 *
192 * This is based on the method used in their rtc7800.c example.
193 */
194static bool m48t86_verify_chip(struct platform_device *pdev)
195{
196 unsigned int offset0 = M48T86_NVRAM(M48T86_NVRAM_LEN - 2);
197 unsigned int offset1 = M48T86_NVRAM(M48T86_NVRAM_LEN - 1);
198 unsigned char tmp0, tmp1;
199
200 tmp0 = m48t86_readb(&pdev->dev, offset0);
201 tmp1 = m48t86_readb(&pdev->dev, offset1);
202
203 m48t86_writeb(&pdev->dev, 0x00, offset0);
204 m48t86_writeb(&pdev->dev, 0x55, offset1);
205 if (m48t86_readb(&pdev->dev, offset1) == 0x55) {
206 m48t86_writeb(&pdev->dev, 0xaa, offset1);
207 if (m48t86_readb(&pdev->dev, offset1) == 0xaa &&
208 m48t86_readb(&pdev->dev, offset0) == 0x00) {
209 m48t86_writeb(&pdev->dev, tmp0, offset0);
210 m48t86_writeb(&pdev->dev, tmp1, offset1);
211
212 return true;
213 }
214 }
215 return false;
216}
217
H Hartley Sweeten8057c862017-02-10 11:11:56 -0700218static int m48t86_rtc_probe(struct platform_device *pdev)
Alessandro Zummo1d98af82006-03-27 01:16:47 -0800219{
H Hartley Sweeten8057c862017-02-10 11:11:56 -0700220 struct m48t86_rtc_info *info;
Alessandro Zummo1d98af82006-03-27 01:16:47 -0800221 unsigned char reg;
Alexandre Belloni5508c722017-10-13 00:04:20 +0200222 int err;
Alexandre Bellonie3f51c02018-02-12 23:47:27 +0100223 struct nvmem_config m48t86_nvmem_cfg = {
224 .name = "m48t86_nvram",
225 .word_size = 1,
226 .stride = 1,
227 .size = M48T86_NVRAM_LEN,
228 .reg_read = m48t86_nvram_read,
229 .reg_write = m48t86_nvram_write,
230 .priv = &pdev->dev,
231 };
Jingoo Hand5b6bb02013-04-29 16:19:42 -0700232
H Hartley Sweeten8057c862017-02-10 11:11:56 -0700233 info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL);
234 if (!info)
235 return -ENOMEM;
Alessandro Zummo1d98af82006-03-27 01:16:47 -0800236
Markus Elfring89576be2019-09-21 11:49:01 +0200237 info->index_reg = devm_platform_ioremap_resource(pdev, 0);
H Hartley Sweeten0500ce52017-02-15 09:35:27 -0700238 if (IS_ERR(info->index_reg))
239 return PTR_ERR(info->index_reg);
Alessandro Zummo1d98af82006-03-27 01:16:47 -0800240
Markus Elfring89576be2019-09-21 11:49:01 +0200241 info->data_reg = devm_platform_ioremap_resource(pdev, 1);
H Hartley Sweeten0500ce52017-02-15 09:35:27 -0700242 if (IS_ERR(info->data_reg))
243 return PTR_ERR(info->data_reg);
H Hartley Sweeten8057c862017-02-10 11:11:56 -0700244
245 dev_set_drvdata(&pdev->dev, info);
246
H Hartley Sweeten3ea07122017-02-15 09:35:23 -0700247 if (!m48t86_verify_chip(pdev)) {
248 dev_info(&pdev->dev, "RTC not present\n");
249 return -ENODEV;
250 }
251
Alexandre Belloni5508c722017-10-13 00:04:20 +0200252 info->rtc = devm_rtc_allocate_device(&pdev->dev);
H Hartley Sweeten8057c862017-02-10 11:11:56 -0700253 if (IS_ERR(info->rtc))
254 return PTR_ERR(info->rtc);
Alessandro Zummo1d98af82006-03-27 01:16:47 -0800255
Alexandre Belloni5508c722017-10-13 00:04:20 +0200256 info->rtc->ops = &m48t86_rtc_ops;
Alexandre Bellonif8033aa2017-10-13 00:04:21 +0200257 info->rtc->nvram_old_abi = true;
258
Alexandre Belloni5508c722017-10-13 00:04:20 +0200259 err = rtc_register_device(info->rtc);
260 if (err)
261 return err;
262
Alexandre Belloni3c1bb612018-02-12 23:47:26 +0100263 rtc_nvmem_register(info->rtc, &m48t86_nvmem_cfg);
264
Alessandro Zummo1d98af82006-03-27 01:16:47 -0800265 /* read battery status */
H Hartley Sweeten8057c862017-02-10 11:11:56 -0700266 reg = m48t86_readb(&pdev->dev, M48T86_D);
267 dev_info(&pdev->dev, "battery %s\n",
H Hartley Sweeten68b54f42017-02-10 11:11:55 -0700268 (reg & M48T86_D_VRT) ? "ok" : "exhausted");
Alessandro Zummo1d98af82006-03-27 01:16:47 -0800269
270 return 0;
271}
272
Alessandro Zummo1d98af82006-03-27 01:16:47 -0800273static struct platform_driver m48t86_rtc_platform_driver = {
274 .driver = {
275 .name = "rtc-m48t86",
Alessandro Zummo1d98af82006-03-27 01:16:47 -0800276 },
277 .probe = m48t86_rtc_probe,
Alessandro Zummo1d98af82006-03-27 01:16:47 -0800278};
279
Axel Lin0c4eae62012-01-10 15:10:48 -0800280module_platform_driver(m48t86_rtc_platform_driver);
Alessandro Zummo1d98af82006-03-27 01:16:47 -0800281
282MODULE_AUTHOR("Alessandro Zummo <a.zummo@towertech.it>");
283MODULE_DESCRIPTION("M48T86 RTC driver");
284MODULE_LICENSE("GPL");
Kay Sieversad28a072008-04-10 21:29:25 -0700285MODULE_ALIAS("platform:rtc-m48t86");