blob: 7a2419186ff44b25cb65e422d3e9ffcaa4f17254 [file] [log] [blame]
Kyungmin Parkcd5f6342005-07-11 11:41:53 +01001/*
2 * linux/drivers/mtd/onenand/onenand_base.c
3 *
4 * Copyright (C) 2005 Samsung Electronics
5 * Kyungmin Park <kyungmin.park@samsung.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <linux/kernel.h>
13#include <linux/module.h>
14#include <linux/init.h>
Andrew Morton015953d2005-11-08 21:34:28 -080015#include <linux/sched.h>
16#include <linux/jiffies.h>
Kyungmin Parkcd5f6342005-07-11 11:41:53 +010017#include <linux/mtd/mtd.h>
18#include <linux/mtd/onenand.h>
19#include <linux/mtd/partitions.h>
20
21#include <asm/io.h>
22
23/**
24 * onenand_oob_64 - oob info for large (2KB) page
25 */
26static struct nand_oobinfo onenand_oob_64 = {
27 .useecc = MTD_NANDECC_AUTOPLACE,
28 .eccbytes = 20,
29 .eccpos = {
30 8, 9, 10, 11, 12,
31 24, 25, 26, 27, 28,
32 40, 41, 42, 43, 44,
33 56, 57, 58, 59, 60,
34 },
35 .oobfree = {
36 {2, 3}, {14, 2}, {18, 3}, {30, 2},
Jarkko Lavinend9777f12006-05-12 17:02:35 +030037 {34, 3}, {46, 2}, {50, 3}, {62, 2}
38 }
Kyungmin Parkcd5f6342005-07-11 11:41:53 +010039};
40
41/**
42 * onenand_oob_32 - oob info for middle (1KB) page
43 */
44static struct nand_oobinfo onenand_oob_32 = {
45 .useecc = MTD_NANDECC_AUTOPLACE,
46 .eccbytes = 10,
47 .eccpos = {
48 8, 9, 10, 11, 12,
49 24, 25, 26, 27, 28,
50 },
51 .oobfree = { {2, 3}, {14, 2}, {18, 3}, {30, 2} }
52};
53
54static const unsigned char ffchars[] = {
55 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
56 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */
57 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
58 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */
59 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
60 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */
61 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
62 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */
63};
64
65/**
66 * onenand_readw - [OneNAND Interface] Read OneNAND register
67 * @param addr address to read
68 *
69 * Read OneNAND register
70 */
71static unsigned short onenand_readw(void __iomem *addr)
72{
73 return readw(addr);
74}
75
76/**
77 * onenand_writew - [OneNAND Interface] Write OneNAND register with value
78 * @param value value to write
79 * @param addr address to write
80 *
81 * Write OneNAND register with value
82 */
83static void onenand_writew(unsigned short value, void __iomem *addr)
84{
85 writew(value, addr);
86}
87
88/**
89 * onenand_block_address - [DEFAULT] Get block address
Kyungmin Park83a36832005-09-29 04:53:16 +010090 * @param this onenand chip data structure
Kyungmin Parkcd5f6342005-07-11 11:41:53 +010091 * @param block the block
92 * @return translated block address if DDP, otherwise same
93 *
94 * Setup Start Address 1 Register (F100h)
95 */
Kyungmin Park83a36832005-09-29 04:53:16 +010096static int onenand_block_address(struct onenand_chip *this, int block)
Kyungmin Parkcd5f6342005-07-11 11:41:53 +010097{
Kyungmin Park83a36832005-09-29 04:53:16 +010098 if (this->device_id & ONENAND_DEVICE_IS_DDP) {
Kyungmin Parkcd5f6342005-07-11 11:41:53 +010099 /* Device Flash Core select, NAND Flash Block Address */
Kyungmin Park83a36832005-09-29 04:53:16 +0100100 int dfs = 0;
Kyungmin Parkcd5f6342005-07-11 11:41:53 +0100101
Kyungmin Park83a36832005-09-29 04:53:16 +0100102 if (block & this->density_mask)
Kyungmin Parkcd5f6342005-07-11 11:41:53 +0100103 dfs = 1;
104
Kyungmin Park83a36832005-09-29 04:53:16 +0100105 return (dfs << ONENAND_DDP_SHIFT) |
106 (block & (this->density_mask - 1));
Kyungmin Parkcd5f6342005-07-11 11:41:53 +0100107 }
108
109 return block;
110}
111
112/**
113 * onenand_bufferram_address - [DEFAULT] Get bufferram address
Kyungmin Park83a36832005-09-29 04:53:16 +0100114 * @param this onenand chip data structure
Kyungmin Parkcd5f6342005-07-11 11:41:53 +0100115 * @param block the block
116 * @return set DBS value if DDP, otherwise 0
117 *
118 * Setup Start Address 2 Register (F101h) for DDP
119 */
Kyungmin Park83a36832005-09-29 04:53:16 +0100120static int onenand_bufferram_address(struct onenand_chip *this, int block)
Kyungmin Parkcd5f6342005-07-11 11:41:53 +0100121{
Kyungmin Park83a36832005-09-29 04:53:16 +0100122 if (this->device_id & ONENAND_DEVICE_IS_DDP) {
Kyungmin Parkcd5f6342005-07-11 11:41:53 +0100123 /* Device BufferRAM Select */
Kyungmin Park83a36832005-09-29 04:53:16 +0100124 int dbs = 0;
Kyungmin Parkcd5f6342005-07-11 11:41:53 +0100125
Kyungmin Park83a36832005-09-29 04:53:16 +0100126 if (block & this->density_mask)
Kyungmin Parkcd5f6342005-07-11 11:41:53 +0100127 dbs = 1;
128
129 return (dbs << ONENAND_DDP_SHIFT);
130 }
131
132 return 0;
133}
134
135/**
136 * onenand_page_address - [DEFAULT] Get page address
137 * @param page the page address
138 * @param sector the sector address
139 * @return combined page and sector address
140 *
141 * Setup Start Address 8 Register (F107h)
142 */
143static int onenand_page_address(int page, int sector)
144{
145 /* Flash Page Address, Flash Sector Address */
146 int fpa, fsa;
147
148 fpa = page & ONENAND_FPA_MASK;
149 fsa = sector & ONENAND_FSA_MASK;
150
151 return ((fpa << ONENAND_FPA_SHIFT) | fsa);
152}
153
154/**
155 * onenand_buffer_address - [DEFAULT] Get buffer address
156 * @param dataram1 DataRAM index
157 * @param sectors the sector address
158 * @param count the number of sectors
159 * @return the start buffer value
160 *
161 * Setup Start Buffer Register (F200h)
162 */
163static int onenand_buffer_address(int dataram1, int sectors, int count)
164{
165 int bsa, bsc;
166
167 /* BufferRAM Sector Address */
168 bsa = sectors & ONENAND_BSA_MASK;
169
170 if (dataram1)
171 bsa |= ONENAND_BSA_DATARAM1; /* DataRAM1 */
172 else
173 bsa |= ONENAND_BSA_DATARAM0; /* DataRAM0 */
174
175 /* BufferRAM Sector Count */
176 bsc = count & ONENAND_BSC_MASK;
177
178 return ((bsa << ONENAND_BSA_SHIFT) | bsc);
179}
180
181/**
182 * onenand_command - [DEFAULT] Send command to OneNAND device
183 * @param mtd MTD device structure
184 * @param cmd the command to be sent
185 * @param addr offset to read from or write to
186 * @param len number of bytes to read or write
187 *
188 * Send command to OneNAND device. This function is used for middle/large page
189 * devices (1KB/2KB Bytes per page)
190 */
191static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t len)
192{
193 struct onenand_chip *this = mtd->priv;
Kyungmin Park493c6462006-05-12 17:03:07 +0300194 int value, readcmd = 0, block_cmd = 0;
Kyungmin Parkcd5f6342005-07-11 11:41:53 +0100195 int block, page;
196 /* Now we use page size operation */
197 int sectors = 4, count = 4;
198
199 /* Address translation */
200 switch (cmd) {
201 case ONENAND_CMD_UNLOCK:
202 case ONENAND_CMD_LOCK:
203 case ONENAND_CMD_LOCK_TIGHT:
204 block = -1;
205 page = -1;
206 break;
207
208 case ONENAND_CMD_ERASE:
209 case ONENAND_CMD_BUFFERRAM:
Kyungmin Park493c6462006-05-12 17:03:07 +0300210 case ONENAND_CMD_OTP_ACCESS:
211 block_cmd = 1;
Kyungmin Parkcd5f6342005-07-11 11:41:53 +0100212 block = (int) (addr >> this->erase_shift);
213 page = -1;
214 break;
215
216 default:
217 block = (int) (addr >> this->erase_shift);
218 page = (int) (addr >> this->page_shift);
219 page &= this->page_mask;
220 break;
221 }
222
223 /* NOTE: The setting order of the registers is very important! */
224 if (cmd == ONENAND_CMD_BUFFERRAM) {
225 /* Select DataRAM for DDP */
Kyungmin Park83a36832005-09-29 04:53:16 +0100226 value = onenand_bufferram_address(this, block);
Kyungmin Parkcd5f6342005-07-11 11:41:53 +0100227 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
228
229 /* Switch to the next data buffer */
230 ONENAND_SET_NEXT_BUFFERRAM(this);
231
232 return 0;
233 }
234
235 if (block != -1) {
236 /* Write 'DFS, FBA' of Flash */
Kyungmin Park83a36832005-09-29 04:53:16 +0100237 value = onenand_block_address(this, block);
Kyungmin Parkcd5f6342005-07-11 11:41:53 +0100238 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
Kyungmin Park3cecf692006-05-12 17:02:51 +0300239
Kyungmin Park75287072006-05-12 17:03:23 +0300240 if (block_cmd) {
Kyungmin Park3cecf692006-05-12 17:02:51 +0300241 /* Select DataRAM for DDP */
242 value = onenand_bufferram_address(this, block);
243 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
244 }
Kyungmin Parkcd5f6342005-07-11 11:41:53 +0100245 }
246
247 if (page != -1) {
248 int dataram;
249
250 switch (cmd) {
251 case ONENAND_CMD_READ:
252 case ONENAND_CMD_READOOB:
253 dataram = ONENAND_SET_NEXT_BUFFERRAM(this);
254 readcmd = 1;
255 break;
256
257 default:
258 dataram = ONENAND_CURRENT_BUFFERRAM(this);
259 break;
260 }
261
262 /* Write 'FPA, FSA' of Flash */
263 value = onenand_page_address(page, sectors);
264 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS8);
265
266 /* Write 'BSA, BSC' of DataRAM */
267 value = onenand_buffer_address(dataram, sectors, count);
268 this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
Thomas Gleixnerd5c5e782005-11-07 11:15:51 +0000269
Kyungmin Parkcd5f6342005-07-11 11:41:53 +0100270 if (readcmd) {
271 /* Select DataRAM for DDP */
Kyungmin Park83a36832005-09-29 04:53:16 +0100272 value = onenand_bufferram_address(this, block);
Kyungmin Parkcd5f6342005-07-11 11:41:53 +0100273 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
274 }
275 }
276
277 /* Interrupt clear */
278 this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
279
280 /* Write command */
281 this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
282
283 return 0;
284}
285
286/**
287 * onenand_wait - [DEFAULT] wait until the command is done
288 * @param mtd MTD device structure
289 * @param state state to select the max. timeout value
290 *
291 * Wait for command done. This applies to all OneNAND command
292 * Read can take up to 30us, erase up to 2ms and program up to 350us
293 * according to general OneNAND specs
294 */
295static int onenand_wait(struct mtd_info *mtd, int state)
296{
297 struct onenand_chip * this = mtd->priv;
298 unsigned long timeout;
299 unsigned int flags = ONENAND_INT_MASTER;
300 unsigned int interrupt = 0;
301 unsigned int ctrl, ecc;
302
303 /* The 20 msec is enough */
304 timeout = jiffies + msecs_to_jiffies(20);
305 while (time_before(jiffies, timeout)) {
306 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
307
308 if (interrupt & flags)
309 break;
310
311 if (state != FL_READING)
312 cond_resched();
Kyungmin Park628bee62006-05-12 17:02:24 +0300313 touch_softlockup_watchdog();
Kyungmin Parkcd5f6342005-07-11 11:41:53 +0100314 }
315 /* To get correct interrupt status in timeout case */
316 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
317
318 ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
319
320 if (ctrl & ONENAND_CTRL_ERROR) {
Kyungmin Parkcdc00132005-09-03 07:15:48 +0100321 /* It maybe occur at initial bad block */
322 DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: controller error = 0x%04x\n", ctrl);
323 /* Clear other interrupt bits for preventing ECC error */
324 interrupt &= ONENAND_INT_MASTER;
Kyungmin Parkcd5f6342005-07-11 11:41:53 +0100325 }
326
327 if (ctrl & ONENAND_CTRL_LOCK) {
Kyungmin Parkcdc00132005-09-03 07:15:48 +0100328 DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: it's locked error = 0x%04x\n", ctrl);
329 return -EACCES;
Kyungmin Parkcd5f6342005-07-11 11:41:53 +0100330 }
331
332 if (interrupt & ONENAND_INT_READ) {
333 ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS);
334 if (ecc & ONENAND_ECC_2BIT_ALL) {
Kyungmin Parkcdc00132005-09-03 07:15:48 +0100335 DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: ECC error = 0x%04x\n", ecc);
Kyungmin Parkcd5f6342005-07-11 11:41:53 +0100336 return -EBADMSG;
337 }
338 }
339
340 return 0;
341}
342
343/**
344 * onenand_bufferram_offset - [DEFAULT] BufferRAM offset
345 * @param mtd MTD data structure
346 * @param area BufferRAM area
347 * @return offset given area
348 *
349 * Return BufferRAM offset given area
350 */
351static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area)
352{
353 struct onenand_chip *this = mtd->priv;
354
355 if (ONENAND_CURRENT_BUFFERRAM(this)) {
356 if (area == ONENAND_DATARAM)
Joern Engel28318772006-05-22 23:18:05 +0200357 return mtd->writesize;
Kyungmin Parkcd5f6342005-07-11 11:41:53 +0100358 if (area == ONENAND_SPARERAM)
359 return mtd->oobsize;
360 }
361
362 return 0;
363}
364
365/**
366 * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area
367 * @param mtd MTD data structure
368 * @param area BufferRAM area
369 * @param buffer the databuffer to put/get data
370 * @param offset offset to read from or write to
371 * @param count number of bytes to read/write
372 *
373 * Read the BufferRAM area
374 */
375static int onenand_read_bufferram(struct mtd_info *mtd, int area,
376 unsigned char *buffer, int offset, size_t count)
377{
378 struct onenand_chip *this = mtd->priv;
379 void __iomem *bufferram;
380
381 bufferram = this->base + area;
382
383 bufferram += onenand_bufferram_offset(mtd, area);
384
Kyungmin Park9c01f87d2006-05-12 17:02:31 +0300385 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
386 unsigned short word;
387
388 /* Align with word(16-bit) size */
389 count--;
390
391 /* Read word and save byte */
392 word = this->read_word(bufferram + offset + count);
393 buffer[count] = (word & 0xff);
394 }
395
Kyungmin Parkcd5f6342005-07-11 11:41:53 +0100396 memcpy(buffer, bufferram + offset, count);
397
398 return 0;
399}
400
401/**
Kyungmin Park52b0eea2005-09-03 07:07:19 +0100402 * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode
403 * @param mtd MTD data structure
404 * @param area BufferRAM area
405 * @param buffer the databuffer to put/get data
406 * @param offset offset to read from or write to
407 * @param count number of bytes to read/write
408 *
409 * Read the BufferRAM area with Sync. Burst Mode
410 */
411static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area,
412 unsigned char *buffer, int offset, size_t count)
413{
414 struct onenand_chip *this = mtd->priv;
415 void __iomem *bufferram;
416
417 bufferram = this->base + area;
418
419 bufferram += onenand_bufferram_offset(mtd, area);
420
421 this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ);
422
Kyungmin Park9c01f87d2006-05-12 17:02:31 +0300423 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
424 unsigned short word;
425
426 /* Align with word(16-bit) size */
427 count--;
428
429 /* Read word and save byte */
430 word = this->read_word(bufferram + offset + count);
431 buffer[count] = (word & 0xff);
432 }
433
Kyungmin Park52b0eea2005-09-03 07:07:19 +0100434 memcpy(buffer, bufferram + offset, count);
435
436 this->mmcontrol(mtd, 0);
437
438 return 0;
439}
440
441/**
Kyungmin Parkcd5f6342005-07-11 11:41:53 +0100442 * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area
443 * @param mtd MTD data structure
444 * @param area BufferRAM area
445 * @param buffer the databuffer to put/get data
446 * @param offset offset to read from or write to
447 * @param count number of bytes to read/write
448 *
449 * Write the BufferRAM area
450 */
451static int onenand_write_bufferram(struct mtd_info *mtd, int area,
452 const unsigned char *buffer, int offset, size_t count)
453{
454 struct onenand_chip *this = mtd->priv;
455 void __iomem *bufferram;
456
457 bufferram = this->base + area;
458
459 bufferram += onenand_bufferram_offset(mtd, area);
460
Kyungmin Park9c01f87d2006-05-12 17:02:31 +0300461 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
462 unsigned short word;
463 int byte_offset;
464
465 /* Align with word(16-bit) size */
466 count--;
467
468 /* Calculate byte access offset */
469 byte_offset = offset + count;
470
471 /* Read word and save byte */
472 word = this->read_word(bufferram + byte_offset);
473 word = (word & ~0xff) | buffer[count];
474 this->write_word(word, bufferram + byte_offset);
475 }
476
Kyungmin Parkcd5f6342005-07-11 11:41:53 +0100477 memcpy(bufferram + offset, buffer, count);
478
479 return 0;
480}
481
482/**
483 * onenand_check_bufferram - [GENERIC] Check BufferRAM information
484 * @param mtd MTD data structure
485 * @param addr address to check
Thomas Gleixnerd5c5e782005-11-07 11:15:51 +0000486 * @return 1 if there are valid data, otherwise 0
Kyungmin Parkcd5f6342005-07-11 11:41:53 +0100487 *
488 * Check bufferram if there is data we required
489 */
490static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr)
491{
492 struct onenand_chip *this = mtd->priv;
493 int block, page;
494 int i;
Thomas Gleixnerd5c5e782005-11-07 11:15:51 +0000495
Kyungmin Parkcd5f6342005-07-11 11:41:53 +0100496 block = (int) (addr >> this->erase_shift);
497 page = (int) (addr >> this->page_shift);
498 page &= this->page_mask;
499
500 i = ONENAND_CURRENT_BUFFERRAM(this);
501
502 /* Is there valid data? */
503 if (this->bufferram[i].block == block &&
504 this->bufferram[i].page == page &&
505 this->bufferram[i].valid)
506 return 1;
507
508 return 0;
509}
510
511/**
512 * onenand_update_bufferram - [GENERIC] Update BufferRAM information
513 * @param mtd MTD data structure
514 * @param addr address to update
515 * @param valid valid flag
516 *
517 * Update BufferRAM information
518 */
519static int onenand_update_bufferram(struct mtd_info *mtd, loff_t addr,
520 int valid)
521{
522 struct onenand_chip *this = mtd->priv;
523 int block, page;
524 int i;
Thomas Gleixnerd5c5e782005-11-07 11:15:51 +0000525
Kyungmin Parkcd5f6342005-07-11 11:41:53 +0100526 block = (int) (addr >> this->erase_shift);
527 page = (int) (addr >> this->page_shift);
528 page &= this->page_mask;
529
530 /* Invalidate BufferRAM */
531 for (i = 0; i < MAX_BUFFERRAM; i++) {
532 if (this->bufferram[i].block == block &&
533 this->bufferram[i].page == page)
534 this->bufferram[i].valid = 0;
535 }
536
537 /* Update BufferRAM */
538 i = ONENAND_CURRENT_BUFFERRAM(this);
539 this->bufferram[i].block = block;
540 this->bufferram[i].page = page;
541 this->bufferram[i].valid = valid;
542
543 return 0;
544}
545
546/**
547 * onenand_get_device - [GENERIC] Get chip for selected access
548 * @param mtd MTD device structure
549 * @param new_state the state which is requested
550 *
551 * Get the device and lock it for exclusive access
552 */
Kyungmin Parka41371e2005-09-29 03:55:31 +0100553static int onenand_get_device(struct mtd_info *mtd, int new_state)
Kyungmin Parkcd5f6342005-07-11 11:41:53 +0100554{
555 struct onenand_chip *this = mtd->priv;
556 DECLARE_WAITQUEUE(wait, current);
557
558 /*
559 * Grab the lock and see if the device is available
560 */
561 while (1) {
562 spin_lock(&this->chip_lock);
563 if (this->state == FL_READY) {
564 this->state = new_state;
565 spin_unlock(&this->chip_lock);
566 break;
567 }
Kyungmin Parka41371e2005-09-29 03:55:31 +0100568 if (new_state == FL_PM_SUSPENDED) {
569 spin_unlock(&this->chip_lock);
570 return (this->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN;
571 }
Kyungmin Parkcd5f6342005-07-11 11:41:53 +0100572 set_current_state(TASK_UNINTERRUPTIBLE);
573 add_wait_queue(&this->wq, &wait);
574 spin_unlock(&this->chip_lock);
575 schedule();
576 remove_wait_queue(&this->wq, &wait);
577 }
Kyungmin Parka41371e2005-09-29 03:55:31 +0100578
579 return 0;
Kyungmin Parkcd5f6342005-07-11 11:41:53 +0100580}
581
582/**
583 * onenand_release_device - [GENERIC] release chip
584 * @param mtd MTD device structure
585 *
586 * Deselect, release chip lock and wake up anyone waiting on the device
587 */
588static void onenand_release_device(struct mtd_info *mtd)
589{
590 struct onenand_chip *this = mtd->priv;
591
592 /* Release the chip */
593 spin_lock(&this->chip_lock);
594 this->state = FL_READY;
595 wake_up(&this->wq);
596 spin_unlock(&this->chip_lock);
597}
598
599/**
Thomas Gleixner9223a452006-05-23 17:21:03 +0200600 * onenand_read - [MTD Interface] Read data from flash
Kyungmin Parkcd5f6342005-07-11 11:41:53 +0100601 * @param mtd MTD device structure
602 * @param from offset to read from
603 * @param len number of bytes to read
604 * @param retlen pointer to variable to store the number of read bytes
605 * @param buf the databuffer to put data
Kyungmin Parkcd5f6342005-07-11 11:41:53 +0100606 *
Thomas Gleixner9223a452006-05-23 17:21:03 +0200607 * Read with ecc
608*/
609static int onenand_read(struct mtd_info *mtd, loff_t from, size_t len,
610 size_t *retlen, u_char *buf)
Kyungmin Parkcd5f6342005-07-11 11:41:53 +0100611{
612 struct onenand_chip *this = mtd->priv;
613 int read = 0, column;
614 int thislen;
615 int ret = 0;
616
Thomas Gleixner9223a452006-05-23 17:21:03 +0200617 DEBUG(MTD_DEBUG_LEVEL3, "onenand_read: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
Kyungmin Parkcd5f6342005-07-11 11:41:53 +0100618
619 /* Do not allow reads past end of device */
620 if ((from + len) > mtd->size) {
Thomas Gleixner9223a452006-05-23 17:21:03 +0200621 DEBUG(MTD_DEBUG_LEVEL0, "onenand_read: Attempt read beyond end of device\n");
Kyungmin Parkcd5f6342005-07-11 11:41:53 +0100622 *retlen = 0;
623 return -EINVAL;
624 }
625
626 /* Grab the lock and see if the device is available */
627 onenand_get_device(mtd, FL_READING);
628
629 /* TODO handling oob */
630
631 while (read < len) {
Joern Engel28318772006-05-22 23:18:05 +0200632 thislen = min_t(int, mtd->writesize, len - read);
Kyungmin Parkcd5f6342005-07-11 11:41:53 +0100633
Joern Engel28318772006-05-22 23:18:05 +0200634 column = from & (mtd->writesize - 1);
635 if (column + thislen > mtd->writesize)
636 thislen = mtd->writesize - column;
Kyungmin Parkcd5f6342005-07-11 11:41:53 +0100637
638 if (!onenand_check_bufferram(mtd, from)) {
Joern Engel28318772006-05-22 23:18:05 +0200639 this->command(mtd, ONENAND_CMD_READ, from, mtd->writesize);
Kyungmin Parkcd5f6342005-07-11 11:41:53 +0100640
641 ret = this->wait(mtd, FL_READING);
642 /* First copy data and check return value for ECC handling */
643 onenand_update_bufferram(mtd, from, 1);
644 }
645
646 this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
647
648 read += thislen;
649
650 if (read == len)
651 break;
652
653 if (ret) {
Thomas Gleixner9223a452006-05-23 17:21:03 +0200654 DEBUG(MTD_DEBUG_LEVEL0, "onenand_read: read failed = %d\n", ret);
Kyungmin Parkcd5f6342005-07-11 11:41:53 +0100655 goto out;
656 }
657
658 from += thislen;
659 buf += thislen;
660 }
661
662out:
663 /* Deselect and wake up anyone waiting on the device */
664 onenand_release_device(mtd);
665
666 /*
667 * Return success, if no ECC failures, else -EBADMSG
668 * fs driver will take care of that, because
669 * retlen == desired len and result == -EBADMSG
670 */
671 *retlen = read;
672 return ret;
673}
674
675/**
Kyungmin Parkcd5f6342005-07-11 11:41:53 +0100676 * onenand_read_oob - [MTD Interface] OneNAND read out-of-band
677 * @param mtd MTD device structure
678 * @param from offset to read from
679 * @param len number of bytes to read
680 * @param retlen pointer to variable to store the number of read bytes
681 * @param buf the databuffer to put data
682 *
683 * OneNAND read out-of-band data from the spare area
684 */
685static int onenand_read_oob(struct mtd_info *mtd, loff_t from, size_t len,
686 size_t *retlen, u_char *buf)
687{
688 struct onenand_chip *this = mtd->priv;
689 int read = 0, thislen, column;
690 int ret = 0;
691
692 DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_oob: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
693
694 /* Initialize return length value */
695 *retlen = 0;
696
697 /* Do not allow reads past end of device */
698 if (unlikely((from + len) > mtd->size)) {
699 DEBUG(MTD_DEBUG_LEVEL0, "onenand_read_oob: Attempt read beyond end of device\n");
700 return -EINVAL;
701 }
702
703 /* Grab the lock and see if the device is available */
704 onenand_get_device(mtd, FL_READING);
705
706 column = from & (mtd->oobsize - 1);
707
708 while (read < len) {
709 thislen = mtd->oobsize - column;
710 thislen = min_t(int, thislen, len);
711
712 this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize);
713
714 onenand_update_bufferram(mtd, from, 0);
715
716 ret = this->wait(mtd, FL_READING);
717 /* First copy data and check return value for ECC handling */
718
719 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
720
721 read += thislen;
722
723 if (read == len)
724 break;
725
726 if (ret) {
727 DEBUG(MTD_DEBUG_LEVEL0, "onenand_read_oob: read failed = %d\n", ret);
728 goto out;
729 }
730
731 buf += thislen;
732
733 /* Read more? */
734 if (read < len) {
735 /* Page size */
Joern Engel28318772006-05-22 23:18:05 +0200736 from += mtd->writesize;
Kyungmin Parkcd5f6342005-07-11 11:41:53 +0100737 column = 0;
738 }
739 }
740
741out:
742 /* Deselect and wake up anyone waiting on the device */
743 onenand_release_device(mtd);
744
745 *retlen = read;
746 return ret;
747}
748
749#ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
750/**
Kyungmin Park8e6ec692006-05-12 17:02:41 +0300751 * onenand_verify_oob - [GENERIC] verify the oob contents after a write
752 * @param mtd MTD device structure
753 * @param buf the databuffer to verify
754 * @param to offset to read from
755 * @param len number of bytes to read and compare
756 *
757 */
758static int onenand_verify_oob(struct mtd_info *mtd, const u_char *buf, loff_t to, int len)
759{
760 struct onenand_chip *this = mtd->priv;
761 char *readp = this->page_buf;
762 int column = to & (mtd->oobsize - 1);
763 int status, i;
764
765 this->command(mtd, ONENAND_CMD_READOOB, to, mtd->oobsize);
766 onenand_update_bufferram(mtd, to, 0);
767 status = this->wait(mtd, FL_READING);
768 if (status)
769 return status;
770
771 this->read_bufferram(mtd, ONENAND_SPARERAM, readp, column, len);
772
773 for(i = 0; i < len; i++)
774 if (buf[i] != 0xFF && buf[i] != readp[i])
775 return -EBADMSG;
776
777 return 0;
778}
779
780/**
Kyungmin Parkcd5f6342005-07-11 11:41:53 +0100781 * onenand_verify_page - [GENERIC] verify the chip contents after a write
782 * @param mtd MTD device structure
783 * @param buf the databuffer to verify
Kyungmin Parkcd5f6342005-07-11 11:41:53 +0100784 *
785 * Check DataRAM area directly
786 */
Kyungmin Parkd36d63d2005-09-03 07:36:21 +0100787static int onenand_verify_page(struct mtd_info *mtd, u_char *buf, loff_t addr)
Kyungmin Parkcd5f6342005-07-11 11:41:53 +0100788{
789 struct onenand_chip *this = mtd->priv;
790 void __iomem *dataram0, *dataram1;
791 int ret = 0;
792
Joern Engel28318772006-05-22 23:18:05 +0200793 this->command(mtd, ONENAND_CMD_READ, addr, mtd->writesize);
Kyungmin Parkcd5f6342005-07-11 11:41:53 +0100794
795 ret = this->wait(mtd, FL_READING);
796 if (ret)
797 return ret;
798
799 onenand_update_bufferram(mtd, addr, 1);
800
801 /* Check, if the two dataram areas are same */
802 dataram0 = this->base + ONENAND_DATARAM;
Joern Engel28318772006-05-22 23:18:05 +0200803 dataram1 = dataram0 + mtd->writesize;
Kyungmin Parkcd5f6342005-07-11 11:41:53 +0100804
Joern Engel28318772006-05-22 23:18:05 +0200805 if (memcmp(dataram0, dataram1, mtd->writesize))
Kyungmin Parkcd5f6342005-07-11 11:41:53 +0100806 return -EBADMSG;
Thomas Gleixnerd5c5e782005-11-07 11:15:51 +0000807
Kyungmin Parkcd5f6342005-07-11 11:41:53 +0100808 return 0;
809}
810#else
811#define onenand_verify_page(...) (0)
Kyungmin Park8e6ec692006-05-12 17:02:41 +0300812#define onenand_verify_oob(...) (0)
Kyungmin Parkcd5f6342005-07-11 11:41:53 +0100813#endif
814
Joern Engel28318772006-05-22 23:18:05 +0200815#define NOTALIGNED(x) ((x & (mtd->writesize - 1)) != 0)
Kyungmin Parkcd5f6342005-07-11 11:41:53 +0100816
817/**
Thomas Gleixner9223a452006-05-23 17:21:03 +0200818 * onenand_write - [MTD Interface] write buffer to FLASH
Kyungmin Parkcd5f6342005-07-11 11:41:53 +0100819 * @param mtd MTD device structure
820 * @param to offset to write to
821 * @param len number of bytes to write
822 * @param retlen pointer to variable to store the number of written bytes
823 * @param buf the data to write
Kyungmin Parkcd5f6342005-07-11 11:41:53 +0100824 *
Thomas Gleixner9223a452006-05-23 17:21:03 +0200825 * Write with ECC
Kyungmin Parkcd5f6342005-07-11 11:41:53 +0100826 */
Thomas Gleixner9223a452006-05-23 17:21:03 +0200827static int onenand_write(struct mtd_info *mtd, loff_t to, size_t len,
828 size_t *retlen, const u_char *buf)
Kyungmin Parkcd5f6342005-07-11 11:41:53 +0100829{
830 struct onenand_chip *this = mtd->priv;
831 int written = 0;
832 int ret = 0;
833
Thomas Gleixner9223a452006-05-23 17:21:03 +0200834 DEBUG(MTD_DEBUG_LEVEL3, "onenand_write: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
Kyungmin Parkcd5f6342005-07-11 11:41:53 +0100835
836 /* Initialize retlen, in case of early exit */
837 *retlen = 0;
838
839 /* Do not allow writes past end of device */
840 if (unlikely((to + len) > mtd->size)) {
Thomas Gleixner9223a452006-05-23 17:21:03 +0200841 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write: Attempt write to past end of device\n");
Kyungmin Parkcd5f6342005-07-11 11:41:53 +0100842 return -EINVAL;
843 }
844
845 /* Reject writes, which are not page aligned */
846 if (unlikely(NOTALIGNED(to)) || unlikely(NOTALIGNED(len))) {
Thomas Gleixner9223a452006-05-23 17:21:03 +0200847 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write: Attempt to write not page aligned data\n");
Kyungmin Parkcd5f6342005-07-11 11:41:53 +0100848 return -EINVAL;
849 }
850
851 /* Grab the lock and see if the device is available */
852 onenand_get_device(mtd, FL_WRITING);
853
854 /* Loop until all data write */
855 while (written < len) {
Joern Engel28318772006-05-22 23:18:05 +0200856 int thislen = min_t(int, mtd->writesize, len - written);
Kyungmin Parkcd5f6342005-07-11 11:41:53 +0100857
Joern Engel28318772006-05-22 23:18:05 +0200858 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->writesize);
Kyungmin Parkcd5f6342005-07-11 11:41:53 +0100859
860 this->write_bufferram(mtd, ONENAND_DATARAM, buf, 0, thislen);
861 this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize);
862
Joern Engel28318772006-05-22 23:18:05 +0200863 this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize);
Kyungmin Parkcd5f6342005-07-11 11:41:53 +0100864
865 onenand_update_bufferram(mtd, to, 1);
866
867 ret = this->wait(mtd, FL_WRITING);
868 if (ret) {
Thomas Gleixner9223a452006-05-23 17:21:03 +0200869 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write: write filaed %d\n", ret);
Kyungmin Parkcd5f6342005-07-11 11:41:53 +0100870 goto out;
871 }
872
873 written += thislen;
874
875 /* Only check verify write turn on */
Kyungmin Parkd36d63d2005-09-03 07:36:21 +0100876 ret = onenand_verify_page(mtd, (u_char *) buf, to);
Kyungmin Parkcd5f6342005-07-11 11:41:53 +0100877 if (ret) {
Thomas Gleixner9223a452006-05-23 17:21:03 +0200878 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write: verify failed %d\n", ret);
Kyungmin Parkcd5f6342005-07-11 11:41:53 +0100879 goto out;
880 }
881
882 if (written == len)
883 break;
884
885 to += thislen;
886 buf += thislen;
887 }
888
889out:
890 /* Deselect and wake up anyone waiting on the device */
891 onenand_release_device(mtd);
892
893 *retlen = written;
Thomas Gleixnerd5c5e782005-11-07 11:15:51 +0000894
Kyungmin Parkcd5f6342005-07-11 11:41:53 +0100895 return ret;
896}
897
898/**
Kyungmin Parkcd5f6342005-07-11 11:41:53 +0100899 * onenand_write_oob - [MTD Interface] OneNAND write out-of-band
900 * @param mtd MTD device structure
901 * @param to offset to write to
902 * @param len number of bytes to write
903 * @param retlen pointer to variable to store the number of written bytes
904 * @param buf the data to write
905 *
906 * OneNAND write out-of-band
907 */
908static int onenand_write_oob(struct mtd_info *mtd, loff_t to, size_t len,
909 size_t *retlen, const u_char *buf)
910{
911 struct onenand_chip *this = mtd->priv;
Kyungmin Park8e6ec692006-05-12 17:02:41 +0300912 int column, ret = 0;
Kyungmin Parkcd5f6342005-07-11 11:41:53 +0100913 int written = 0;
914
915 DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_oob: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
916
917 /* Initialize retlen, in case of early exit */
918 *retlen = 0;
919
920 /* Do not allow writes past end of device */
921 if (unlikely((to + len) > mtd->size)) {
922 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_oob: Attempt write to past end of device\n");
923 return -EINVAL;
924 }
925
926 /* Grab the lock and see if the device is available */
927 onenand_get_device(mtd, FL_WRITING);
928
929 /* Loop until all data write */
930 while (written < len) {
931 int thislen = min_t(int, mtd->oobsize, len - written);
932
933 column = to & (mtd->oobsize - 1);
934
935 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize);
936
Kyungmin Park34c10602006-05-12 17:02:46 +0300937 /* We send data to spare ram with oobsize
938 * to prevent byte access */
939 memset(this->page_buf, 0xff, mtd->oobsize);
940 memcpy(this->page_buf + column, buf, thislen);
941 this->write_bufferram(mtd, ONENAND_SPARERAM, this->page_buf, 0, mtd->oobsize);
Kyungmin Parkcd5f6342005-07-11 11:41:53 +0100942
943 this->command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize);
944
945 onenand_update_bufferram(mtd, to, 0);
946
Kyungmin Park8e6ec692006-05-12 17:02:41 +0300947 ret = this->wait(mtd, FL_WRITING);
948 if (ret) {
949 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_oob: write filaed %d\n", ret);
Kyungmin Parkcd5f6342005-07-11 11:41:53 +0100950 goto out;
Kyungmin Park8e6ec692006-05-12 17:02:41 +0300951 }
952
953 ret = onenand_verify_oob(mtd, buf, to, thislen);
954 if (ret) {
955 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_oob: verify failed %d\n", ret);
956 goto out;
957 }
Kyungmin Parkcd5f6342005-07-11 11:41:53 +0100958
959 written += thislen;
960
961 if (written == len)
962 break;
963
964 to += thislen;
965 buf += thislen;
966 }
967
968out:
969 /* Deselect and wake up anyone waiting on the device */
970 onenand_release_device(mtd);
971
972 *retlen = written;
Thomas Gleixnerd5c5e782005-11-07 11:15:51 +0000973
Kyungmin Park8e6ec692006-05-12 17:02:41 +0300974 return ret;
Kyungmin Parkcd5f6342005-07-11 11:41:53 +0100975}
976
977/**
Kyungmin Parkcdc00132005-09-03 07:15:48 +0100978 * onenand_block_checkbad - [GENERIC] Check if a block is marked bad
979 * @param mtd MTD device structure
980 * @param ofs offset from device start
981 * @param getchip 0, if the chip is already selected
982 * @param allowbbt 1, if its allowed to access the bbt area
983 *
984 * Check, if the block is bad. Either by reading the bad block table or
985 * calling of the scan function.
986 */
987static int onenand_block_checkbad(struct mtd_info *mtd, loff_t ofs, int getchip, int allowbbt)
988{
989 struct onenand_chip *this = mtd->priv;
990 struct bbm_info *bbm = this->bbm;
991
992 /* Return info from the table */
993 return bbm->isbad_bbt(mtd, ofs, allowbbt);
994}
995
996/**
Kyungmin Parkcd5f6342005-07-11 11:41:53 +0100997 * onenand_erase - [MTD Interface] erase block(s)
998 * @param mtd MTD device structure
999 * @param instr erase instruction
1000 *
1001 * Erase one ore more blocks
1002 */
1003static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
1004{
1005 struct onenand_chip *this = mtd->priv;
1006 unsigned int block_size;
1007 loff_t addr;
1008 int len;
1009 int ret = 0;
1010
1011 DEBUG(MTD_DEBUG_LEVEL3, "onenand_erase: start = 0x%08x, len = %i\n", (unsigned int) instr->addr, (unsigned int) instr->len);
1012
1013 block_size = (1 << this->erase_shift);
1014
1015 /* Start address must align on block boundary */
1016 if (unlikely(instr->addr & (block_size - 1))) {
1017 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Unaligned address\n");
1018 return -EINVAL;
1019 }
1020
1021 /* Length must align on block boundary */
1022 if (unlikely(instr->len & (block_size - 1))) {
1023 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Length not block aligned\n");
1024 return -EINVAL;
1025 }
1026
1027 /* Do not allow erase past end of device */
1028 if (unlikely((instr->len + instr->addr) > mtd->size)) {
1029 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Erase past end of device\n");
1030 return -EINVAL;
1031 }
1032
1033 instr->fail_addr = 0xffffffff;
1034
1035 /* Grab the lock and see if the device is available */
1036 onenand_get_device(mtd, FL_ERASING);
1037
1038 /* Loop throught the pages */
1039 len = instr->len;
1040 addr = instr->addr;
1041
1042 instr->state = MTD_ERASING;
1043
1044 while (len) {
1045
Kyungmin Parkcdc00132005-09-03 07:15:48 +01001046 /* Check if we have a bad block, we do not erase bad blocks */
1047 if (onenand_block_checkbad(mtd, addr, 0, 0)) {
1048 printk (KERN_WARNING "onenand_erase: attempt to erase a bad block at addr 0x%08x\n", (unsigned int) addr);
1049 instr->state = MTD_ERASE_FAILED;
1050 goto erase_exit;
1051 }
Kyungmin Parkcd5f6342005-07-11 11:41:53 +01001052
1053 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
1054
1055 ret = this->wait(mtd, FL_ERASING);
1056 /* Check, if it is write protected */
1057 if (ret) {
1058 if (ret == -EPERM)
1059 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Device is write protected!!!\n");
1060 else
1061 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Failed erase, block %d\n", (unsigned) (addr >> this->erase_shift));
1062 instr->state = MTD_ERASE_FAILED;
1063 instr->fail_addr = addr;
1064 goto erase_exit;
1065 }
1066
1067 len -= block_size;
1068 addr += block_size;
1069 }
1070
1071 instr->state = MTD_ERASE_DONE;
1072
1073erase_exit:
1074
1075 ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
1076 /* Do call back function */
1077 if (!ret)
1078 mtd_erase_callback(instr);
1079
1080 /* Deselect and wake up anyone waiting on the device */
1081 onenand_release_device(mtd);
1082
1083 return ret;
1084}
1085
1086/**
1087 * onenand_sync - [MTD Interface] sync
1088 * @param mtd MTD device structure
1089 *
1090 * Sync is actually a wait for chip ready function
1091 */
1092static void onenand_sync(struct mtd_info *mtd)
1093{
1094 DEBUG(MTD_DEBUG_LEVEL3, "onenand_sync: called\n");
1095
1096 /* Grab the lock and see if the device is available */
1097 onenand_get_device(mtd, FL_SYNCING);
1098
1099 /* Release it and go back */
1100 onenand_release_device(mtd);
1101}
1102
Kyungmin Parkcdc00132005-09-03 07:15:48 +01001103
Kyungmin Parkcd5f6342005-07-11 11:41:53 +01001104/**
1105 * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
1106 * @param mtd MTD device structure
1107 * @param ofs offset relative to mtd start
Kyungmin Parkcdc00132005-09-03 07:15:48 +01001108 *
1109 * Check whether the block is bad
Kyungmin Parkcd5f6342005-07-11 11:41:53 +01001110 */
1111static int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs)
1112{
Kyungmin Parkcdc00132005-09-03 07:15:48 +01001113 /* Check for invalid offset */
1114 if (ofs > mtd->size)
1115 return -EINVAL;
1116
1117 return onenand_block_checkbad(mtd, ofs, 1, 0);
1118}
1119
1120/**
1121 * onenand_default_block_markbad - [DEFAULT] mark a block bad
1122 * @param mtd MTD device structure
1123 * @param ofs offset from device start
1124 *
1125 * This is the default implementation, which can be overridden by
1126 * a hardware specific driver.
1127 */
1128static int onenand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
1129{
1130 struct onenand_chip *this = mtd->priv;
1131 struct bbm_info *bbm = this->bbm;
1132 u_char buf[2] = {0, 0};
1133 size_t retlen;
1134 int block;
1135
1136 /* Get block number */
1137 block = ((int) ofs) >> bbm->bbt_erase_shift;
1138 if (bbm->bbt)
1139 bbm->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
1140
1141 /* We write two bytes, so we dont have to mess with 16 bit access */
1142 ofs += mtd->oobsize + (bbm->badblockpos & ~0x01);
1143 return mtd->write_oob(mtd, ofs , 2, &retlen, buf);
Kyungmin Parkcd5f6342005-07-11 11:41:53 +01001144}
1145
1146/**
1147 * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad
1148 * @param mtd MTD device structure
1149 * @param ofs offset relative to mtd start
Kyungmin Parkcdc00132005-09-03 07:15:48 +01001150 *
1151 * Mark the block as bad
Kyungmin Parkcd5f6342005-07-11 11:41:53 +01001152 */
1153static int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs)
1154{
Kyungmin Parkcdc00132005-09-03 07:15:48 +01001155 struct onenand_chip *this = mtd->priv;
1156 int ret;
1157
1158 ret = onenand_block_isbad(mtd, ofs);
1159 if (ret) {
1160 /* If it was bad already, return success and do nothing */
1161 if (ret > 0)
1162 return 0;
1163 return ret;
1164 }
1165
1166 return this->block_markbad(mtd, ofs);
Kyungmin Parkcd5f6342005-07-11 11:41:53 +01001167}
1168
1169/**
1170 * onenand_unlock - [MTD Interface] Unlock block(s)
1171 * @param mtd MTD device structure
1172 * @param ofs offset relative to mtd start
1173 * @param len number of bytes to unlock
1174 *
1175 * Unlock one or more blocks
1176 */
1177static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len)
1178{
1179 struct onenand_chip *this = mtd->priv;
1180 int start, end, block, value, status;
1181
1182 start = ofs >> this->erase_shift;
1183 end = len >> this->erase_shift;
1184
1185 /* Continuous lock scheme */
1186 if (this->options & ONENAND_CONT_LOCK) {
1187 /* Set start block address */
1188 this->write_word(start, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1189 /* Set end block address */
1190 this->write_word(end - 1, this->base + ONENAND_REG_END_BLOCK_ADDRESS);
1191 /* Write unlock command */
1192 this->command(mtd, ONENAND_CMD_UNLOCK, 0, 0);
1193
1194 /* There's no return value */
1195 this->wait(mtd, FL_UNLOCKING);
1196
1197 /* Sanity check */
1198 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1199 & ONENAND_CTRL_ONGO)
1200 continue;
1201
1202 /* Check lock status */
1203 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1204 if (!(status & ONENAND_WP_US))
1205 printk(KERN_ERR "wp status = 0x%x\n", status);
1206
1207 return 0;
1208 }
1209
1210 /* Block lock scheme */
1211 for (block = start; block < end; block++) {
Kyungmin Park20ba89a2005-12-16 11:17:29 +09001212 /* Set block address */
1213 value = onenand_block_address(this, block);
1214 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
1215 /* Select DataRAM for DDP */
1216 value = onenand_bufferram_address(this, block);
1217 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
Kyungmin Parkcd5f6342005-07-11 11:41:53 +01001218 /* Set start block address */
1219 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1220 /* Write unlock command */
1221 this->command(mtd, ONENAND_CMD_UNLOCK, 0, 0);
1222
1223 /* There's no return value */
1224 this->wait(mtd, FL_UNLOCKING);
1225
1226 /* Sanity check */
1227 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1228 & ONENAND_CTRL_ONGO)
1229 continue;
1230
Kyungmin Parkcd5f6342005-07-11 11:41:53 +01001231 /* Check lock status */
1232 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1233 if (!(status & ONENAND_WP_US))
1234 printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
1235 }
Thomas Gleixnerd5c5e782005-11-07 11:15:51 +00001236
Kyungmin Parkcd5f6342005-07-11 11:41:53 +01001237 return 0;
1238}
1239
Kyungmin Park493c6462006-05-12 17:03:07 +03001240#ifdef CONFIG_MTD_ONENAND_OTP
1241
1242/* Interal OTP operation */
1243typedef int (*otp_op_t)(struct mtd_info *mtd, loff_t form, size_t len,
1244 size_t *retlen, u_char *buf);
1245
1246/**
1247 * do_otp_read - [DEFAULT] Read OTP block area
1248 * @param mtd MTD device structure
1249 * @param from The offset to read
1250 * @param len number of bytes to read
1251 * @param retlen pointer to variable to store the number of readbytes
1252 * @param buf the databuffer to put/get data
1253 *
1254 * Read OTP block area.
1255 */
1256static int do_otp_read(struct mtd_info *mtd, loff_t from, size_t len,
1257 size_t *retlen, u_char *buf)
1258{
1259 struct onenand_chip *this = mtd->priv;
1260 int ret;
1261
1262 /* Enter OTP access mode */
1263 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
1264 this->wait(mtd, FL_OTPING);
1265
1266 ret = mtd->read(mtd, from, len, retlen, buf);
1267
1268 /* Exit OTP access mode */
1269 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
1270 this->wait(mtd, FL_RESETING);
1271
1272 return ret;
1273}
1274
1275/**
1276 * do_otp_write - [DEFAULT] Write OTP block area
1277 * @param mtd MTD device structure
1278 * @param from The offset to write
1279 * @param len number of bytes to write
1280 * @param retlen pointer to variable to store the number of write bytes
1281 * @param buf the databuffer to put/get data
1282 *
1283 * Write OTP block area.
1284 */
1285static int do_otp_write(struct mtd_info *mtd, loff_t from, size_t len,
1286 size_t *retlen, u_char *buf)
1287{
1288 struct onenand_chip *this = mtd->priv;
1289 unsigned char *pbuf = buf;
1290 int ret;
1291
1292 /* Force buffer page aligned */
Joern Engel28318772006-05-22 23:18:05 +02001293 if (len < mtd->writesize) {
Kyungmin Park493c6462006-05-12 17:03:07 +03001294 memcpy(this->page_buf, buf, len);
Joern Engel28318772006-05-22 23:18:05 +02001295 memset(this->page_buf + len, 0xff, mtd->writesize - len);
Kyungmin Park493c6462006-05-12 17:03:07 +03001296 pbuf = this->page_buf;
Joern Engel28318772006-05-22 23:18:05 +02001297 len = mtd->writesize;
Kyungmin Park493c6462006-05-12 17:03:07 +03001298 }
1299
1300 /* Enter OTP access mode */
1301 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
1302 this->wait(mtd, FL_OTPING);
1303
1304 ret = mtd->write(mtd, from, len, retlen, pbuf);
1305
1306 /* Exit OTP access mode */
1307 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
1308 this->wait(mtd, FL_RESETING);
1309
1310 return ret;
1311}
1312
1313/**
1314 * do_otp_lock - [DEFAULT] Lock OTP block area
1315 * @param mtd MTD device structure
1316 * @param from The offset to lock
1317 * @param len number of bytes to lock
1318 * @param retlen pointer to variable to store the number of lock bytes
1319 * @param buf the databuffer to put/get data
1320 *
1321 * Lock OTP block area.
1322 */
1323static int do_otp_lock(struct mtd_info *mtd, loff_t from, size_t len,
1324 size_t *retlen, u_char *buf)
1325{
1326 struct onenand_chip *this = mtd->priv;
1327 int ret;
1328
1329 /* Enter OTP access mode */
1330 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
1331 this->wait(mtd, FL_OTPING);
1332
1333 ret = mtd->write_oob(mtd, from, len, retlen, buf);
1334
1335 /* Exit OTP access mode */
1336 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
1337 this->wait(mtd, FL_RESETING);
1338
1339 return ret;
1340}
1341
1342/**
1343 * onenand_otp_walk - [DEFAULT] Handle OTP operation
1344 * @param mtd MTD device structure
1345 * @param from The offset to read/write
1346 * @param len number of bytes to read/write
1347 * @param retlen pointer to variable to store the number of read bytes
1348 * @param buf the databuffer to put/get data
1349 * @param action do given action
1350 * @param mode specify user and factory
1351 *
1352 * Handle OTP operation.
1353 */
1354static int onenand_otp_walk(struct mtd_info *mtd, loff_t from, size_t len,
1355 size_t *retlen, u_char *buf,
1356 otp_op_t action, int mode)
1357{
1358 struct onenand_chip *this = mtd->priv;
1359 int otp_pages;
1360 int density;
1361 int ret = 0;
1362
1363 *retlen = 0;
1364
1365 density = this->device_id >> ONENAND_DEVICE_DENSITY_SHIFT;
1366 if (density < ONENAND_DEVICE_DENSITY_512Mb)
1367 otp_pages = 20;
1368 else
1369 otp_pages = 10;
1370
1371 if (mode == MTD_OTP_FACTORY) {
Joern Engel28318772006-05-22 23:18:05 +02001372 from += mtd->writesize * otp_pages;
Kyungmin Park493c6462006-05-12 17:03:07 +03001373 otp_pages = 64 - otp_pages;
1374 }
1375
1376 /* Check User/Factory boundary */
Joern Engel28318772006-05-22 23:18:05 +02001377 if (((mtd->writesize * otp_pages) - (from + len)) < 0)
Kyungmin Park493c6462006-05-12 17:03:07 +03001378 return 0;
1379
1380 while (len > 0 && otp_pages > 0) {
1381 if (!action) { /* OTP Info functions */
1382 struct otp_info *otpinfo;
1383
1384 len -= sizeof(struct otp_info);
1385 if (len <= 0)
1386 return -ENOSPC;
1387
1388 otpinfo = (struct otp_info *) buf;
1389 otpinfo->start = from;
Joern Engel28318772006-05-22 23:18:05 +02001390 otpinfo->length = mtd->writesize;
Kyungmin Park493c6462006-05-12 17:03:07 +03001391 otpinfo->locked = 0;
1392
Joern Engel28318772006-05-22 23:18:05 +02001393 from += mtd->writesize;
Kyungmin Park493c6462006-05-12 17:03:07 +03001394 buf += sizeof(struct otp_info);
1395 *retlen += sizeof(struct otp_info);
1396 } else {
1397 size_t tmp_retlen;
1398 int size = len;
1399
1400 ret = action(mtd, from, len, &tmp_retlen, buf);
1401
1402 buf += size;
1403 len -= size;
1404 *retlen += size;
1405
1406 if (ret < 0)
1407 return ret;
1408 }
1409 otp_pages--;
1410 }
1411
1412 return 0;
1413}
1414
1415/**
1416 * onenand_get_fact_prot_info - [MTD Interface] Read factory OTP info
1417 * @param mtd MTD device structure
1418 * @param buf the databuffer to put/get data
1419 * @param len number of bytes to read
1420 *
1421 * Read factory OTP info.
1422 */
1423static int onenand_get_fact_prot_info(struct mtd_info *mtd,
1424 struct otp_info *buf, size_t len)
1425{
1426 size_t retlen;
1427 int ret;
1428
1429 ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_FACTORY);
1430
1431 return ret ? : retlen;
1432}
1433
1434/**
1435 * onenand_read_fact_prot_reg - [MTD Interface] Read factory OTP area
1436 * @param mtd MTD device structure
1437 * @param from The offset to read
1438 * @param len number of bytes to read
1439 * @param retlen pointer to variable to store the number of read bytes
1440 * @param buf the databuffer to put/get data
1441 *
1442 * Read factory OTP area.
1443 */
1444static int onenand_read_fact_prot_reg(struct mtd_info *mtd, loff_t from,
1445 size_t len, size_t *retlen, u_char *buf)
1446{
1447 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_FACTORY);
1448}
1449
1450/**
1451 * onenand_get_user_prot_info - [MTD Interface] Read user OTP info
1452 * @param mtd MTD device structure
1453 * @param buf the databuffer to put/get data
1454 * @param len number of bytes to read
1455 *
1456 * Read user OTP info.
1457 */
1458static int onenand_get_user_prot_info(struct mtd_info *mtd,
1459 struct otp_info *buf, size_t len)
1460{
1461 size_t retlen;
1462 int ret;
1463
1464 ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_USER);
1465
1466 return ret ? : retlen;
1467}
1468
1469/**
1470 * onenand_read_user_prot_reg - [MTD Interface] Read user OTP area
1471 * @param mtd MTD device structure
1472 * @param from The offset to read
1473 * @param len number of bytes to read
1474 * @param retlen pointer to variable to store the number of read bytes
1475 * @param buf the databuffer to put/get data
1476 *
1477 * Read user OTP area.
1478 */
1479static int onenand_read_user_prot_reg(struct mtd_info *mtd, loff_t from,
1480 size_t len, size_t *retlen, u_char *buf)
1481{
1482 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_USER);
1483}
1484
1485/**
1486 * onenand_write_user_prot_reg - [MTD Interface] Write user OTP area
1487 * @param mtd MTD device structure
1488 * @param from The offset to write
1489 * @param len number of bytes to write
1490 * @param retlen pointer to variable to store the number of write bytes
1491 * @param buf the databuffer to put/get data
1492 *
1493 * Write user OTP area.
1494 */
1495static int onenand_write_user_prot_reg(struct mtd_info *mtd, loff_t from,
1496 size_t len, size_t *retlen, u_char *buf)
1497{
1498 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_write, MTD_OTP_USER);
1499}
1500
1501/**
1502 * onenand_lock_user_prot_reg - [MTD Interface] Lock user OTP area
1503 * @param mtd MTD device structure
1504 * @param from The offset to lock
1505 * @param len number of bytes to unlock
1506 *
1507 * Write lock mark on spare area in page 0 in OTP block
1508 */
1509static int onenand_lock_user_prot_reg(struct mtd_info *mtd, loff_t from,
1510 size_t len)
1511{
1512 unsigned char oob_buf[64];
1513 size_t retlen;
1514 int ret;
1515
1516 memset(oob_buf, 0xff, mtd->oobsize);
1517 /*
1518 * Note: OTP lock operation
1519 * OTP block : 0xXXFC
1520 * 1st block : 0xXXF3 (If chip support)
1521 * Both : 0xXXF0 (If chip support)
1522 */
1523 oob_buf[ONENAND_OTP_LOCK_OFFSET] = 0xFC;
1524
1525 /*
1526 * Write lock mark to 8th word of sector0 of page0 of the spare0.
1527 * We write 16 bytes spare area instead of 2 bytes.
1528 */
1529 from = 0;
1530 len = 16;
1531
1532 ret = onenand_otp_walk(mtd, from, len, &retlen, oob_buf, do_otp_lock, MTD_OTP_USER);
1533
1534 return ret ? : retlen;
1535}
1536#endif /* CONFIG_MTD_ONENAND_OTP */
1537
Kyungmin Parkcd5f6342005-07-11 11:41:53 +01001538/**
1539 * onenand_print_device_info - Print device ID
1540 * @param device device ID
1541 *
1542 * Print device ID
1543 */
1544static void onenand_print_device_info(int device)
1545{
1546 int vcc, demuxed, ddp, density;
1547
1548 vcc = device & ONENAND_DEVICE_VCC_MASK;
1549 demuxed = device & ONENAND_DEVICE_IS_DEMUX;
1550 ddp = device & ONENAND_DEVICE_IS_DDP;
1551 density = device >> ONENAND_DEVICE_DENSITY_SHIFT;
1552 printk(KERN_INFO "%sOneNAND%s %dMB %sV 16-bit (0x%02x)\n",
1553 demuxed ? "" : "Muxed ",
1554 ddp ? "(DDP)" : "",
1555 (16 << density),
1556 vcc ? "2.65/3.3" : "1.8",
1557 device);
1558}
1559
1560static const struct onenand_manufacturers onenand_manuf_ids[] = {
1561 {ONENAND_MFR_SAMSUNG, "Samsung"},
Kyungmin Parkcd5f6342005-07-11 11:41:53 +01001562};
1563
1564/**
1565 * onenand_check_maf - Check manufacturer ID
1566 * @param manuf manufacturer ID
1567 *
1568 * Check manufacturer ID
1569 */
1570static int onenand_check_maf(int manuf)
1571{
Kyungmin Park37b1cc32005-12-16 11:17:29 +09001572 int size = ARRAY_SIZE(onenand_manuf_ids);
1573 char *name;
Kyungmin Parkcd5f6342005-07-11 11:41:53 +01001574 int i;
1575
Kyungmin Park37b1cc32005-12-16 11:17:29 +09001576 for (i = 0; i < size; i++)
Kyungmin Parkcd5f6342005-07-11 11:41:53 +01001577 if (manuf == onenand_manuf_ids[i].id)
1578 break;
Kyungmin Parkcd5f6342005-07-11 11:41:53 +01001579
Kyungmin Park37b1cc32005-12-16 11:17:29 +09001580 if (i < size)
1581 name = onenand_manuf_ids[i].name;
1582 else
1583 name = "Unknown";
Kyungmin Parkcd5f6342005-07-11 11:41:53 +01001584
Kyungmin Park37b1cc32005-12-16 11:17:29 +09001585 printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n", name, manuf);
1586
1587 return (i == size);
Kyungmin Parkcd5f6342005-07-11 11:41:53 +01001588}
1589
1590/**
1591 * onenand_probe - [OneNAND Interface] Probe the OneNAND device
1592 * @param mtd MTD device structure
1593 *
1594 * OneNAND detection method:
1595 * Compare the the values from command with ones from register
1596 */
1597static int onenand_probe(struct mtd_info *mtd)
1598{
1599 struct onenand_chip *this = mtd->priv;
1600 int bram_maf_id, bram_dev_id, maf_id, dev_id;
1601 int version_id;
1602 int density;
1603
1604 /* Send the command for reading device ID from BootRAM */
1605 this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM);
1606
1607 /* Read manufacturer and device IDs from BootRAM */
1608 bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0);
1609 bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2);
1610
1611 /* Check manufacturer ID */
1612 if (onenand_check_maf(bram_maf_id))
1613 return -ENXIO;
1614
1615 /* Reset OneNAND to read default register values */
1616 this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM);
1617
1618 /* Read manufacturer and device IDs from Register */
1619 maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID);
1620 dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
1621
1622 /* Check OneNAND device */
1623 if (maf_id != bram_maf_id || dev_id != bram_dev_id)
1624 return -ENXIO;
1625
1626 /* Flash device information */
1627 onenand_print_device_info(dev_id);
1628 this->device_id = dev_id;
1629
1630 density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT;
1631 this->chipsize = (16 << density) << 20;
Kyungmin Park83a36832005-09-29 04:53:16 +01001632 /* Set density mask. it is used for DDP */
1633 this->density_mask = (1 << (density + 6));
Kyungmin Parkcd5f6342005-07-11 11:41:53 +01001634
1635 /* OneNAND page size & block size */
1636 /* The data buffer size is equal to page size */
Joern Engel28318772006-05-22 23:18:05 +02001637 mtd->writesize = this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE);
1638 mtd->oobsize = mtd->writesize >> 5;
Kyungmin Parkcd5f6342005-07-11 11:41:53 +01001639 /* Pagers per block is always 64 in OneNAND */
Joern Engel28318772006-05-22 23:18:05 +02001640 mtd->erasesize = mtd->writesize << 6;
Kyungmin Parkcd5f6342005-07-11 11:41:53 +01001641
1642 this->erase_shift = ffs(mtd->erasesize) - 1;
Joern Engel28318772006-05-22 23:18:05 +02001643 this->page_shift = ffs(mtd->writesize) - 1;
Kyungmin Parkcd5f6342005-07-11 11:41:53 +01001644 this->ppb_shift = (this->erase_shift - this->page_shift);
Joern Engel28318772006-05-22 23:18:05 +02001645 this->page_mask = (mtd->erasesize / mtd->writesize) - 1;
Kyungmin Parkcd5f6342005-07-11 11:41:53 +01001646
1647 /* REVIST: Multichip handling */
1648
1649 mtd->size = this->chipsize;
1650
1651 /* Version ID */
1652 version_id = this->read_word(this->base + ONENAND_REG_VERSION_ID);
1653 printk(KERN_DEBUG "OneNAND version = 0x%04x\n", version_id);
1654
1655 /* Lock scheme */
1656 if (density <= ONENAND_DEVICE_DENSITY_512Mb &&
1657 !(version_id >> ONENAND_VERSION_PROCESS_SHIFT)) {
1658 printk(KERN_INFO "Lock scheme is Continues Lock\n");
1659 this->options |= ONENAND_CONT_LOCK;
1660 }
Thomas Gleixnerd5c5e782005-11-07 11:15:51 +00001661
Kyungmin Parkcd5f6342005-07-11 11:41:53 +01001662 return 0;
1663}
1664
Kyungmin Parka41371e2005-09-29 03:55:31 +01001665/**
1666 * onenand_suspend - [MTD Interface] Suspend the OneNAND flash
1667 * @param mtd MTD device structure
1668 */
1669static int onenand_suspend(struct mtd_info *mtd)
1670{
1671 return onenand_get_device(mtd, FL_PM_SUSPENDED);
1672}
1673
1674/**
1675 * onenand_resume - [MTD Interface] Resume the OneNAND flash
1676 * @param mtd MTD device structure
1677 */
1678static void onenand_resume(struct mtd_info *mtd)
1679{
1680 struct onenand_chip *this = mtd->priv;
1681
1682 if (this->state == FL_PM_SUSPENDED)
1683 onenand_release_device(mtd);
1684 else
1685 printk(KERN_ERR "resume() called for the chip which is not"
1686 "in suspended state\n");
1687}
1688
Kyungmin Parkcd5f6342005-07-11 11:41:53 +01001689/**
1690 * onenand_scan - [OneNAND Interface] Scan for the OneNAND device
1691 * @param mtd MTD device structure
1692 * @param maxchips Number of chips to scan for
1693 *
1694 * This fills out all the not initialized function pointers
1695 * with the defaults.
1696 * The flash ID is read and the mtd/chip structures are
1697 * filled with the appropriate values.
1698 */
1699int onenand_scan(struct mtd_info *mtd, int maxchips)
1700{
1701 struct onenand_chip *this = mtd->priv;
1702
1703 if (!this->read_word)
1704 this->read_word = onenand_readw;
1705 if (!this->write_word)
1706 this->write_word = onenand_writew;
1707
1708 if (!this->command)
1709 this->command = onenand_command;
1710 if (!this->wait)
1711 this->wait = onenand_wait;
1712
1713 if (!this->read_bufferram)
1714 this->read_bufferram = onenand_read_bufferram;
1715 if (!this->write_bufferram)
1716 this->write_bufferram = onenand_write_bufferram;
1717
Kyungmin Parkcdc00132005-09-03 07:15:48 +01001718 if (!this->block_markbad)
1719 this->block_markbad = onenand_default_block_markbad;
1720 if (!this->scan_bbt)
1721 this->scan_bbt = onenand_default_bbt;
1722
Kyungmin Parkcd5f6342005-07-11 11:41:53 +01001723 if (onenand_probe(mtd))
1724 return -ENXIO;
1725
Kyungmin Park52b0eea2005-09-03 07:07:19 +01001726 /* Set Sync. Burst Read after probing */
1727 if (this->mmcontrol) {
1728 printk(KERN_INFO "OneNAND Sync. Burst Read support\n");
1729 this->read_bufferram = onenand_sync_read_bufferram;
1730 }
1731
Kyungmin Park532a37c2005-12-16 11:17:29 +09001732 /* Allocate buffers, if necessary */
1733 if (!this->page_buf) {
1734 size_t len;
Joern Engel28318772006-05-22 23:18:05 +02001735 len = mtd->writesize + mtd->oobsize;
Kyungmin Park532a37c2005-12-16 11:17:29 +09001736 this->page_buf = kmalloc(len, GFP_KERNEL);
1737 if (!this->page_buf) {
1738 printk(KERN_ERR "onenand_scan(): Can't allocate page_buf\n");
1739 return -ENOMEM;
1740 }
1741 this->options |= ONENAND_PAGEBUF_ALLOC;
1742 }
1743
Kyungmin Parkcd5f6342005-07-11 11:41:53 +01001744 this->state = FL_READY;
1745 init_waitqueue_head(&this->wq);
1746 spin_lock_init(&this->chip_lock);
1747
1748 switch (mtd->oobsize) {
1749 case 64:
1750 this->autooob = &onenand_oob_64;
1751 break;
1752
1753 case 32:
1754 this->autooob = &onenand_oob_32;
1755 break;
1756
1757 default:
1758 printk(KERN_WARNING "No OOB scheme defined for oobsize %d\n",
1759 mtd->oobsize);
1760 /* To prevent kernel oops */
1761 this->autooob = &onenand_oob_32;
1762 break;
1763 }
1764
1765 memcpy(&mtd->oobinfo, this->autooob, sizeof(mtd->oobinfo));
Thomas Gleixnerd5c5e782005-11-07 11:15:51 +00001766
Kyungmin Parkcd5f6342005-07-11 11:41:53 +01001767 /* Fill in remaining MTD driver data */
1768 mtd->type = MTD_NANDFLASH;
Joern Engel5fa43392006-05-22 23:18:29 +02001769 mtd->flags = MTD_CAP_NANDFLASH;
Kyungmin Parkcd5f6342005-07-11 11:41:53 +01001770 mtd->ecctype = MTD_ECC_SW;
1771 mtd->erase = onenand_erase;
1772 mtd->point = NULL;
1773 mtd->unpoint = NULL;
1774 mtd->read = onenand_read;
1775 mtd->write = onenand_write;
Kyungmin Parkcd5f6342005-07-11 11:41:53 +01001776 mtd->read_oob = onenand_read_oob;
1777 mtd->write_oob = onenand_write_oob;
Kyungmin Park493c6462006-05-12 17:03:07 +03001778#ifdef CONFIG_MTD_ONENAND_OTP
1779 mtd->get_fact_prot_info = onenand_get_fact_prot_info;
1780 mtd->read_fact_prot_reg = onenand_read_fact_prot_reg;
1781 mtd->get_user_prot_info = onenand_get_user_prot_info;
1782 mtd->read_user_prot_reg = onenand_read_user_prot_reg;
1783 mtd->write_user_prot_reg = onenand_write_user_prot_reg;
1784 mtd->lock_user_prot_reg = onenand_lock_user_prot_reg;
1785#endif
Kyungmin Parkcd5f6342005-07-11 11:41:53 +01001786 mtd->sync = onenand_sync;
1787 mtd->lock = NULL;
1788 mtd->unlock = onenand_unlock;
Kyungmin Parka41371e2005-09-29 03:55:31 +01001789 mtd->suspend = onenand_suspend;
1790 mtd->resume = onenand_resume;
Kyungmin Parkcd5f6342005-07-11 11:41:53 +01001791 mtd->block_isbad = onenand_block_isbad;
1792 mtd->block_markbad = onenand_block_markbad;
1793 mtd->owner = THIS_MODULE;
1794
1795 /* Unlock whole block */
1796 mtd->unlock(mtd, 0x0, this->chipsize);
1797
Kyungmin Parkcdc00132005-09-03 07:15:48 +01001798 return this->scan_bbt(mtd);
Kyungmin Parkcd5f6342005-07-11 11:41:53 +01001799}
1800
1801/**
1802 * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device
1803 * @param mtd MTD device structure
1804 */
1805void onenand_release(struct mtd_info *mtd)
1806{
Kyungmin Park532a37c2005-12-16 11:17:29 +09001807 struct onenand_chip *this = mtd->priv;
1808
Kyungmin Parkcd5f6342005-07-11 11:41:53 +01001809#ifdef CONFIG_MTD_PARTITIONS
1810 /* Deregister partitions */
1811 del_mtd_partitions (mtd);
1812#endif
1813 /* Deregister the device */
1814 del_mtd_device (mtd);
Kyungmin Park532a37c2005-12-16 11:17:29 +09001815
1816 /* Free bad block table memory, if allocated */
1817 if (this->bbm)
1818 kfree(this->bbm);
1819 /* Buffer allocated by onenand_scan */
1820 if (this->options & ONENAND_PAGEBUF_ALLOC)
1821 kfree(this->page_buf);
Kyungmin Parkcd5f6342005-07-11 11:41:53 +01001822}
1823
1824EXPORT_SYMBOL_GPL(onenand_scan);
1825EXPORT_SYMBOL_GPL(onenand_release);
1826
1827MODULE_LICENSE("GPL");
1828MODULE_AUTHOR("Kyungmin Park <kyungmin.park@samsung.com>");
1829MODULE_DESCRIPTION("Generic OneNAND flash driver code");