blob: c933e841388421045d908e0147012d0fca0ae670 [file] [log] [blame]
Greg Kroah-Hartmanb2441312017-11-01 15:07:57 +01001// SPDX-License-Identifier: GPL-2.0
Eric Anholt80534f02015-04-16 15:26:45 -07002#include "bcm283x.dtsi"
3
4/ {
5 compatible = "brcm,bcm2836";
6
7 soc {
8 ranges = <0x7e000000 0x3f000000 0x1000000>,
9 <0x40000000 0x40000000 0x00001000>;
10 dma-ranges = <0xc0000000 0x00000000 0x3f000000>;
11
Stefan Wahren808b7de2018-02-24 15:15:21 +010012 local_intc: local_intc@40000000 {
Eric Anholt80534f02015-04-16 15:26:45 -070013 compatible = "brcm,bcm2836-l1-intc";
14 reg = <0x40000000 0x100>;
15 interrupt-controller;
Stefan Wahrenb12f5d02017-12-11 21:39:12 +010016 #interrupt-cells = <2>;
Eric Anholt80534f02015-04-16 15:26:45 -070017 interrupt-parent = <&local_intc>;
18 };
Stefan Wahren29448662018-02-24 15:15:22 +010019 };
Eric Anholt80534f02015-04-16 15:26:45 -070020
Stefan Wahren29448662018-02-24 15:15:22 +010021 arm-pmu {
22 compatible = "arm,cortex-a7-pmu";
23 interrupt-parent = <&local_intc>;
24 interrupts = <9 IRQ_TYPE_LEVEL_HIGH>;
Eric Anholt80534f02015-04-16 15:26:45 -070025 };
26
27 timer {
28 compatible = "arm,armv7-timer";
29 interrupt-parent = <&local_intc>;
Stefan Wahrenb12f5d02017-12-11 21:39:12 +010030 interrupts = <0 IRQ_TYPE_LEVEL_HIGH>, // PHYS_SECURE_PPI
31 <1 IRQ_TYPE_LEVEL_HIGH>, // PHYS_NONSECURE_PPI
32 <3 IRQ_TYPE_LEVEL_HIGH>, // VIRT_PPI
33 <2 IRQ_TYPE_LEVEL_HIGH>; // HYP_PPI
Eric Anholt80534f02015-04-16 15:26:45 -070034 always-on;
35 };
36
37 cpus: cpus {
38 #address-cells = <1>;
39 #size-cells = <0>;
Stefan Wahrenf29c2562017-08-06 17:28:10 +020040 enable-method = "brcm,bcm2836-smp";
Eric Anholt80534f02015-04-16 15:26:45 -070041
42 v7_cpu0: cpu@0 {
43 device_type = "cpu";
44 compatible = "arm,cortex-a7";
45 reg = <0xf00>;
46 clock-frequency = <800000000>;
47 };
48
49 v7_cpu1: cpu@1 {
50 device_type = "cpu";
51 compatible = "arm,cortex-a7";
52 reg = <0xf01>;
53 clock-frequency = <800000000>;
54 };
55
56 v7_cpu2: cpu@2 {
57 device_type = "cpu";
58 compatible = "arm,cortex-a7";
59 reg = <0xf02>;
60 clock-frequency = <800000000>;
61 };
62
63 v7_cpu3: cpu@3 {
64 device_type = "cpu";
65 compatible = "arm,cortex-a7";
66 reg = <0xf03>;
67 clock-frequency = <800000000>;
68 };
69 };
70};
71
72/* Make the BCM2835-style global interrupt controller be a child of the
73 * CPU-local interrupt controller.
74 */
75&intc {
76 compatible = "brcm,bcm2836-armctrl-ic";
77 reg = <0x7e00b200 0x200>;
78 interrupt-parent = <&local_intc>;
Stefan Wahrenb12f5d02017-12-11 21:39:12 +010079 interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
Eric Anholt80534f02015-04-16 15:26:45 -070080};
Martin Sperl43bac412016-11-02 10:18:23 +000081
Stefan Wahren0fe4d212017-03-31 20:03:04 +000082&cpu_thermal {
83 coefficients = <(-538) 407000>;
84};
85
Martin Sperl43bac412016-11-02 10:18:23 +000086/* enable thermal sensor with the correct compatible property set */
87&thermal {
88 compatible = "brcm,bcm2836-thermal";
89 status = "okay";
90};