Thomas Gleixner | ec8f24b | 2019-05-19 13:07:45 +0100 | [diff] [blame] | 1 | # SPDX-License-Identifier: GPL-2.0-only |
Srinivas Pandruvada | 75d2364 | 2013-10-11 16:54:56 -0700 | [diff] [blame] | 2 | # |
| 3 | # Generic power capping sysfs interface configuration |
| 4 | # |
| 5 | |
| 6 | menuconfig POWERCAP |
| 7 | bool "Generic powercap sysfs driver" |
| 8 | help |
| 9 | The power capping sysfs interface allows kernel subsystems to expose power |
| 10 | capping settings to user space in a consistent way. Usually, it consists |
| 11 | of multiple control types that determine which settings may be exposed and |
| 12 | power zones representing parts of the system that can be subject to power |
| 13 | capping. |
| 14 | |
| 15 | If you want this code to be compiled in, say Y here. |
| 16 | |
| 17 | if POWERCAP |
| 18 | # Client driver configurations go here. |
Zhang Rui | 3382388 | 2019-07-10 21:44:30 +0800 | [diff] [blame] | 19 | config INTEL_RAPL_CORE |
| 20 | tristate |
| 21 | |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 22 | config INTEL_RAPL |
Zhang Rui | 3382388 | 2019-07-10 21:44:30 +0800 | [diff] [blame] | 23 | tristate "Intel RAPL Support via MSR Interface" |
Jacob Pan | 24b5984 | 2014-11-12 10:50:36 -0800 | [diff] [blame] | 24 | depends on X86 && IOSF_MBI |
Zhang Rui | 3382388 | 2019-07-10 21:44:30 +0800 | [diff] [blame] | 25 | select INTEL_RAPL_CORE |
Masahiro Yamada | a7f7f62 | 2020-06-14 01:50:22 +0900 | [diff] [blame] | 26 | help |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 27 | This enables support for the Intel Running Average Power Limit (RAPL) |
Zhang Rui | 3382388 | 2019-07-10 21:44:30 +0800 | [diff] [blame] | 28 | technology via MSR interface, which allows power limits to be enforced |
| 29 | and monitored on modern Intel processors (Sandy Bridge and later). |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 30 | |
| 31 | In RAPL, the platform level settings are divided into domains for |
| 32 | fine grained control. These domains include processor package, DRAM |
Hubert Jasudowicz | f8fee6e | 2020-10-18 17:21:06 +0200 | [diff] [blame] | 33 | controller, CPU core (Power Plane 0), graphics uncore (Power Plane |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 34 | 1), etc. |
Srinivas Pandruvada | 75d2364 | 2013-10-11 16:54:56 -0700 | [diff] [blame] | 35 | |
Daniel Lezcano | 88763a5 | 2018-06-26 12:53:29 +0200 | [diff] [blame] | 36 | config IDLE_INJECT |
| 37 | bool "Idle injection framework" |
| 38 | depends on CPU_IDLE |
| 39 | default n |
| 40 | help |
| 41 | This enables support for the idle injection framework. It |
| 42 | provides a way to force idle periods on a set of specified |
| 43 | CPUs for power capping. Idle period can be injected |
| 44 | synchronously on a set of specified CPUs or alternatively |
| 45 | on a per CPU basis. |
Daniel Lezcano | 082e8dc | 2020-12-08 17:41:44 +0100 | [diff] [blame] | 46 | |
| 47 | config DTPM |
Daniel Lezcano | 60d643c | 2021-02-24 19:30:22 +0100 | [diff] [blame] | 48 | bool "Power capping for Dynamic Thermal Power Management (EXPERIMENTAL)" |
Daniel Lezcano | 082e8dc | 2020-12-08 17:41:44 +0100 | [diff] [blame] | 49 | help |
| 50 | This enables support for the power capping for the dynamic |
| 51 | thermal power management userspace engine. |
Daniel Lezcano | 7f17016 | 2020-12-08 17:41:45 +0100 | [diff] [blame] | 52 | |
| 53 | config DTPM_CPU |
| 54 | bool "Add CPU power capping based on the energy model" |
| 55 | depends on DTPM && ENERGY_MODEL |
| 56 | help |
| 57 | This enables support for CPU power limitation based on |
| 58 | energy model. |
Srinivas Pandruvada | 75d2364 | 2013-10-11 16:54:56 -0700 | [diff] [blame] | 59 | endif |