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Catalin Marinas0aea86a2012-03-05 11:49:32 +00001/*
2 * Based on arch/arm/include/asm/uaccess.h
3 *
4 * Copyright (C) 2012 ARM Ltd.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program. If not, see <http://www.gnu.org/licenses/>.
17 */
18#ifndef __ASM_UACCESS_H
19#define __ASM_UACCESS_H
20
Catalin Marinasbd389672016-07-01 14:58:21 +010021#include <asm/alternative.h>
Catalin Marinas4b65a5d2016-07-01 16:53:00 +010022#include <asm/kernel-pgtable.h>
Catalin Marinasbd389672016-07-01 14:58:21 +010023#include <asm/sysreg.h>
24
Catalin Marinas0aea86a2012-03-05 11:49:32 +000025/*
26 * User space memory access functions
27 */
Andre Przywara87261d12016-10-19 14:40:54 +010028#include <linux/bitops.h>
Yang Shibffe1ba2016-06-08 14:40:56 -070029#include <linux/kasan-checks.h>
Catalin Marinas0aea86a2012-03-05 11:49:32 +000030#include <linux/string.h>
31#include <linux/thread_info.h>
32
James Morse338d4f42015-07-22 19:05:54 +010033#include <asm/cpufeature.h>
Catalin Marinas0aea86a2012-03-05 11:49:32 +000034#include <asm/ptrace.h>
35#include <asm/errno.h>
36#include <asm/memory.h>
37#include <asm/compiler.h>
38
39#define VERIFY_READ 0
40#define VERIFY_WRITE 1
41
42/*
Ard Biesheuvel6c94f272016-01-01 15:02:12 +010043 * The exception table consists of pairs of relative offsets: the first
44 * is the relative offset to an instruction that is allowed to fault,
45 * and the second is the relative offset at which the program should
46 * continue. No registers are modified, so it is entirely up to the
47 * continuation code to figure out what to do.
Catalin Marinas0aea86a2012-03-05 11:49:32 +000048 *
49 * All the routines below use bits of fixup code that are out of line
50 * with the main instruction path. This means when everything is well,
51 * we don't even have to jump over them. Further, they do not intrude
52 * on our cache or tlb entries.
53 */
54
55struct exception_table_entry
56{
Ard Biesheuvel6c94f272016-01-01 15:02:12 +010057 int insn, fixup;
Catalin Marinas0aea86a2012-03-05 11:49:32 +000058};
59
Ard Biesheuvel6c94f272016-01-01 15:02:12 +010060#define ARCH_HAS_RELATIVE_EXTABLE
61
Catalin Marinas0aea86a2012-03-05 11:49:32 +000062extern int fixup_exception(struct pt_regs *regs);
63
64#define KERNEL_DS (-1UL)
65#define get_ds() (KERNEL_DS)
66
67#define USER_DS TASK_SIZE_64
68#define get_fs() (current_thread_info()->addr_limit)
69
70static inline void set_fs(mm_segment_t fs)
71{
72 current_thread_info()->addr_limit = fs;
James Morse57f49592016-02-05 14:58:48 +000073
74 /*
75 * Enable/disable UAO so that copy_to_user() etc can access
76 * kernel memory with the unprivileged instructions.
77 */
78 if (IS_ENABLED(CONFIG_ARM64_UAO) && fs == KERNEL_DS)
79 asm(ALTERNATIVE("nop", SET_PSTATE_UAO(1), ARM64_HAS_UAO));
80 else
81 asm(ALTERNATIVE("nop", SET_PSTATE_UAO(0), ARM64_HAS_UAO,
82 CONFIG_ARM64_UAO));
Catalin Marinas0aea86a2012-03-05 11:49:32 +000083}
84
Michael S. Tsirkin967f0e52015-01-06 15:11:13 +020085#define segment_eq(a, b) ((a) == (b))
Catalin Marinas0aea86a2012-03-05 11:49:32 +000086
87/*
Catalin Marinas0aea86a2012-03-05 11:49:32 +000088 * Test whether a block of memory is a valid user space address.
89 * Returns 1 if the range is valid, 0 otherwise.
90 *
91 * This is equivalent to the following test:
Christopher Covington31b1e942014-03-19 16:29:37 +000092 * (u65)addr + (u65)size <= current->addr_limit
Catalin Marinas0aea86a2012-03-05 11:49:32 +000093 *
94 * This needs 65-bit arithmetic.
95 */
96#define __range_ok(addr, size) \
97({ \
98 unsigned long flag, roksum; \
99 __chk_user_ptr(addr); \
Christopher Covington31b1e942014-03-19 16:29:37 +0000100 asm("adds %1, %1, %3; ccmp %1, %4, #2, cc; cset %0, ls" \
Catalin Marinas0aea86a2012-03-05 11:49:32 +0000101 : "=&r" (flag), "=&r" (roksum) \
102 : "1" (addr), "Ir" (size), \
103 "r" (current_thread_info()->addr_limit) \
104 : "cc"); \
105 flag; \
106})
107
Andre Przywara87261d12016-10-19 14:40:54 +0100108/*
Kristina Martsenko7dcd9dd82017-05-03 16:37:46 +0100109 * When dealing with data aborts, watchpoints, or instruction traps we may end
110 * up with a tagged userland pointer. Clear the tag to get a sane pointer to
111 * pass on to access_ok(), for instance.
Andre Przywara87261d12016-10-19 14:40:54 +0100112 */
113#define untagged_addr(addr) sign_extend64(addr, 55)
114
Catalin Marinas0aea86a2012-03-05 11:49:32 +0000115#define access_ok(type, addr, size) __range_ok(addr, size)
Will Deacon12a0ef72013-11-06 17:20:22 +0000116#define user_addr_max get_fs
Catalin Marinas0aea86a2012-03-05 11:49:32 +0000117
Ard Biesheuvel6c94f272016-01-01 15:02:12 +0100118#define _ASM_EXTABLE(from, to) \
119 " .pushsection __ex_table, \"a\"\n" \
120 " .align 3\n" \
121 " .long (" #from " - .), (" #to " - .)\n" \
122 " .popsection\n"
123
Catalin Marinas0aea86a2012-03-05 11:49:32 +0000124/*
Catalin Marinasbd389672016-07-01 14:58:21 +0100125 * User access enabling/disabling.
126 */
Catalin Marinas4b65a5d2016-07-01 16:53:00 +0100127#ifdef CONFIG_ARM64_SW_TTBR0_PAN
128static inline void __uaccess_ttbr0_disable(void)
129{
130 unsigned long ttbr;
131
132 /* reserved_ttbr0 placed at the end of swapper_pg_dir */
133 ttbr = read_sysreg(ttbr1_el1) + SWAPPER_DIR_SIZE;
134 write_sysreg(ttbr, ttbr0_el1);
135 isb();
136}
137
138static inline void __uaccess_ttbr0_enable(void)
139{
140 unsigned long flags;
141
142 /*
143 * Disable interrupts to avoid preemption between reading the 'ttbr0'
144 * variable and the MSR. A context switch could trigger an ASID
145 * roll-over and an update of 'ttbr0'.
146 */
147 local_irq_save(flags);
148 write_sysreg(current_thread_info()->ttbr0, ttbr0_el1);
149 isb();
150 local_irq_restore(flags);
151}
152
153static inline bool uaccess_ttbr0_disable(void)
154{
155 if (!system_uses_ttbr0_pan())
156 return false;
157 __uaccess_ttbr0_disable();
158 return true;
159}
160
161static inline bool uaccess_ttbr0_enable(void)
162{
163 if (!system_uses_ttbr0_pan())
164 return false;
165 __uaccess_ttbr0_enable();
166 return true;
167}
168#else
169static inline bool uaccess_ttbr0_disable(void)
170{
171 return false;
172}
173
174static inline bool uaccess_ttbr0_enable(void)
175{
176 return false;
177}
178#endif
179
Catalin Marinasbd389672016-07-01 14:58:21 +0100180#define __uaccess_disable(alt) \
181do { \
Catalin Marinas4b65a5d2016-07-01 16:53:00 +0100182 if (!uaccess_ttbr0_disable()) \
183 asm(ALTERNATIVE("nop", SET_PSTATE_PAN(1), alt, \
184 CONFIG_ARM64_PAN)); \
Catalin Marinasbd389672016-07-01 14:58:21 +0100185} while (0)
186
187#define __uaccess_enable(alt) \
188do { \
Marc Zyngier75037122016-12-12 13:50:26 +0000189 if (!uaccess_ttbr0_enable()) \
Catalin Marinas4b65a5d2016-07-01 16:53:00 +0100190 asm(ALTERNATIVE("nop", SET_PSTATE_PAN(0), alt, \
191 CONFIG_ARM64_PAN)); \
Catalin Marinasbd389672016-07-01 14:58:21 +0100192} while (0)
193
194static inline void uaccess_disable(void)
195{
196 __uaccess_disable(ARM64_HAS_PAN);
197}
198
199static inline void uaccess_enable(void)
200{
201 __uaccess_enable(ARM64_HAS_PAN);
202}
203
204/*
205 * These functions are no-ops when UAO is present.
206 */
207static inline void uaccess_disable_not_uao(void)
208{
209 __uaccess_disable(ARM64_ALT_PAN_NOT_UAO);
210}
211
212static inline void uaccess_enable_not_uao(void)
213{
214 __uaccess_enable(ARM64_ALT_PAN_NOT_UAO);
215}
216
217/*
Catalin Marinas0aea86a2012-03-05 11:49:32 +0000218 * The "__xxx" versions of the user access functions do not verify the address
219 * space - it must have been done previously with a separate "access_ok()"
220 * call.
221 *
222 * The "__xxx_error" versions set the third argument to -EFAULT if an error
223 * occurs, and leave it unchanged on success.
224 */
James Morse57f49592016-02-05 14:58:48 +0000225#define __get_user_asm(instr, alt_instr, reg, x, addr, err, feature) \
Catalin Marinas0aea86a2012-03-05 11:49:32 +0000226 asm volatile( \
James Morse57f49592016-02-05 14:58:48 +0000227 "1:"ALTERNATIVE(instr " " reg "1, [%2]\n", \
228 alt_instr " " reg "1, [%2]\n", feature) \
Catalin Marinas0aea86a2012-03-05 11:49:32 +0000229 "2:\n" \
230 " .section .fixup, \"ax\"\n" \
231 " .align 2\n" \
232 "3: mov %w0, %3\n" \
233 " mov %1, #0\n" \
234 " b 2b\n" \
235 " .previous\n" \
Ard Biesheuvel6c94f272016-01-01 15:02:12 +0100236 _ASM_EXTABLE(1b, 3b) \
Catalin Marinas0aea86a2012-03-05 11:49:32 +0000237 : "+r" (err), "=&r" (x) \
238 : "r" (addr), "i" (-EFAULT))
239
240#define __get_user_err(x, ptr, err) \
241do { \
242 unsigned long __gu_val; \
243 __chk_user_ptr(ptr); \
Catalin Marinasbd389672016-07-01 14:58:21 +0100244 uaccess_enable_not_uao(); \
Catalin Marinas0aea86a2012-03-05 11:49:32 +0000245 switch (sizeof(*(ptr))) { \
246 case 1: \
James Morse57f49592016-02-05 14:58:48 +0000247 __get_user_asm("ldrb", "ldtrb", "%w", __gu_val, (ptr), \
248 (err), ARM64_HAS_UAO); \
Catalin Marinas0aea86a2012-03-05 11:49:32 +0000249 break; \
250 case 2: \
James Morse57f49592016-02-05 14:58:48 +0000251 __get_user_asm("ldrh", "ldtrh", "%w", __gu_val, (ptr), \
252 (err), ARM64_HAS_UAO); \
Catalin Marinas0aea86a2012-03-05 11:49:32 +0000253 break; \
254 case 4: \
James Morse57f49592016-02-05 14:58:48 +0000255 __get_user_asm("ldr", "ldtr", "%w", __gu_val, (ptr), \
256 (err), ARM64_HAS_UAO); \
Catalin Marinas0aea86a2012-03-05 11:49:32 +0000257 break; \
258 case 8: \
James Morse57f49592016-02-05 14:58:48 +0000259 __get_user_asm("ldr", "ldtr", "%", __gu_val, (ptr), \
260 (err), ARM64_HAS_UAO); \
Catalin Marinas0aea86a2012-03-05 11:49:32 +0000261 break; \
262 default: \
263 BUILD_BUG(); \
264 } \
Catalin Marinasbd389672016-07-01 14:58:21 +0100265 uaccess_disable_not_uao(); \
Michael S. Tsirkin58fff512014-12-12 01:56:04 +0200266 (x) = (__force __typeof__(*(ptr)))__gu_val; \
Catalin Marinas0aea86a2012-03-05 11:49:32 +0000267} while (0)
268
269#define __get_user(x, ptr) \
270({ \
271 int __gu_err = 0; \
272 __get_user_err((x), (ptr), __gu_err); \
273 __gu_err; \
274})
275
276#define __get_user_error(x, ptr, err) \
277({ \
278 __get_user_err((x), (ptr), (err)); \
279 (void)0; \
280})
281
282#define __get_user_unaligned __get_user
283
284#define get_user(x, ptr) \
285({ \
AKASHI Takahiro1f65c132013-09-24 10:00:50 +0100286 __typeof__(*(ptr)) __user *__p = (ptr); \
Michael S. Tsirkin56d2ef72013-05-26 17:30:42 +0300287 might_fault(); \
AKASHI Takahiro1f65c132013-09-24 10:00:50 +0100288 access_ok(VERIFY_READ, __p, sizeof(*__p)) ? \
289 __get_user((x), __p) : \
Catalin Marinas0aea86a2012-03-05 11:49:32 +0000290 ((x) = 0, -EFAULT); \
291})
292
James Morse57f49592016-02-05 14:58:48 +0000293#define __put_user_asm(instr, alt_instr, reg, x, addr, err, feature) \
Catalin Marinas0aea86a2012-03-05 11:49:32 +0000294 asm volatile( \
James Morse57f49592016-02-05 14:58:48 +0000295 "1:"ALTERNATIVE(instr " " reg "1, [%2]\n", \
296 alt_instr " " reg "1, [%2]\n", feature) \
Catalin Marinas0aea86a2012-03-05 11:49:32 +0000297 "2:\n" \
298 " .section .fixup,\"ax\"\n" \
299 " .align 2\n" \
300 "3: mov %w0, %3\n" \
301 " b 2b\n" \
302 " .previous\n" \
Ard Biesheuvel6c94f272016-01-01 15:02:12 +0100303 _ASM_EXTABLE(1b, 3b) \
Catalin Marinas0aea86a2012-03-05 11:49:32 +0000304 : "+r" (err) \
305 : "r" (x), "r" (addr), "i" (-EFAULT))
306
307#define __put_user_err(x, ptr, err) \
308do { \
309 __typeof__(*(ptr)) __pu_val = (x); \
310 __chk_user_ptr(ptr); \
Catalin Marinasbd389672016-07-01 14:58:21 +0100311 uaccess_enable_not_uao(); \
Catalin Marinas0aea86a2012-03-05 11:49:32 +0000312 switch (sizeof(*(ptr))) { \
313 case 1: \
James Morse57f49592016-02-05 14:58:48 +0000314 __put_user_asm("strb", "sttrb", "%w", __pu_val, (ptr), \
315 (err), ARM64_HAS_UAO); \
Catalin Marinas0aea86a2012-03-05 11:49:32 +0000316 break; \
317 case 2: \
James Morse57f49592016-02-05 14:58:48 +0000318 __put_user_asm("strh", "sttrh", "%w", __pu_val, (ptr), \
319 (err), ARM64_HAS_UAO); \
Catalin Marinas0aea86a2012-03-05 11:49:32 +0000320 break; \
321 case 4: \
James Morse57f49592016-02-05 14:58:48 +0000322 __put_user_asm("str", "sttr", "%w", __pu_val, (ptr), \
323 (err), ARM64_HAS_UAO); \
Catalin Marinas0aea86a2012-03-05 11:49:32 +0000324 break; \
325 case 8: \
James Morse57f49592016-02-05 14:58:48 +0000326 __put_user_asm("str", "sttr", "%", __pu_val, (ptr), \
327 (err), ARM64_HAS_UAO); \
Catalin Marinas0aea86a2012-03-05 11:49:32 +0000328 break; \
329 default: \
330 BUILD_BUG(); \
331 } \
Catalin Marinasbd389672016-07-01 14:58:21 +0100332 uaccess_disable_not_uao(); \
Catalin Marinas0aea86a2012-03-05 11:49:32 +0000333} while (0)
334
335#define __put_user(x, ptr) \
336({ \
337 int __pu_err = 0; \
338 __put_user_err((x), (ptr), __pu_err); \
339 __pu_err; \
340})
341
342#define __put_user_error(x, ptr, err) \
343({ \
344 __put_user_err((x), (ptr), (err)); \
345 (void)0; \
346})
347
348#define __put_user_unaligned __put_user
349
350#define put_user(x, ptr) \
351({ \
AKASHI Takahiro1f65c132013-09-24 10:00:50 +0100352 __typeof__(*(ptr)) __user *__p = (ptr); \
Michael S. Tsirkin56d2ef72013-05-26 17:30:42 +0300353 might_fault(); \
AKASHI Takahiro1f65c132013-09-24 10:00:50 +0100354 access_ok(VERIFY_WRITE, __p, sizeof(*__p)) ? \
355 __put_user((x), __p) : \
Catalin Marinas0aea86a2012-03-05 11:49:32 +0000356 -EFAULT; \
357})
358
Yang Shibffe1ba2016-06-08 14:40:56 -0700359extern unsigned long __must_check __arch_copy_from_user(void *to, const void __user *from, unsigned long n);
360extern unsigned long __must_check __arch_copy_to_user(void __user *to, const void *from, unsigned long n);
Catalin Marinas0aea86a2012-03-05 11:49:32 +0000361extern unsigned long __must_check __copy_in_user(void __user *to, const void __user *from, unsigned long n);
362extern unsigned long __must_check __clear_user(void __user *addr, unsigned long n);
363
Yang Shibffe1ba2016-06-08 14:40:56 -0700364static inline unsigned long __must_check __copy_from_user(void *to, const void __user *from, unsigned long n)
365{
366 kasan_check_write(to, n);
Kees Cookfaf5b632016-06-23 15:59:42 -0700367 check_object_size(to, n, false);
368 return __arch_copy_from_user(to, from, n);
Yang Shibffe1ba2016-06-08 14:40:56 -0700369}
370
371static inline unsigned long __must_check __copy_to_user(void __user *to, const void *from, unsigned long n)
372{
373 kasan_check_read(from, n);
Kees Cookfaf5b632016-06-23 15:59:42 -0700374 check_object_size(from, n, true);
375 return __arch_copy_to_user(to, from, n);
Yang Shibffe1ba2016-06-08 14:40:56 -0700376}
377
Catalin Marinas0aea86a2012-03-05 11:49:32 +0000378static inline unsigned long __must_check copy_from_user(void *to, const void __user *from, unsigned long n)
379{
Al Viro4855bd22016-09-10 16:50:00 -0400380 unsigned long res = n;
Yang Shibffe1ba2016-06-08 14:40:56 -0700381 kasan_check_write(to, n);
Mark Rutland76624172017-02-07 12:33:55 +0000382 check_object_size(to, n, false);
Yang Shibffe1ba2016-06-08 14:40:56 -0700383
Kees Cookfaf5b632016-06-23 15:59:42 -0700384 if (access_ok(VERIFY_READ, from, n)) {
Al Viro4855bd22016-09-10 16:50:00 -0400385 res = __arch_copy_from_user(to, from, n);
386 }
387 if (unlikely(res))
388 memset(to + (n - res), 0, res);
389 return res;
Catalin Marinas0aea86a2012-03-05 11:49:32 +0000390}
391
392static inline unsigned long __must_check copy_to_user(void __user *to, const void *from, unsigned long n)
393{
Yang Shibffe1ba2016-06-08 14:40:56 -0700394 kasan_check_read(from, n);
Mark Rutland76624172017-02-07 12:33:55 +0000395 check_object_size(from, n, true);
Yang Shibffe1ba2016-06-08 14:40:56 -0700396
Kees Cookfaf5b632016-06-23 15:59:42 -0700397 if (access_ok(VERIFY_WRITE, to, n)) {
Yang Shibffe1ba2016-06-08 14:40:56 -0700398 n = __arch_copy_to_user(to, from, n);
Kees Cookfaf5b632016-06-23 15:59:42 -0700399 }
Catalin Marinas0aea86a2012-03-05 11:49:32 +0000400 return n;
401}
402
403static inline unsigned long __must_check copy_in_user(void __user *to, const void __user *from, unsigned long n)
404{
405 if (access_ok(VERIFY_READ, from, n) && access_ok(VERIFY_WRITE, to, n))
406 n = __copy_in_user(to, from, n);
407 return n;
408}
409
410#define __copy_to_user_inatomic __copy_to_user
411#define __copy_from_user_inatomic __copy_from_user
412
413static inline unsigned long __must_check clear_user(void __user *to, unsigned long n)
414{
415 if (access_ok(VERIFY_WRITE, to, n))
416 n = __clear_user(to, n);
417 return n;
418}
419
Will Deacon12a0ef72013-11-06 17:20:22 +0000420extern long strncpy_from_user(char *dest, const char __user *src, long count);
Catalin Marinas0aea86a2012-03-05 11:49:32 +0000421
Will Deacon12a0ef72013-11-06 17:20:22 +0000422extern __must_check long strlen_user(const char __user *str);
423extern __must_check long strnlen_user(const char __user *str, long n);
Catalin Marinas0aea86a2012-03-05 11:49:32 +0000424
Catalin Marinas0aea86a2012-03-05 11:49:32 +0000425#endif /* __ASM_UACCESS_H */