Thomas Gleixner | 1802d0b | 2019-05-27 08:55:21 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Honghui Zhang | 9ca340c | 2016-06-08 17:50:58 +0800 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (c) 2015-2016 MediaTek Inc. |
| 4 | * Author: Honghui Zhang <honghui.zhang@mediatek.com> |
Honghui Zhang | 9ca340c | 2016-06-08 17:50:58 +0800 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #ifndef _MTK_IOMMU_H_ |
| 8 | #define _MTK_IOMMU_H_ |
| 9 | |
| 10 | #include <linux/clk.h> |
| 11 | #include <linux/component.h> |
| 12 | #include <linux/device.h> |
| 13 | #include <linux/io.h> |
Rob Herring | b77cf11 | 2019-02-05 10:37:31 -0600 | [diff] [blame] | 14 | #include <linux/io-pgtable.h> |
Honghui Zhang | 9ca340c | 2016-06-08 17:50:58 +0800 | [diff] [blame] | 15 | #include <linux/iommu.h> |
| 16 | #include <linux/list.h> |
| 17 | #include <linux/spinlock.h> |
Joerg Roedel | 397e18b | 2020-07-13 12:16:48 +0200 | [diff] [blame] | 18 | #include <linux/dma-mapping.h> |
Honghui Zhang | 9ca340c | 2016-06-08 17:50:58 +0800 | [diff] [blame] | 19 | #include <soc/mediatek/smi.h> |
| 20 | |
Chao Hao | 37276e0 | 2020-07-03 12:41:23 +0800 | [diff] [blame] | 21 | #define MTK_LARB_COM_MAX 8 |
| 22 | #define MTK_LARB_SUBCOM_MAX 4 |
| 23 | |
Honghui Zhang | 9ca340c | 2016-06-08 17:50:58 +0800 | [diff] [blame] | 24 | struct mtk_iommu_suspend_reg { |
Chao Hao | 75eed35 | 2020-07-03 12:41:19 +0800 | [diff] [blame] | 25 | union { |
| 26 | u32 standard_axi_mode;/* v1 */ |
| 27 | u32 misc_ctrl;/* v2 */ |
| 28 | }; |
Honghui Zhang | 9ca340c | 2016-06-08 17:50:58 +0800 | [diff] [blame] | 29 | u32 dcm_dis; |
| 30 | u32 ctrl_reg; |
| 31 | u32 int_control0; |
| 32 | u32 int_main_control; |
Yong Wu | 70ca608 | 2018-03-18 09:52:54 +0800 | [diff] [blame] | 33 | u32 ivrp_paddr; |
Yong Wu | b9475b3 | 2019-08-24 11:02:06 +0800 | [diff] [blame] | 34 | u32 vld_pa_rng; |
Chao Hao | 35c1b48 | 2020-07-03 12:41:24 +0800 | [diff] [blame] | 35 | u32 wr_len_ctrl; |
Honghui Zhang | 9ca340c | 2016-06-08 17:50:58 +0800 | [diff] [blame] | 36 | }; |
| 37 | |
Yong Wu | e6dec92 | 2017-08-21 19:00:16 +0800 | [diff] [blame] | 38 | enum mtk_iommu_plat { |
| 39 | M4U_MT2701, |
| 40 | M4U_MT2712, |
Chao Hao | 068c86e | 2020-07-03 12:41:27 +0800 | [diff] [blame] | 41 | M4U_MT6779, |
Fabien Parent | 3c21356 | 2020-09-07 12:16:49 +0200 | [diff] [blame] | 42 | M4U_MT8167, |
Yong Wu | e6dec92 | 2017-08-21 19:00:16 +0800 | [diff] [blame] | 43 | M4U_MT8173, |
Yong Wu | 907ba6a | 2019-08-24 11:02:02 +0800 | [diff] [blame] | 44 | M4U_MT8183, |
Yong Wu | e6dec92 | 2017-08-21 19:00:16 +0800 | [diff] [blame] | 45 | }; |
| 46 | |
Yong Wu | cecdce9 | 2019-08-24 11:01:47 +0800 | [diff] [blame] | 47 | struct mtk_iommu_plat_data { |
| 48 | enum mtk_iommu_plat m4u_plat; |
Chao Hao | 6b71779 | 2020-07-03 12:41:20 +0800 | [diff] [blame] | 49 | u32 flags; |
Chao Hao | b053bc7 | 2020-07-03 12:41:22 +0800 | [diff] [blame] | 50 | u32 inv_sel_reg; |
Chao Hao | 37276e0 | 2020-07-03 12:41:23 +0800 | [diff] [blame] | 51 | unsigned char larbid_remap[MTK_LARB_COM_MAX][MTK_LARB_SUBCOM_MAX]; |
Yong Wu | cecdce9 | 2019-08-24 11:01:47 +0800 | [diff] [blame] | 52 | }; |
| 53 | |
Honghui Zhang | 9ca340c | 2016-06-08 17:50:58 +0800 | [diff] [blame] | 54 | struct mtk_iommu_domain; |
| 55 | |
| 56 | struct mtk_iommu_data { |
| 57 | void __iomem *base; |
| 58 | int irq; |
| 59 | struct device *dev; |
| 60 | struct clk *bclk; |
| 61 | phys_addr_t protect_base; /* protect memory base */ |
| 62 | struct mtk_iommu_suspend_reg reg; |
| 63 | struct mtk_iommu_domain *m4u_dom; |
| 64 | struct iommu_group *m4u_group; |
Honghui Zhang | 9ca340c | 2016-06-08 17:50:58 +0800 | [diff] [blame] | 65 | bool enable_4GB; |
Yong Wu | da3cc91 | 2019-11-04 15:01:03 +0800 | [diff] [blame] | 66 | spinlock_t tlb_lock; /* lock for tlb range flush */ |
Joerg Roedel | b16c017 | 2017-02-03 12:57:32 +0100 | [diff] [blame] | 67 | |
| 68 | struct iommu_device iommu; |
Yong Wu | cecdce9 | 2019-08-24 11:01:47 +0800 | [diff] [blame] | 69 | const struct mtk_iommu_plat_data *plat_data; |
Yong Wu | 7c3a2ec | 2017-08-21 19:00:17 +0800 | [diff] [blame] | 70 | |
Joerg Roedel | 5896017 | 2020-06-25 15:08:31 +0200 | [diff] [blame] | 71 | struct dma_iommu_mapping *mapping; /* For mtk_iommu_v1.c */ |
| 72 | |
Yong Wu | 7c3a2ec | 2017-08-21 19:00:17 +0800 | [diff] [blame] | 73 | struct list_head list; |
Yong Wu | 1ee9feb | 2019-08-24 11:02:08 +0800 | [diff] [blame] | 74 | struct mtk_smi_larb_iommu larb_imu[MTK_LARB_NR_MAX]; |
Honghui Zhang | 9ca340c | 2016-06-08 17:50:58 +0800 | [diff] [blame] | 75 | }; |
| 76 | |
Joerg Roedel | 9a8a5dc | 2016-08-09 15:46:46 +0200 | [diff] [blame] | 77 | static inline int compare_of(struct device *dev, void *data) |
Honghui Zhang | 9ca340c | 2016-06-08 17:50:58 +0800 | [diff] [blame] | 78 | { |
| 79 | return dev->of_node == data; |
| 80 | } |
| 81 | |
Russell King | 00c7c81 | 2016-10-19 11:30:34 +0100 | [diff] [blame] | 82 | static inline void release_of(struct device *dev, void *data) |
| 83 | { |
| 84 | of_node_put(data); |
| 85 | } |
| 86 | |
Joerg Roedel | 9a8a5dc | 2016-08-09 15:46:46 +0200 | [diff] [blame] | 87 | static inline int mtk_iommu_bind(struct device *dev) |
Honghui Zhang | 9ca340c | 2016-06-08 17:50:58 +0800 | [diff] [blame] | 88 | { |
| 89 | struct mtk_iommu_data *data = dev_get_drvdata(dev); |
| 90 | |
Yong Wu | 1ee9feb | 2019-08-24 11:02:08 +0800 | [diff] [blame] | 91 | return component_bind_all(dev, &data->larb_imu); |
Honghui Zhang | 9ca340c | 2016-06-08 17:50:58 +0800 | [diff] [blame] | 92 | } |
| 93 | |
Joerg Roedel | 9a8a5dc | 2016-08-09 15:46:46 +0200 | [diff] [blame] | 94 | static inline void mtk_iommu_unbind(struct device *dev) |
Honghui Zhang | 9ca340c | 2016-06-08 17:50:58 +0800 | [diff] [blame] | 95 | { |
| 96 | struct mtk_iommu_data *data = dev_get_drvdata(dev); |
| 97 | |
Yong Wu | 1ee9feb | 2019-08-24 11:02:08 +0800 | [diff] [blame] | 98 | component_unbind_all(dev, &data->larb_imu); |
Honghui Zhang | 9ca340c | 2016-06-08 17:50:58 +0800 | [diff] [blame] | 99 | } |
| 100 | |
| 101 | #endif |