blob: da3858e9feecf8d08fa4eb7cfb45d1ea7b6f2eed [file] [log] [blame]
Erich Chen1c57e862006-07-12 08:59:32 -07001/*
2*******************************************************************************
3** O.S : Linux
4** FILE NAME : arcmsr_hba.c
Ching Huangaaa64f62014-08-19 15:22:45 +08005** BY : Nick Cheng, C.L. Huang
6** Description: SCSI RAID Device Driver for Areca RAID Controller
Erich Chen1c57e862006-07-12 08:59:32 -07007*******************************************************************************
Ching Huangaaa64f62014-08-19 15:22:45 +08008** Copyright (C) 2002 - 2014, Areca Technology Corporation All rights reserved
Erich Chen1c57e862006-07-12 08:59:32 -07009**
10** Web site: www.areca.com.tw
Nick Cheng1a4f5502007-09-13 17:26:40 +080011** E-mail: support@areca.com.tw
Erich Chen1c57e862006-07-12 08:59:32 -070012**
13** This program is free software; you can redistribute it and/or modify
14** it under the terms of the GNU General Public License version 2 as
15** published by the Free Software Foundation.
16** This program is distributed in the hope that it will be useful,
17** but WITHOUT ANY WARRANTY; without even the implied warranty of
18** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19** GNU General Public License for more details.
20*******************************************************************************
21** Redistribution and use in source and binary forms, with or without
22** modification, are permitted provided that the following conditions
23** are met:
24** 1. Redistributions of source code must retain the above copyright
25** notice, this list of conditions and the following disclaimer.
26** 2. Redistributions in binary form must reproduce the above copyright
27** notice, this list of conditions and the following disclaimer in the
28** documentation and/or other materials provided with the distribution.
29** 3. The name of the author may not be used to endorse or promote products
30** derived from this software without specific prior written permission.
31**
32** THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
33** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
34** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
35** IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
36** INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING,BUT
37** NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
38** DATA, OR PROFITS; OR BUSINESS INTERRUPTION)HOWEVER CAUSED AND ON ANY
39** THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
40** (INCLUDING NEGLIGENCE OR OTHERWISE)ARISING IN ANY WAY OUT OF THE USE OF
41** THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
42*******************************************************************************
43** For history of changes, see Documentation/scsi/ChangeLog.arcmsr
44** Firmware Specification, see Documentation/scsi/arcmsr_spec.txt
45*******************************************************************************
46*/
47#include <linux/module.h>
48#include <linux/reboot.h>
49#include <linux/spinlock.h>
50#include <linux/pci_ids.h>
51#include <linux/interrupt.h>
52#include <linux/moduleparam.h>
53#include <linux/errno.h>
54#include <linux/types.h>
55#include <linux/delay.h>
56#include <linux/dma-mapping.h>
57#include <linux/timer.h>
David Millera7c89622010-08-16 21:20:07 -070058#include <linux/slab.h>
Erich Chen1c57e862006-07-12 08:59:32 -070059#include <linux/pci.h>
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +080060#include <linux/aer.h>
Ching Huang2e9feb42014-09-24 17:33:34 +080061#include <linux/circ_buf.h>
Erich Chen1c57e862006-07-12 08:59:32 -070062#include <asm/dma.h>
63#include <asm/io.h>
Linus Torvalds7c0f6ba2016-12-24 11:46:01 -080064#include <linux/uaccess.h>
Erich Chen1c57e862006-07-12 08:59:32 -070065#include <scsi/scsi_host.h>
66#include <scsi/scsi.h>
67#include <scsi/scsi_cmnd.h>
68#include <scsi/scsi_tcq.h>
69#include <scsi/scsi_device.h>
70#include <scsi/scsi_transport.h>
71#include <scsi/scsicam.h>
72#include "arcmsr.h"
Ching Huangaaa64f62014-08-19 15:22:45 +080073MODULE_AUTHOR("Nick Cheng, C.L. Huang <support@areca.com.tw>");
74MODULE_DESCRIPTION("Areca ARC11xx/12xx/16xx/188x SAS/SATA RAID Controller Driver");
Erich Chen1c57e862006-07-12 08:59:32 -070075MODULE_LICENSE("Dual BSD/GPL");
76MODULE_VERSION(ARCMSR_DRIVER_VERSION);
Tomas Henzl8b7eb862011-04-29 16:28:24 +020077
78#define ARCMSR_SLEEPTIME 10
79#define ARCMSR_RETRYCOUNT 12
80
Ching Huangc10b1d52014-08-19 15:20:31 +080081static wait_queue_head_t wait_q;
Nick Cheng1a4f5502007-09-13 17:26:40 +080082static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb,
83 struct scsi_cmnd *cmd);
84static int arcmsr_iop_confirm(struct AdapterControlBlock *acb);
Erich Chen1c57e862006-07-12 08:59:32 -070085static int arcmsr_abort(struct scsi_cmnd *);
86static int arcmsr_bus_reset(struct scsi_cmnd *);
87static int arcmsr_bios_param(struct scsi_device *sdev,
Nick Cheng1a4f5502007-09-13 17:26:40 +080088 struct block_device *bdev, sector_t capacity, int *info);
Jeff Garzikf2812332010-11-16 02:10:29 -050089static int arcmsr_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
Erich Chen1c57e862006-07-12 08:59:32 -070090static int arcmsr_probe(struct pci_dev *pdev,
91 const struct pci_device_id *id);
Ching Huang61cda872014-08-19 14:26:09 +080092static int arcmsr_suspend(struct pci_dev *pdev, pm_message_t state);
93static int arcmsr_resume(struct pci_dev *pdev);
Erich Chen1c57e862006-07-12 08:59:32 -070094static void arcmsr_remove(struct pci_dev *pdev);
95static void arcmsr_shutdown(struct pci_dev *pdev);
96static void arcmsr_iop_init(struct AdapterControlBlock *acb);
97static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +080098static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb);
Ching Huang61cda872014-08-19 14:26:09 +080099static void arcmsr_enable_outbound_ints(struct AdapterControlBlock *acb,
100 u32 intmask_org);
Erich Chen1c57e862006-07-12 08:59:32 -0700101static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb);
Ching Huang626fa322014-08-19 15:10:12 +0800102static void arcmsr_hbaA_flush_cache(struct AdapterControlBlock *acb);
103static void arcmsr_hbaB_flush_cache(struct AdapterControlBlock *acb);
Kees Cooke99e88a2017-10-16 14:43:17 -0700104static void arcmsr_request_device_map(struct timer_list *t);
Ching Huang626fa322014-08-19 15:10:12 +0800105static void arcmsr_hbaA_request_device_map(struct AdapterControlBlock *acb);
106static void arcmsr_hbaB_request_device_map(struct AdapterControlBlock *acb);
107static void arcmsr_hbaC_request_device_map(struct AdapterControlBlock *acb);
Nick Cheng36b83de2010-05-17 11:22:42 +0800108static void arcmsr_message_isr_bh_fn(struct work_struct *work);
Nick Chengae52e7f2010-06-18 15:39:12 +0800109static bool arcmsr_get_firmware_spec(struct AdapterControlBlock *acb);
Nick Cheng36b83de2010-05-17 11:22:42 +0800110static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb);
Ching Huang626fa322014-08-19 15:10:12 +0800111static void arcmsr_hbaC_message_isr(struct AdapterControlBlock *pACB);
Ching Huang5b374792014-08-19 15:25:22 +0800112static void arcmsr_hbaD_message_isr(struct AdapterControlBlock *acb);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800113static void arcmsr_hardware_reset(struct AdapterControlBlock *acb);
Erich Chen1c57e862006-07-12 08:59:32 -0700114static const char *arcmsr_info(struct Scsi_Host *);
115static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb);
Ching Huangb4eb6ae2014-08-19 15:28:36 +0800116static void arcmsr_free_irq(struct pci_dev *, struct AdapterControlBlock *);
Ching Huang7e315ff2015-11-25 19:49:33 +0800117static void arcmsr_wait_firmware_ready(struct AdapterControlBlock *acb);
Christoph Hellwigdb5ed4d2014-11-13 15:08:42 +0100118static int arcmsr_adjust_disk_queue_depth(struct scsi_device *sdev, int queue_depth)
Erich Chen1c57e862006-07-12 08:59:32 -0700119{
120 if (queue_depth > ARCMSR_MAX_CMD_PERLUN)
121 queue_depth = ARCMSR_MAX_CMD_PERLUN;
Christoph Hellwigdb5ed4d2014-11-13 15:08:42 +0100122 return scsi_change_queue_depth(sdev, queue_depth);
Erich Chen1c57e862006-07-12 08:59:32 -0700123}
124
125static struct scsi_host_template arcmsr_scsi_host_template = {
126 .module = THIS_MODULE,
Ching Huangaaa64f62014-08-19 15:22:45 +0800127 .name = "Areca SAS/SATA RAID driver",
Erich Chen1c57e862006-07-12 08:59:32 -0700128 .info = arcmsr_info,
129 .queuecommand = arcmsr_queue_command,
Nick Chengcdd3cb12010-07-13 20:03:04 +0800130 .eh_abort_handler = arcmsr_abort,
Erich Chen1c57e862006-07-12 08:59:32 -0700131 .eh_bus_reset_handler = arcmsr_bus_reset,
132 .bios_param = arcmsr_bios_param,
133 .change_queue_depth = arcmsr_adjust_disk_queue_depth,
Ching Huang3df824a2014-08-19 14:29:41 +0800134 .can_queue = ARCMSR_MAX_OUTSTANDING_CMD,
Nick Chengcdd3cb12010-07-13 20:03:04 +0800135 .this_id = ARCMSR_SCSI_INITIATOR_ID,
136 .sg_tablesize = ARCMSR_DEFAULT_SG_ENTRIES,
137 .max_sectors = ARCMSR_MAX_XFER_SECTORS_C,
Erich Chen1c57e862006-07-12 08:59:32 -0700138 .cmd_per_lun = ARCMSR_MAX_CMD_PERLUN,
139 .use_clustering = ENABLE_CLUSTERING,
140 .shost_attrs = arcmsr_host_attrs,
Martin K. Petersen54b2b502013-10-23 06:25:40 -0400141 .no_write_same = 1,
Erich Chen1c57e862006-07-12 08:59:32 -0700142};
Ching Huang8b7c9942014-08-19 14:55:57 +0800143
Erich Chen1c57e862006-07-12 08:59:32 -0700144static struct pci_device_id arcmsr_device_id_table[] = {
Ching Huang8b7c9942014-08-19 14:55:57 +0800145 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1110),
146 .driver_data = ACB_ADAPTER_TYPE_A},
147 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1120),
148 .driver_data = ACB_ADAPTER_TYPE_A},
149 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1130),
150 .driver_data = ACB_ADAPTER_TYPE_A},
151 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1160),
152 .driver_data = ACB_ADAPTER_TYPE_A},
153 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1170),
154 .driver_data = ACB_ADAPTER_TYPE_A},
155 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1200),
156 .driver_data = ACB_ADAPTER_TYPE_B},
157 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1201),
158 .driver_data = ACB_ADAPTER_TYPE_B},
159 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1202),
160 .driver_data = ACB_ADAPTER_TYPE_B},
Ching Huang7e315ff2015-11-25 19:49:33 +0800161 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1203),
162 .driver_data = ACB_ADAPTER_TYPE_B},
Ching Huang8b7c9942014-08-19 14:55:57 +0800163 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1210),
164 .driver_data = ACB_ADAPTER_TYPE_A},
Ching Huang5b374792014-08-19 15:25:22 +0800165 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1214),
166 .driver_data = ACB_ADAPTER_TYPE_D},
Ching Huang8b7c9942014-08-19 14:55:57 +0800167 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1220),
168 .driver_data = ACB_ADAPTER_TYPE_A},
169 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1230),
170 .driver_data = ACB_ADAPTER_TYPE_A},
171 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1260),
172 .driver_data = ACB_ADAPTER_TYPE_A},
173 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1270),
174 .driver_data = ACB_ADAPTER_TYPE_A},
175 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1280),
176 .driver_data = ACB_ADAPTER_TYPE_A},
177 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1380),
178 .driver_data = ACB_ADAPTER_TYPE_A},
179 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1381),
180 .driver_data = ACB_ADAPTER_TYPE_A},
181 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1680),
182 .driver_data = ACB_ADAPTER_TYPE_A},
183 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1681),
184 .driver_data = ACB_ADAPTER_TYPE_A},
185 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1880),
186 .driver_data = ACB_ADAPTER_TYPE_C},
Erich Chen1c57e862006-07-12 08:59:32 -0700187 {0, 0}, /* Terminating entry */
188};
189MODULE_DEVICE_TABLE(pci, arcmsr_device_id_table);
Ching Huang8b7c9942014-08-19 14:55:57 +0800190
Erich Chen1c57e862006-07-12 08:59:32 -0700191static struct pci_driver arcmsr_pci_driver = {
192 .name = "arcmsr",
Nick Chengcdd3cb12010-07-13 20:03:04 +0800193 .id_table = arcmsr_device_id_table,
Erich Chen1c57e862006-07-12 08:59:32 -0700194 .probe = arcmsr_probe,
195 .remove = arcmsr_remove,
Ching Huang61cda872014-08-19 14:26:09 +0800196 .suspend = arcmsr_suspend,
197 .resume = arcmsr_resume,
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +0800198 .shutdown = arcmsr_shutdown,
Erich Chen1c57e862006-07-12 08:59:32 -0700199};
Nick Chengcdd3cb12010-07-13 20:03:04 +0800200/*
201****************************************************************************
202****************************************************************************
203*/
Nick Chengcdd3cb12010-07-13 20:03:04 +0800204
Ching Huang626fa322014-08-19 15:10:12 +0800205static void arcmsr_free_mu(struct AdapterControlBlock *acb)
Nick Chengae52e7f2010-06-18 15:39:12 +0800206{
207 switch (acb->adapter_type) {
Ching Huang5b374792014-08-19 15:25:22 +0800208 case ACB_ADAPTER_TYPE_B:
209 case ACB_ADAPTER_TYPE_D: {
Ching Huang6e38adf2014-08-19 15:14:14 +0800210 dma_free_coherent(&acb->pdev->dev, acb->roundup_ccbsize,
211 acb->dma_coherent2, acb->dma_coherent_handle2);
212 break;
Nick Chengae52e7f2010-06-18 15:39:12 +0800213 }
214 }
215}
216
217static bool arcmsr_remap_pciregion(struct AdapterControlBlock *acb)
218{
219 struct pci_dev *pdev = acb->pdev;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800220 switch (acb->adapter_type){
Nick Chengae52e7f2010-06-18 15:39:12 +0800221 case ACB_ADAPTER_TYPE_A:{
Nick Chengcdd3cb12010-07-13 20:03:04 +0800222 acb->pmuA = ioremap(pci_resource_start(pdev,0), pci_resource_len(pdev,0));
Nick Chengae52e7f2010-06-18 15:39:12 +0800223 if (!acb->pmuA) {
224 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
225 return false;
226 }
227 break;
228 }
229 case ACB_ADAPTER_TYPE_B:{
230 void __iomem *mem_base0, *mem_base1;
231 mem_base0 = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
232 if (!mem_base0) {
233 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
234 return false;
235 }
236 mem_base1 = ioremap(pci_resource_start(pdev, 2), pci_resource_len(pdev, 2));
237 if (!mem_base1) {
238 iounmap(mem_base0);
239 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
240 return false;
241 }
242 acb->mem_base0 = mem_base0;
243 acb->mem_base1 = mem_base1;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800244 break;
245 }
246 case ACB_ADAPTER_TYPE_C:{
247 acb->pmuC = ioremap_nocache(pci_resource_start(pdev, 1), pci_resource_len(pdev, 1));
248 if (!acb->pmuC) {
249 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
250 return false;
251 }
252 if (readl(&acb->pmuC->outbound_doorbell) & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) {
253 writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, &acb->pmuC->outbound_doorbell_clear);/*clear interrupt*/
254 return true;
255 }
256 break;
Nick Chengae52e7f2010-06-18 15:39:12 +0800257 }
Ching Huang5b374792014-08-19 15:25:22 +0800258 case ACB_ADAPTER_TYPE_D: {
259 void __iomem *mem_base0;
260 unsigned long addr, range, flags;
261
262 addr = (unsigned long)pci_resource_start(pdev, 0);
263 range = pci_resource_len(pdev, 0);
264 flags = pci_resource_flags(pdev, 0);
Dan Williams92b19ff2015-08-10 23:07:06 -0400265 mem_base0 = ioremap(addr, range);
Ching Huang5b374792014-08-19 15:25:22 +0800266 if (!mem_base0) {
267 pr_notice("arcmsr%d: memory mapping region fail\n",
268 acb->host->host_no);
269 return false;
270 }
271 acb->mem_base0 = mem_base0;
272 break;
273 }
Nick Chengae52e7f2010-06-18 15:39:12 +0800274 }
275 return true;
276}
277
278static void arcmsr_unmap_pciregion(struct AdapterControlBlock *acb)
279{
280 switch (acb->adapter_type) {
Nick Chengcdd3cb12010-07-13 20:03:04 +0800281 case ACB_ADAPTER_TYPE_A:{
282 iounmap(acb->pmuA);
283 }
284 break;
285 case ACB_ADAPTER_TYPE_B:{
286 iounmap(acb->mem_base0);
287 iounmap(acb->mem_base1);
288 }
289
290 break;
291 case ACB_ADAPTER_TYPE_C:{
292 iounmap(acb->pmuC);
293 }
Ching Huang5b374792014-08-19 15:25:22 +0800294 break;
295 case ACB_ADAPTER_TYPE_D:
296 iounmap(acb->mem_base0);
297 break;
Nick Chengae52e7f2010-06-18 15:39:12 +0800298 }
299}
300
David Howells7d12e782006-10-05 14:55:46 +0100301static irqreturn_t arcmsr_do_interrupt(int irq, void *dev_id)
Erich Chen1c57e862006-07-12 08:59:32 -0700302{
303 irqreturn_t handle_state;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800304 struct AdapterControlBlock *acb = dev_id;
Erich Chen1c57e862006-07-12 08:59:32 -0700305
Erich Chen1c57e862006-07-12 08:59:32 -0700306 handle_state = arcmsr_interrupt(acb);
Erich Chen1c57e862006-07-12 08:59:32 -0700307 return handle_state;
308}
309
310static int arcmsr_bios_param(struct scsi_device *sdev,
311 struct block_device *bdev, sector_t capacity, int *geom)
312{
313 int ret, heads, sectors, cylinders, total_capacity;
314 unsigned char *buffer;/* return copy of block device's partition table */
315
316 buffer = scsi_bios_ptable(bdev);
317 if (buffer) {
318 ret = scsi_partsize(buffer, capacity, &geom[2], &geom[0], &geom[1]);
319 kfree(buffer);
320 if (ret != -1)
321 return ret;
322 }
323 total_capacity = capacity;
324 heads = 64;
325 sectors = 32;
326 cylinders = total_capacity / (heads * sectors);
327 if (cylinders > 1024) {
328 heads = 255;
329 sectors = 63;
330 cylinders = total_capacity / (heads * sectors);
331 }
332 geom[0] = heads;
333 geom[1] = sectors;
334 geom[2] = cylinders;
335 return 0;
336}
337
Ching Huang626fa322014-08-19 15:10:12 +0800338static uint8_t arcmsr_hbaA_wait_msgint_ready(struct AdapterControlBlock *acb)
Nick Cheng1a4f5502007-09-13 17:26:40 +0800339{
Nick Chengae52e7f2010-06-18 15:39:12 +0800340 struct MessageUnit_A __iomem *reg = acb->pmuA;
Tomas Henzl8b7eb862011-04-29 16:28:24 +0200341 int i;
Nick Chengae52e7f2010-06-18 15:39:12 +0800342
Tomas Henzl8b7eb862011-04-29 16:28:24 +0200343 for (i = 0; i < 2000; i++) {
344 if (readl(&reg->outbound_intstatus) &
345 ARCMSR_MU_OUTBOUND_MESSAGE0_INT) {
346 writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT,
347 &reg->outbound_intstatus);
348 return true;
349 }
350 msleep(10);
351 } /* max 20 seconds */
352
Nick Chengcdd3cb12010-07-13 20:03:04 +0800353 return false;
Nick Chengae52e7f2010-06-18 15:39:12 +0800354}
355
Ching Huang626fa322014-08-19 15:10:12 +0800356static uint8_t arcmsr_hbaB_wait_msgint_ready(struct AdapterControlBlock *acb)
Nick Chengae52e7f2010-06-18 15:39:12 +0800357{
358 struct MessageUnit_B *reg = acb->pmuB;
Tomas Henzl8b7eb862011-04-29 16:28:24 +0200359 int i;
Nick Chengae52e7f2010-06-18 15:39:12 +0800360
Tomas Henzl8b7eb862011-04-29 16:28:24 +0200361 for (i = 0; i < 2000; i++) {
362 if (readl(reg->iop2drv_doorbell)
363 & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE) {
364 writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN,
365 reg->iop2drv_doorbell);
366 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT,
367 reg->drv2iop_doorbell);
368 return true;
369 }
370 msleep(10);
371 } /* max 20 seconds */
372
Nick Chengcdd3cb12010-07-13 20:03:04 +0800373 return false;
Nick Chengae52e7f2010-06-18 15:39:12 +0800374}
375
Ching Huang626fa322014-08-19 15:10:12 +0800376static uint8_t arcmsr_hbaC_wait_msgint_ready(struct AdapterControlBlock *pACB)
Nick Chengcdd3cb12010-07-13 20:03:04 +0800377{
Ching Huangc10b1d52014-08-19 15:20:31 +0800378 struct MessageUnit_C __iomem *phbcmu = pACB->pmuC;
Tomas Henzl8b7eb862011-04-29 16:28:24 +0200379 int i;
380
381 for (i = 0; i < 2000; i++) {
382 if (readl(&phbcmu->outbound_doorbell)
383 & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) {
384 writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR,
385 &phbcmu->outbound_doorbell_clear); /*clear interrupt*/
386 return true;
387 }
388 msleep(10);
389 } /* max 20 seconds */
390
Nick Chengcdd3cb12010-07-13 20:03:04 +0800391 return false;
392}
Tomas Henzl8b7eb862011-04-29 16:28:24 +0200393
Ching Huang5b374792014-08-19 15:25:22 +0800394static bool arcmsr_hbaD_wait_msgint_ready(struct AdapterControlBlock *pACB)
395{
396 struct MessageUnit_D *reg = pACB->pmuD;
397 int i;
398
399 for (i = 0; i < 2000; i++) {
400 if (readl(reg->outbound_doorbell)
401 & ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE) {
402 writel(ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE,
403 reg->outbound_doorbell);
404 return true;
405 }
406 msleep(10);
407 } /* max 20 seconds */
408 return false;
409}
410
Ching Huang626fa322014-08-19 15:10:12 +0800411static void arcmsr_hbaA_flush_cache(struct AdapterControlBlock *acb)
Nick Chengae52e7f2010-06-18 15:39:12 +0800412{
413 struct MessageUnit_A __iomem *reg = acb->pmuA;
414 int retry_count = 30;
Nick Chengae52e7f2010-06-18 15:39:12 +0800415 writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, &reg->inbound_msgaddr0);
416 do {
Ching Huang626fa322014-08-19 15:10:12 +0800417 if (arcmsr_hbaA_wait_msgint_ready(acb))
Nick Chengae52e7f2010-06-18 15:39:12 +0800418 break;
419 else {
420 retry_count--;
421 printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \
422 timeout, retry count down = %d \n", acb->host->host_no, retry_count);
423 }
424 } while (retry_count != 0);
425}
426
Ching Huang626fa322014-08-19 15:10:12 +0800427static void arcmsr_hbaB_flush_cache(struct AdapterControlBlock *acb)
Nick Chengae52e7f2010-06-18 15:39:12 +0800428{
429 struct MessageUnit_B *reg = acb->pmuB;
430 int retry_count = 30;
Nick Chengae52e7f2010-06-18 15:39:12 +0800431 writel(ARCMSR_MESSAGE_FLUSH_CACHE, reg->drv2iop_doorbell);
432 do {
Ching Huang626fa322014-08-19 15:10:12 +0800433 if (arcmsr_hbaB_wait_msgint_ready(acb))
Nick Chengae52e7f2010-06-18 15:39:12 +0800434 break;
435 else {
436 retry_count--;
437 printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \
438 timeout,retry count down = %d \n", acb->host->host_no, retry_count);
439 }
440 } while (retry_count != 0);
441}
442
Ching Huang626fa322014-08-19 15:10:12 +0800443static void arcmsr_hbaC_flush_cache(struct AdapterControlBlock *pACB)
Nick Chengcdd3cb12010-07-13 20:03:04 +0800444{
Ching Huangc10b1d52014-08-19 15:20:31 +0800445 struct MessageUnit_C __iomem *reg = pACB->pmuC;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800446 int retry_count = 30;/* enlarge wait flush adapter cache time: 10 minute */
447 writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, &reg->inbound_msgaddr0);
448 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
449 do {
Ching Huang626fa322014-08-19 15:10:12 +0800450 if (arcmsr_hbaC_wait_msgint_ready(pACB)) {
Nick Chengcdd3cb12010-07-13 20:03:04 +0800451 break;
452 } else {
453 retry_count--;
454 printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \
455 timeout,retry count down = %d \n", pACB->host->host_no, retry_count);
456 }
457 } while (retry_count != 0);
458 return;
459}
Ching Huang5b374792014-08-19 15:25:22 +0800460
461static void arcmsr_hbaD_flush_cache(struct AdapterControlBlock *pACB)
462{
463 int retry_count = 15;
464 struct MessageUnit_D *reg = pACB->pmuD;
465
466 writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, reg->inbound_msgaddr0);
467 do {
468 if (arcmsr_hbaD_wait_msgint_ready(pACB))
469 break;
470
471 retry_count--;
472 pr_notice("arcmsr%d: wait 'flush adapter "
473 "cache' timeout, retry count down = %d\n",
474 pACB->host->host_no, retry_count);
475 } while (retry_count != 0);
476}
477
Nick Chengae52e7f2010-06-18 15:39:12 +0800478static void arcmsr_flush_adapter_cache(struct AdapterControlBlock *acb)
479{
Nick Cheng1a4f5502007-09-13 17:26:40 +0800480 switch (acb->adapter_type) {
481
482 case ACB_ADAPTER_TYPE_A: {
Ching Huang626fa322014-08-19 15:10:12 +0800483 arcmsr_hbaA_flush_cache(acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +0800484 }
485 break;
486
487 case ACB_ADAPTER_TYPE_B: {
Ching Huang626fa322014-08-19 15:10:12 +0800488 arcmsr_hbaB_flush_cache(acb);
Nick Chengae52e7f2010-06-18 15:39:12 +0800489 }
Nick Chengcdd3cb12010-07-13 20:03:04 +0800490 break;
491 case ACB_ADAPTER_TYPE_C: {
Ching Huang626fa322014-08-19 15:10:12 +0800492 arcmsr_hbaC_flush_cache(acb);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800493 }
Ching Huang5b374792014-08-19 15:25:22 +0800494 break;
495 case ACB_ADAPTER_TYPE_D:
496 arcmsr_hbaD_flush_cache(acb);
497 break;
Nick Chengae52e7f2010-06-18 15:39:12 +0800498 }
499}
Nick Cheng1a4f5502007-09-13 17:26:40 +0800500
Ching Huang02040672015-11-26 19:41:15 +0800501static bool arcmsr_alloc_io_queue(struct AdapterControlBlock *acb)
502{
503 bool rtn = true;
504 void *dma_coherent;
505 dma_addr_t dma_coherent_handle;
506 struct pci_dev *pdev = acb->pdev;
507
508 switch (acb->adapter_type) {
509 case ACB_ADAPTER_TYPE_B: {
510 struct MessageUnit_B *reg;
511 acb->roundup_ccbsize = roundup(sizeof(struct MessageUnit_B), 32);
512 dma_coherent = dma_zalloc_coherent(&pdev->dev, acb->roundup_ccbsize,
513 &dma_coherent_handle, GFP_KERNEL);
514 if (!dma_coherent) {
515 pr_notice("arcmsr%d: DMA allocation failed\n", acb->host->host_no);
516 return false;
517 }
518 acb->dma_coherent_handle2 = dma_coherent_handle;
519 acb->dma_coherent2 = dma_coherent;
520 reg = (struct MessageUnit_B *)dma_coherent;
521 acb->pmuB = reg;
522 if (acb->pdev->device == PCI_DEVICE_ID_ARECA_1203) {
523 reg->drv2iop_doorbell = MEM_BASE0(ARCMSR_DRV2IOP_DOORBELL_1203);
524 reg->drv2iop_doorbell_mask = MEM_BASE0(ARCMSR_DRV2IOP_DOORBELL_MASK_1203);
525 reg->iop2drv_doorbell = MEM_BASE0(ARCMSR_IOP2DRV_DOORBELL_1203);
526 reg->iop2drv_doorbell_mask = MEM_BASE0(ARCMSR_IOP2DRV_DOORBELL_MASK_1203);
527 } else {
528 reg->drv2iop_doorbell = MEM_BASE0(ARCMSR_DRV2IOP_DOORBELL);
529 reg->drv2iop_doorbell_mask = MEM_BASE0(ARCMSR_DRV2IOP_DOORBELL_MASK);
530 reg->iop2drv_doorbell = MEM_BASE0(ARCMSR_IOP2DRV_DOORBELL);
531 reg->iop2drv_doorbell_mask = MEM_BASE0(ARCMSR_IOP2DRV_DOORBELL_MASK);
532 }
533 reg->message_wbuffer = MEM_BASE1(ARCMSR_MESSAGE_WBUFFER);
534 reg->message_rbuffer = MEM_BASE1(ARCMSR_MESSAGE_RBUFFER);
535 reg->message_rwbuffer = MEM_BASE1(ARCMSR_MESSAGE_RWBUFFER);
536 }
537 break;
538 case ACB_ADAPTER_TYPE_D: {
539 struct MessageUnit_D *reg;
540
541 acb->roundup_ccbsize = roundup(sizeof(struct MessageUnit_D), 32);
542 dma_coherent = dma_zalloc_coherent(&pdev->dev, acb->roundup_ccbsize,
543 &dma_coherent_handle, GFP_KERNEL);
544 if (!dma_coherent) {
545 pr_notice("arcmsr%d: DMA allocation failed\n", acb->host->host_no);
546 return false;
547 }
548 acb->dma_coherent_handle2 = dma_coherent_handle;
549 acb->dma_coherent2 = dma_coherent;
550 reg = (struct MessageUnit_D *)dma_coherent;
551 acb->pmuD = reg;
552 reg->chip_id = MEM_BASE0(ARCMSR_ARC1214_CHIP_ID);
553 reg->cpu_mem_config = MEM_BASE0(ARCMSR_ARC1214_CPU_MEMORY_CONFIGURATION);
554 reg->i2o_host_interrupt_mask = MEM_BASE0(ARCMSR_ARC1214_I2_HOST_INTERRUPT_MASK);
555 reg->sample_at_reset = MEM_BASE0(ARCMSR_ARC1214_SAMPLE_RESET);
556 reg->reset_request = MEM_BASE0(ARCMSR_ARC1214_RESET_REQUEST);
557 reg->host_int_status = MEM_BASE0(ARCMSR_ARC1214_MAIN_INTERRUPT_STATUS);
558 reg->pcief0_int_enable = MEM_BASE0(ARCMSR_ARC1214_PCIE_F0_INTERRUPT_ENABLE);
559 reg->inbound_msgaddr0 = MEM_BASE0(ARCMSR_ARC1214_INBOUND_MESSAGE0);
560 reg->inbound_msgaddr1 = MEM_BASE0(ARCMSR_ARC1214_INBOUND_MESSAGE1);
561 reg->outbound_msgaddr0 = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_MESSAGE0);
562 reg->outbound_msgaddr1 = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_MESSAGE1);
563 reg->inbound_doorbell = MEM_BASE0(ARCMSR_ARC1214_INBOUND_DOORBELL);
564 reg->outbound_doorbell = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_DOORBELL);
565 reg->outbound_doorbell_enable = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_DOORBELL_ENABLE);
566 reg->inboundlist_base_low = MEM_BASE0(ARCMSR_ARC1214_INBOUND_LIST_BASE_LOW);
567 reg->inboundlist_base_high = MEM_BASE0(ARCMSR_ARC1214_INBOUND_LIST_BASE_HIGH);
568 reg->inboundlist_write_pointer = MEM_BASE0(ARCMSR_ARC1214_INBOUND_LIST_WRITE_POINTER);
569 reg->outboundlist_base_low = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_LIST_BASE_LOW);
570 reg->outboundlist_base_high = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_LIST_BASE_HIGH);
571 reg->outboundlist_copy_pointer = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_LIST_COPY_POINTER);
572 reg->outboundlist_read_pointer = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_LIST_READ_POINTER);
573 reg->outboundlist_interrupt_cause = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_INTERRUPT_CAUSE);
574 reg->outboundlist_interrupt_enable = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_INTERRUPT_ENABLE);
575 reg->message_wbuffer = MEM_BASE0(ARCMSR_ARC1214_MESSAGE_WBUFFER);
576 reg->message_rbuffer = MEM_BASE0(ARCMSR_ARC1214_MESSAGE_RBUFFER);
577 reg->msgcode_rwbuffer = MEM_BASE0(ARCMSR_ARC1214_MESSAGE_RWBUFFER);
578 }
579 break;
580 default:
581 break;
582 }
583 return rtn;
584}
585
Nick Chengae52e7f2010-06-18 15:39:12 +0800586static int arcmsr_alloc_ccb_pool(struct AdapterControlBlock *acb)
587{
Nick Chengcdd3cb12010-07-13 20:03:04 +0800588 struct pci_dev *pdev = acb->pdev;
589 void *dma_coherent;
590 dma_addr_t dma_coherent_handle;
591 struct CommandControlBlock *ccb_tmp;
592 int i = 0, j = 0;
593 dma_addr_t cdb_phyaddr;
Tomas Henzl87f76152011-04-29 16:28:30 +0200594 unsigned long roundup_ccbsize;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800595 unsigned long max_xfer_len;
596 unsigned long max_sg_entrys;
597 uint32_t firm_config_version;
Tomas Henzl87f76152011-04-29 16:28:30 +0200598
Nick Chengcdd3cb12010-07-13 20:03:04 +0800599 for (i = 0; i < ARCMSR_MAX_TARGETID; i++)
600 for (j = 0; j < ARCMSR_MAX_TARGETLUN; j++)
601 acb->devstate[i][j] = ARECA_RAID_GONE;
Nick Chengae52e7f2010-06-18 15:39:12 +0800602
Nick Chengcdd3cb12010-07-13 20:03:04 +0800603 max_xfer_len = ARCMSR_MAX_XFER_LEN;
604 max_sg_entrys = ARCMSR_DEFAULT_SG_ENTRIES;
605 firm_config_version = acb->firm_cfg_version;
606 if((firm_config_version & 0xFF) >= 3){
607 max_xfer_len = (ARCMSR_CDB_SG_PAGE_LENGTH << ((firm_config_version >> 8) & 0xFF)) * 1024;/* max 4M byte */
Tomas Henzl87f76152011-04-29 16:28:30 +0200608 max_sg_entrys = (max_xfer_len/4096);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800609 }
610 acb->host->max_sectors = max_xfer_len/512;
611 acb->host->sg_tablesize = max_sg_entrys;
612 roundup_ccbsize = roundup(sizeof(struct CommandControlBlock) + (max_sg_entrys - 1) * sizeof(struct SG64ENTRY), 32);
Tomas Henzl87f76152011-04-29 16:28:30 +0200613 acb->uncache_size = roundup_ccbsize * ARCMSR_MAX_FREECCB_NUM;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800614 dma_coherent = dma_alloc_coherent(&pdev->dev, acb->uncache_size, &dma_coherent_handle, GFP_KERNEL);
615 if(!dma_coherent){
Tomas Henzl87f76152011-04-29 16:28:30 +0200616 printk(KERN_NOTICE "arcmsr%d: dma_alloc_coherent got error\n", acb->host->host_no);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800617 return -ENOMEM;
618 }
619 acb->dma_coherent = dma_coherent;
620 acb->dma_coherent_handle = dma_coherent_handle;
621 memset(dma_coherent, 0, acb->uncache_size);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800622 ccb_tmp = dma_coherent;
623 acb->vir2phy_offset = (unsigned long)dma_coherent - (unsigned long)dma_coherent_handle;
624 for(i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++){
625 cdb_phyaddr = dma_coherent_handle + offsetof(struct CommandControlBlock, arcmsr_cdb);
Ching Huang5b374792014-08-19 15:25:22 +0800626 switch (acb->adapter_type) {
627 case ACB_ADAPTER_TYPE_A:
628 case ACB_ADAPTER_TYPE_B:
629 ccb_tmp->cdb_phyaddr = cdb_phyaddr >> 5;
630 break;
631 case ACB_ADAPTER_TYPE_C:
632 case ACB_ADAPTER_TYPE_D:
633 ccb_tmp->cdb_phyaddr = cdb_phyaddr;
634 break;
635 }
Nick Chengcdd3cb12010-07-13 20:03:04 +0800636 acb->pccb_pool[i] = ccb_tmp;
637 ccb_tmp->acb = acb;
638 INIT_LIST_HEAD(&ccb_tmp->list);
639 list_add_tail(&ccb_tmp->list, &acb->ccb_free_list);
640 ccb_tmp = (struct CommandControlBlock *)((unsigned long)ccb_tmp + roundup_ccbsize);
641 dma_coherent_handle = dma_coherent_handle + roundup_ccbsize;
Erich Chen1c57e862006-07-12 08:59:32 -0700642 }
Erich Chen1c57e862006-07-12 08:59:32 -0700643 return 0;
644}
Nick Cheng36b83de2010-05-17 11:22:42 +0800645
Nick Chengcdd3cb12010-07-13 20:03:04 +0800646static void arcmsr_message_isr_bh_fn(struct work_struct *work)
647{
Ching Huang12aad942014-08-19 14:59:00 +0800648 struct AdapterControlBlock *acb = container_of(work,
649 struct AdapterControlBlock, arcmsr_do_message_isr_bh);
650 char *acb_dev_map = (char *)acb->device_map;
651 uint32_t __iomem *signature = NULL;
652 char __iomem *devicemap = NULL;
653 int target, lun;
654 struct scsi_device *psdev;
655 char diff, temp;
656
Nick Cheng36b83de2010-05-17 11:22:42 +0800657 switch (acb->adapter_type) {
Ching Huang12aad942014-08-19 14:59:00 +0800658 case ACB_ADAPTER_TYPE_A: {
659 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng36b83de2010-05-17 11:22:42 +0800660
Ching Huang12aad942014-08-19 14:59:00 +0800661 signature = (uint32_t __iomem *)(&reg->message_rwbuffer[0]);
662 devicemap = (char __iomem *)(&reg->message_rwbuffer[21]);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800663 break;
Ching Huang12aad942014-08-19 14:59:00 +0800664 }
665 case ACB_ADAPTER_TYPE_B: {
666 struct MessageUnit_B *reg = acb->pmuB;
Nick Cheng36b83de2010-05-17 11:22:42 +0800667
Ching Huang12aad942014-08-19 14:59:00 +0800668 signature = (uint32_t __iomem *)(&reg->message_rwbuffer[0]);
669 devicemap = (char __iomem *)(&reg->message_rwbuffer[21]);
670 break;
671 }
672 case ACB_ADAPTER_TYPE_C: {
673 struct MessageUnit_C __iomem *reg = acb->pmuC;
674
675 signature = (uint32_t __iomem *)(&reg->msgcode_rwbuffer[0]);
676 devicemap = (char __iomem *)(&reg->msgcode_rwbuffer[21]);
677 break;
678 }
Ching Huang5b374792014-08-19 15:25:22 +0800679 case ACB_ADAPTER_TYPE_D: {
680 struct MessageUnit_D *reg = acb->pmuD;
681
682 signature = (uint32_t __iomem *)(&reg->msgcode_rwbuffer[0]);
683 devicemap = (char __iomem *)(&reg->msgcode_rwbuffer[21]);
684 break;
685 }
Ching Huang12aad942014-08-19 14:59:00 +0800686 }
687 atomic_inc(&acb->rq_map_token);
688 if (readl(signature) != ARCMSR_SIGNATURE_GET_CONFIG)
689 return;
690 for (target = 0; target < ARCMSR_MAX_TARGETID - 1;
691 target++) {
692 temp = readb(devicemap);
693 diff = (*acb_dev_map) ^ temp;
694 if (diff != 0) {
695 *acb_dev_map = temp;
696 for (lun = 0; lun < ARCMSR_MAX_TARGETLUN;
697 lun++) {
698 if ((diff & 0x01) == 1 &&
699 (temp & 0x01) == 1) {
700 scsi_add_device(acb->host,
701 0, target, lun);
702 } else if ((diff & 0x01) == 1
703 && (temp & 0x01) == 0) {
704 psdev = scsi_device_lookup(acb->host,
705 0, target, lun);
706 if (psdev != NULL) {
707 scsi_remove_device(psdev);
708 scsi_device_put(psdev);
Nick Cheng36b83de2010-05-17 11:22:42 +0800709 }
Nick Cheng36b83de2010-05-17 11:22:42 +0800710 }
Ching Huang12aad942014-08-19 14:59:00 +0800711 temp >>= 1;
712 diff >>= 1;
Nick Cheng36b83de2010-05-17 11:22:42 +0800713 }
714 }
Ching Huang12aad942014-08-19 14:59:00 +0800715 devicemap++;
716 acb_dev_map++;
Nick Cheng36b83de2010-05-17 11:22:42 +0800717 }
718}
Erich Chen1c57e862006-07-12 08:59:32 -0700719
Ching Huang1d1166e2014-08-19 14:23:31 +0800720static int
721arcmsr_request_irq(struct pci_dev *pdev, struct AdapterControlBlock *acb)
722{
Christoph Hellwig68130c92016-09-11 15:31:23 +0200723 unsigned long flags;
724 int nvec, i;
Ching Huang1d1166e2014-08-19 14:23:31 +0800725
Christoph Hellwig68130c92016-09-11 15:31:23 +0200726 nvec = pci_alloc_irq_vectors(pdev, 1, ARCMST_NUM_MSIX_VECTORS,
727 PCI_IRQ_MSIX);
728 if (nvec > 0) {
729 pr_info("arcmsr%d: msi-x enabled\n", acb->host->host_no);
730 flags = 0;
731 } else {
732 nvec = pci_alloc_irq_vectors(pdev, 1, 1,
733 PCI_IRQ_MSI | PCI_IRQ_LEGACY);
734 if (nvec < 1)
735 return FAILED;
736
737 flags = IRQF_SHARED;
738 }
739
740 acb->vector_count = nvec;
741 for (i = 0; i < nvec; i++) {
742 if (request_irq(pci_irq_vector(pdev, i), arcmsr_do_interrupt,
743 flags, "arcmsr", acb)) {
Ching Huang1d1166e2014-08-19 14:23:31 +0800744 pr_warn("arcmsr%d: request_irq =%d failed!\n",
Christoph Hellwig68130c92016-09-11 15:31:23 +0200745 acb->host->host_no, pci_irq_vector(pdev, i));
746 goto out_free_irq;
Ching Huang1d1166e2014-08-19 14:23:31 +0800747 }
Ching Huang1d1166e2014-08-19 14:23:31 +0800748 }
Christoph Hellwig68130c92016-09-11 15:31:23 +0200749
Ching Huang1d1166e2014-08-19 14:23:31 +0800750 return SUCCESS;
Christoph Hellwig68130c92016-09-11 15:31:23 +0200751out_free_irq:
752 while (--i >= 0)
753 free_irq(pci_irq_vector(pdev, i), acb);
754 pci_free_irq_vectors(pdev);
755 return FAILED;
Ching Huang1d1166e2014-08-19 14:23:31 +0800756}
757
Nick Chengae52e7f2010-06-18 15:39:12 +0800758static int arcmsr_probe(struct pci_dev *pdev, const struct pci_device_id *id)
Erich Chen1c57e862006-07-12 08:59:32 -0700759{
760 struct Scsi_Host *host;
761 struct AdapterControlBlock *acb;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800762 uint8_t bus,dev_fun;
Erich Chen1c57e862006-07-12 08:59:32 -0700763 int error;
Erich Chen1c57e862006-07-12 08:59:32 -0700764 error = pci_enable_device(pdev);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800765 if(error){
Nick Chengae52e7f2010-06-18 15:39:12 +0800766 return -ENODEV;
Erich Chen1c57e862006-07-12 08:59:32 -0700767 }
Nick Chengae52e7f2010-06-18 15:39:12 +0800768 host = scsi_host_alloc(&arcmsr_scsi_host_template, sizeof(struct AdapterControlBlock));
Nick Chengcdd3cb12010-07-13 20:03:04 +0800769 if(!host){
770 goto pci_disable_dev;
Nick Chengae52e7f2010-06-18 15:39:12 +0800771 }
Yang Hongyang6a355282009-04-06 19:01:13 -0700772 error = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
Nick Chengcdd3cb12010-07-13 20:03:04 +0800773 if(error){
Yang Hongyang284901a2009-04-06 19:01:15 -0700774 error = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
Nick Chengcdd3cb12010-07-13 20:03:04 +0800775 if(error){
Erich Chen1c57e862006-07-12 08:59:32 -0700776 printk(KERN_WARNING
777 "scsi%d: No suitable DMA mask available\n",
778 host->host_no);
Nick Chengae52e7f2010-06-18 15:39:12 +0800779 goto scsi_host_release;
Erich Chen1c57e862006-07-12 08:59:32 -0700780 }
781 }
Nick Chengae52e7f2010-06-18 15:39:12 +0800782 init_waitqueue_head(&wait_q);
Erich Chen1c57e862006-07-12 08:59:32 -0700783 bus = pdev->bus->number;
784 dev_fun = pdev->devfn;
Nick Chengae52e7f2010-06-18 15:39:12 +0800785 acb = (struct AdapterControlBlock *) host->hostdata;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800786 memset(acb,0,sizeof(struct AdapterControlBlock));
Erich Chen1c57e862006-07-12 08:59:32 -0700787 acb->pdev = pdev;
Nick Chengae52e7f2010-06-18 15:39:12 +0800788 acb->host = host;
Erich Chen1c57e862006-07-12 08:59:32 -0700789 host->max_lun = ARCMSR_MAX_TARGETLUN;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800790 host->max_id = ARCMSR_MAX_TARGETID; /*16:8*/
791 host->max_cmd_len = 16; /*this is issue of 64bit LBA ,over 2T byte*/
Ching Huang3df824a2014-08-19 14:29:41 +0800792 host->can_queue = ARCMSR_MAX_OUTSTANDING_CMD;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800793 host->cmd_per_lun = ARCMSR_MAX_CMD_PERLUN;
Erich Chen1c57e862006-07-12 08:59:32 -0700794 host->this_id = ARCMSR_SCSI_INITIATOR_ID;
795 host->unique_id = (bus << 8) | dev_fun;
Nick Chengae52e7f2010-06-18 15:39:12 +0800796 pci_set_drvdata(pdev, host);
797 pci_set_master(pdev);
Erich Chen1c57e862006-07-12 08:59:32 -0700798 error = pci_request_regions(pdev, "arcmsr");
Nick Chengcdd3cb12010-07-13 20:03:04 +0800799 if(error){
Nick Chengae52e7f2010-06-18 15:39:12 +0800800 goto scsi_host_release;
Erich Chen1c57e862006-07-12 08:59:32 -0700801 }
Nick Chengae52e7f2010-06-18 15:39:12 +0800802 spin_lock_init(&acb->eh_lock);
803 spin_lock_init(&acb->ccblist_lock);
Ching Huang5b374792014-08-19 15:25:22 +0800804 spin_lock_init(&acb->postq_lock);
805 spin_lock_init(&acb->doneq_lock);
Ching Huangbb263c42014-08-19 15:17:45 +0800806 spin_lock_init(&acb->rqbuffer_lock);
807 spin_lock_init(&acb->wqbuffer_lock);
Erich Chen1c57e862006-07-12 08:59:32 -0700808 acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED |
Nick Chengcdd3cb12010-07-13 20:03:04 +0800809 ACB_F_MESSAGE_RQBUFFER_CLEARED |
810 ACB_F_MESSAGE_WQBUFFER_READED);
Erich Chen1c57e862006-07-12 08:59:32 -0700811 acb->acb_flags &= ~ACB_F_SCSISTOPADAPTER;
812 INIT_LIST_HEAD(&acb->ccb_free_list);
Ching Huang8b7c9942014-08-19 14:55:57 +0800813 acb->adapter_type = id->driver_data;
Nick Chengae52e7f2010-06-18 15:39:12 +0800814 error = arcmsr_remap_pciregion(acb);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800815 if(!error){
Nick Chengae52e7f2010-06-18 15:39:12 +0800816 goto pci_release_regs;
817 }
Ching Huang02040672015-11-26 19:41:15 +0800818 error = arcmsr_alloc_io_queue(acb);
819 if (!error)
820 goto unmap_pci_region;
Nick Chengae52e7f2010-06-18 15:39:12 +0800821 error = arcmsr_get_firmware_spec(acb);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800822 if(!error){
Ching Huang02040672015-11-26 19:41:15 +0800823 goto free_hbb_mu;
Nick Chengae52e7f2010-06-18 15:39:12 +0800824 }
Erich Chen1c57e862006-07-12 08:59:32 -0700825 error = arcmsr_alloc_ccb_pool(acb);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800826 if(error){
Nick Chengae52e7f2010-06-18 15:39:12 +0800827 goto free_hbb_mu;
828 }
Erich Chen1c57e862006-07-12 08:59:32 -0700829 error = scsi_add_host(host, &pdev->dev);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800830 if(error){
Ching Huangb4eb6ae2014-08-19 15:28:36 +0800831 goto free_ccb_pool;
Nick Chengae52e7f2010-06-18 15:39:12 +0800832 }
Ching Huang1d1166e2014-08-19 14:23:31 +0800833 if (arcmsr_request_irq(pdev, acb) == FAILED)
Nick Chengae52e7f2010-06-18 15:39:12 +0800834 goto scsi_host_remove;
Ching Huang1d1166e2014-08-19 14:23:31 +0800835 arcmsr_iop_init(acb);
Nick Chengae52e7f2010-06-18 15:39:12 +0800836 INIT_WORK(&acb->arcmsr_do_message_isr_bh, arcmsr_message_isr_bh_fn);
Nick Cheng36b83de2010-05-17 11:22:42 +0800837 atomic_set(&acb->rq_map_token, 16);
Nick Chengae52e7f2010-06-18 15:39:12 +0800838 atomic_set(&acb->ante_token_value, 16);
839 acb->fw_flag = FW_NORMAL;
Kees Cooke99e88a2017-10-16 14:43:17 -0700840 timer_setup(&acb->eternal_timer, arcmsr_request_device_map, 0);
Nick Chengae52e7f2010-06-18 15:39:12 +0800841 acb->eternal_timer.expires = jiffies + msecs_to_jiffies(6 * HZ);
Nick Cheng36b83de2010-05-17 11:22:42 +0800842 add_timer(&acb->eternal_timer);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800843 if(arcmsr_alloc_sysfs_attr(acb))
Nick Chengae52e7f2010-06-18 15:39:12 +0800844 goto out_free_sysfs;
Ching Huangb4eb6ae2014-08-19 15:28:36 +0800845 scsi_scan_host(host);
Erich Chen1c57e862006-07-12 08:59:32 -0700846 return 0;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800847out_free_sysfs:
Ching Huangb4eb6ae2014-08-19 15:28:36 +0800848 del_timer_sync(&acb->eternal_timer);
849 flush_work(&acb->arcmsr_do_message_isr_bh);
Nick Chengae52e7f2010-06-18 15:39:12 +0800850 arcmsr_stop_adapter_bgrb(acb);
851 arcmsr_flush_adapter_cache(acb);
Ching Huangb4eb6ae2014-08-19 15:28:36 +0800852 arcmsr_free_irq(pdev, acb);
853scsi_host_remove:
854 scsi_remove_host(host);
855free_ccb_pool:
Erich Chen1c57e862006-07-12 08:59:32 -0700856 arcmsr_free_ccb_pool(acb);
Nick Chengae52e7f2010-06-18 15:39:12 +0800857free_hbb_mu:
Ching Huang626fa322014-08-19 15:10:12 +0800858 arcmsr_free_mu(acb);
Nick Chengae52e7f2010-06-18 15:39:12 +0800859unmap_pci_region:
860 arcmsr_unmap_pciregion(acb);
861pci_release_regs:
Erich Chen1c57e862006-07-12 08:59:32 -0700862 pci_release_regions(pdev);
Nick Chengae52e7f2010-06-18 15:39:12 +0800863scsi_host_release:
Erich Chen1c57e862006-07-12 08:59:32 -0700864 scsi_host_put(host);
Nick Chengae52e7f2010-06-18 15:39:12 +0800865pci_disable_dev:
Erich Chen1c57e862006-07-12 08:59:32 -0700866 pci_disable_device(pdev);
Nick Chengae52e7f2010-06-18 15:39:12 +0800867 return -ENODEV;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800868}
869
Ching Huang1d1166e2014-08-19 14:23:31 +0800870static void arcmsr_free_irq(struct pci_dev *pdev,
871 struct AdapterControlBlock *acb)
872{
873 int i;
874
Christoph Hellwig68130c92016-09-11 15:31:23 +0200875 for (i = 0; i < acb->vector_count; i++)
876 free_irq(pci_irq_vector(pdev, i), acb);
877 pci_free_irq_vectors(pdev);
Ching Huang1d1166e2014-08-19 14:23:31 +0800878}
879
Ching Huang61cda872014-08-19 14:26:09 +0800880static int arcmsr_suspend(struct pci_dev *pdev, pm_message_t state)
881{
882 uint32_t intmask_org;
883 struct Scsi_Host *host = pci_get_drvdata(pdev);
884 struct AdapterControlBlock *acb =
885 (struct AdapterControlBlock *)host->hostdata;
886
887 intmask_org = arcmsr_disable_outbound_ints(acb);
888 arcmsr_free_irq(pdev, acb);
889 del_timer_sync(&acb->eternal_timer);
890 flush_work(&acb->arcmsr_do_message_isr_bh);
891 arcmsr_stop_adapter_bgrb(acb);
892 arcmsr_flush_adapter_cache(acb);
893 pci_set_drvdata(pdev, host);
894 pci_save_state(pdev);
895 pci_disable_device(pdev);
896 pci_set_power_state(pdev, pci_choose_state(pdev, state));
897 return 0;
898}
899
900static int arcmsr_resume(struct pci_dev *pdev)
901{
902 int error;
903 struct Scsi_Host *host = pci_get_drvdata(pdev);
904 struct AdapterControlBlock *acb =
905 (struct AdapterControlBlock *)host->hostdata;
906
907 pci_set_power_state(pdev, PCI_D0);
908 pci_enable_wake(pdev, PCI_D0, 0);
909 pci_restore_state(pdev);
910 if (pci_enable_device(pdev)) {
911 pr_warn("%s: pci_enable_device error\n", __func__);
912 return -ENODEV;
913 }
914 error = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
915 if (error) {
916 error = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
917 if (error) {
918 pr_warn("scsi%d: No suitable DMA mask available\n",
919 host->host_no);
920 goto controller_unregister;
921 }
922 }
923 pci_set_master(pdev);
924 if (arcmsr_request_irq(pdev, acb) == FAILED)
925 goto controller_stop;
926 arcmsr_iop_init(acb);
927 INIT_WORK(&acb->arcmsr_do_message_isr_bh, arcmsr_message_isr_bh_fn);
928 atomic_set(&acb->rq_map_token, 16);
929 atomic_set(&acb->ante_token_value, 16);
930 acb->fw_flag = FW_NORMAL;
Kees Cooke99e88a2017-10-16 14:43:17 -0700931 timer_setup(&acb->eternal_timer, arcmsr_request_device_map, 0);
Ching Huang61cda872014-08-19 14:26:09 +0800932 acb->eternal_timer.expires = jiffies + msecs_to_jiffies(6 * HZ);
Ching Huang61cda872014-08-19 14:26:09 +0800933 add_timer(&acb->eternal_timer);
934 return 0;
935controller_stop:
936 arcmsr_stop_adapter_bgrb(acb);
937 arcmsr_flush_adapter_cache(acb);
938controller_unregister:
939 scsi_remove_host(host);
940 arcmsr_free_ccb_pool(acb);
941 arcmsr_unmap_pciregion(acb);
942 pci_release_regions(pdev);
943 scsi_host_put(host);
944 pci_disable_device(pdev);
945 return -ENODEV;
946}
947
Ching Huang626fa322014-08-19 15:10:12 +0800948static uint8_t arcmsr_hbaA_abort_allcmd(struct AdapterControlBlock *acb)
Nick Cheng1a4f5502007-09-13 17:26:40 +0800949{
Al Viro80da1ad2007-10-29 05:08:28 +0000950 struct MessageUnit_A __iomem *reg = acb->pmuA;
Erich Chen1c57e862006-07-12 08:59:32 -0700951 writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, &reg->inbound_msgaddr0);
Ching Huang626fa322014-08-19 15:10:12 +0800952 if (!arcmsr_hbaA_wait_msgint_ready(acb)) {
Erich Chen1c57e862006-07-12 08:59:32 -0700953 printk(KERN_NOTICE
Ching Huang626fa322014-08-19 15:10:12 +0800954 "arcmsr%d: wait 'abort all outstanding command' timeout\n"
Erich Chen1c57e862006-07-12 08:59:32 -0700955 , acb->host->host_no);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800956 return false;
Nick Cheng36b83de2010-05-17 11:22:42 +0800957 }
Nick Chengcdd3cb12010-07-13 20:03:04 +0800958 return true;
Erich Chen1c57e862006-07-12 08:59:32 -0700959}
960
Ching Huang626fa322014-08-19 15:10:12 +0800961static uint8_t arcmsr_hbaB_abort_allcmd(struct AdapterControlBlock *acb)
Nick Cheng1a4f5502007-09-13 17:26:40 +0800962{
Al Viro80da1ad2007-10-29 05:08:28 +0000963 struct MessageUnit_B *reg = acb->pmuB;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800964
Nick Chengae52e7f2010-06-18 15:39:12 +0800965 writel(ARCMSR_MESSAGE_ABORT_CMD, reg->drv2iop_doorbell);
Ching Huang626fa322014-08-19 15:10:12 +0800966 if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
Nick Cheng1a4f5502007-09-13 17:26:40 +0800967 printk(KERN_NOTICE
Ching Huang626fa322014-08-19 15:10:12 +0800968 "arcmsr%d: wait 'abort all outstanding command' timeout\n"
Nick Cheng1a4f5502007-09-13 17:26:40 +0800969 , acb->host->host_no);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800970 return false;
Nick Cheng36b83de2010-05-17 11:22:42 +0800971 }
Nick Chengcdd3cb12010-07-13 20:03:04 +0800972 return true;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800973}
Ching Huang626fa322014-08-19 15:10:12 +0800974static uint8_t arcmsr_hbaC_abort_allcmd(struct AdapterControlBlock *pACB)
Nick Chengcdd3cb12010-07-13 20:03:04 +0800975{
Ching Huangc10b1d52014-08-19 15:20:31 +0800976 struct MessageUnit_C __iomem *reg = pACB->pmuC;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800977 writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, &reg->inbound_msgaddr0);
978 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
Ching Huang626fa322014-08-19 15:10:12 +0800979 if (!arcmsr_hbaC_wait_msgint_ready(pACB)) {
Nick Chengcdd3cb12010-07-13 20:03:04 +0800980 printk(KERN_NOTICE
Ching Huang626fa322014-08-19 15:10:12 +0800981 "arcmsr%d: wait 'abort all outstanding command' timeout\n"
Nick Chengcdd3cb12010-07-13 20:03:04 +0800982 , pACB->host->host_no);
983 return false;
984 }
985 return true;
986}
Ching Huang5b374792014-08-19 15:25:22 +0800987
988static uint8_t arcmsr_hbaD_abort_allcmd(struct AdapterControlBlock *pACB)
989{
990 struct MessageUnit_D *reg = pACB->pmuD;
991
992 writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, reg->inbound_msgaddr0);
993 if (!arcmsr_hbaD_wait_msgint_ready(pACB)) {
994 pr_notice("arcmsr%d: wait 'abort all outstanding "
995 "command' timeout\n", pACB->host->host_no);
996 return false;
997 }
998 return true;
999}
1000
Nick Cheng36b83de2010-05-17 11:22:42 +08001001static uint8_t arcmsr_abort_allcmd(struct AdapterControlBlock *acb)
Nick Cheng1a4f5502007-09-13 17:26:40 +08001002{
Nick Cheng36b83de2010-05-17 11:22:42 +08001003 uint8_t rtnval = 0;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001004 switch (acb->adapter_type) {
1005 case ACB_ADAPTER_TYPE_A: {
Ching Huang626fa322014-08-19 15:10:12 +08001006 rtnval = arcmsr_hbaA_abort_allcmd(acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001007 }
1008 break;
1009
1010 case ACB_ADAPTER_TYPE_B: {
Ching Huang626fa322014-08-19 15:10:12 +08001011 rtnval = arcmsr_hbaB_abort_allcmd(acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001012 }
Nick Chengcdd3cb12010-07-13 20:03:04 +08001013 break;
1014
1015 case ACB_ADAPTER_TYPE_C: {
Ching Huang626fa322014-08-19 15:10:12 +08001016 rtnval = arcmsr_hbaC_abort_allcmd(acb);
Nick Chengcdd3cb12010-07-13 20:03:04 +08001017 }
Ching Huang5b374792014-08-19 15:25:22 +08001018 break;
1019
1020 case ACB_ADAPTER_TYPE_D:
1021 rtnval = arcmsr_hbaD_abort_allcmd(acb);
1022 break;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001023 }
Nick Cheng36b83de2010-05-17 11:22:42 +08001024 return rtnval;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001025}
1026
Erich Chen1c57e862006-07-12 08:59:32 -07001027static void arcmsr_pci_unmap_dma(struct CommandControlBlock *ccb)
1028{
Erich Chen1c57e862006-07-12 08:59:32 -07001029 struct scsi_cmnd *pcmd = ccb->pcmd;
1030
FUJITA Tomonorideff2622007-05-14 19:25:56 +09001031 scsi_dma_unmap(pcmd);
Nick Chengcdd3cb12010-07-13 20:03:04 +08001032}
Erich Chen1c57e862006-07-12 08:59:32 -07001033
Nick Chengae52e7f2010-06-18 15:39:12 +08001034static void arcmsr_ccb_complete(struct CommandControlBlock *ccb)
Erich Chen1c57e862006-07-12 08:59:32 -07001035{
1036 struct AdapterControlBlock *acb = ccb->acb;
1037 struct scsi_cmnd *pcmd = ccb->pcmd;
Nick Chengae52e7f2010-06-18 15:39:12 +08001038 unsigned long flags;
Nick Chengae52e7f2010-06-18 15:39:12 +08001039 atomic_dec(&acb->ccboutstandingcount);
Erich Chen1c57e862006-07-12 08:59:32 -07001040 arcmsr_pci_unmap_dma(ccb);
Erich Chen1c57e862006-07-12 08:59:32 -07001041 ccb->startdone = ARCMSR_CCB_DONE;
Nick Chengae52e7f2010-06-18 15:39:12 +08001042 spin_lock_irqsave(&acb->ccblist_lock, flags);
Erich Chen1c57e862006-07-12 08:59:32 -07001043 list_add_tail(&ccb->list, &acb->ccb_free_list);
Nick Chengae52e7f2010-06-18 15:39:12 +08001044 spin_unlock_irqrestore(&acb->ccblist_lock, flags);
Erich Chen1c57e862006-07-12 08:59:32 -07001045 pcmd->scsi_done(pcmd);
1046}
1047
Nick Cheng1a4f5502007-09-13 17:26:40 +08001048static void arcmsr_report_sense_info(struct CommandControlBlock *ccb)
1049{
1050
1051 struct scsi_cmnd *pcmd = ccb->pcmd;
1052 struct SENSE_DATA *sensebuffer = (struct SENSE_DATA *)pcmd->sense_buffer;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001053 pcmd->result = DID_OK << 16;
1054 if (sensebuffer) {
1055 int sense_data_length =
FUJITA Tomonorib80ca4f2008-01-13 15:46:13 +09001056 sizeof(struct SENSE_DATA) < SCSI_SENSE_BUFFERSIZE
1057 ? sizeof(struct SENSE_DATA) : SCSI_SENSE_BUFFERSIZE;
1058 memset(sensebuffer, 0, SCSI_SENSE_BUFFERSIZE);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001059 memcpy(sensebuffer, ccb->arcmsr_cdb.SenseData, sense_data_length);
1060 sensebuffer->ErrorCode = SCSI_SENSE_CURRENT_ERRORS;
1061 sensebuffer->Valid = 1;
1062 }
1063}
1064
1065static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb)
1066{
1067 u32 orig_mask = 0;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001068 switch (acb->adapter_type) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08001069 case ACB_ADAPTER_TYPE_A : {
Al Viro80da1ad2007-10-29 05:08:28 +00001070 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng36b83de2010-05-17 11:22:42 +08001071 orig_mask = readl(&reg->outbound_intmask);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001072 writel(orig_mask|ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE, \
1073 &reg->outbound_intmask);
1074 }
1075 break;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001076 case ACB_ADAPTER_TYPE_B : {
Al Viro80da1ad2007-10-29 05:08:28 +00001077 struct MessageUnit_B *reg = acb->pmuB;
Nick Chengae52e7f2010-06-18 15:39:12 +08001078 orig_mask = readl(reg->iop2drv_doorbell_mask);
1079 writel(0, reg->iop2drv_doorbell_mask);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001080 }
1081 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001082 case ACB_ADAPTER_TYPE_C:{
Ching Huangc10b1d52014-08-19 15:20:31 +08001083 struct MessageUnit_C __iomem *reg = acb->pmuC;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001084 /* disable all outbound interrupt */
1085 orig_mask = readl(&reg->host_int_mask); /* disable outbound message0 int */
1086 writel(orig_mask|ARCMSR_HBCMU_ALL_INTMASKENABLE, &reg->host_int_mask);
1087 }
1088 break;
Ching Huang5b374792014-08-19 15:25:22 +08001089 case ACB_ADAPTER_TYPE_D: {
1090 struct MessageUnit_D *reg = acb->pmuD;
1091 /* disable all outbound interrupt */
1092 writel(ARCMSR_ARC1214_ALL_INT_DISABLE, reg->pcief0_int_enable);
1093 }
1094 break;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001095 }
1096 return orig_mask;
1097}
1098
Nick Chengcdd3cb12010-07-13 20:03:04 +08001099static void arcmsr_report_ccb_state(struct AdapterControlBlock *acb,
1100 struct CommandControlBlock *ccb, bool error)
Nick Cheng1a4f5502007-09-13 17:26:40 +08001101{
Nick Cheng1a4f5502007-09-13 17:26:40 +08001102 uint8_t id, lun;
1103 id = ccb->pcmd->device->id;
1104 lun = ccb->pcmd->device->lun;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001105 if (!error) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08001106 if (acb->devstate[id][lun] == ARECA_RAID_GONE)
1107 acb->devstate[id][lun] = ARECA_RAID_GOOD;
Julia Lawall7968f192010-08-05 22:19:36 +02001108 ccb->pcmd->result = DID_OK << 16;
1109 arcmsr_ccb_complete(ccb);
Nick Chengcdd3cb12010-07-13 20:03:04 +08001110 }else{
Nick Cheng1a4f5502007-09-13 17:26:40 +08001111 switch (ccb->arcmsr_cdb.DeviceStatus) {
1112 case ARCMSR_DEV_SELECT_TIMEOUT: {
1113 acb->devstate[id][lun] = ARECA_RAID_GONE;
1114 ccb->pcmd->result = DID_NO_CONNECT << 16;
Nick Chengae52e7f2010-06-18 15:39:12 +08001115 arcmsr_ccb_complete(ccb);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001116 }
1117 break;
1118
1119 case ARCMSR_DEV_ABORTED:
1120
1121 case ARCMSR_DEV_INIT_FAIL: {
1122 acb->devstate[id][lun] = ARECA_RAID_GONE;
1123 ccb->pcmd->result = DID_BAD_TARGET << 16;
Nick Chengae52e7f2010-06-18 15:39:12 +08001124 arcmsr_ccb_complete(ccb);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001125 }
1126 break;
1127
1128 case ARCMSR_DEV_CHECK_CONDITION: {
1129 acb->devstate[id][lun] = ARECA_RAID_GOOD;
1130 arcmsr_report_sense_info(ccb);
Nick Chengae52e7f2010-06-18 15:39:12 +08001131 arcmsr_ccb_complete(ccb);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001132 }
1133 break;
1134
1135 default:
Nick Chengcdd3cb12010-07-13 20:03:04 +08001136 printk(KERN_NOTICE
1137 "arcmsr%d: scsi id = %d lun = %d isr get command error done, \
1138 but got unknown DeviceStatus = 0x%x \n"
1139 , acb->host->host_no
1140 , id
1141 , lun
1142 , ccb->arcmsr_cdb.DeviceStatus);
1143 acb->devstate[id][lun] = ARECA_RAID_GONE;
1144 ccb->pcmd->result = DID_NO_CONNECT << 16;
1145 arcmsr_ccb_complete(ccb);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001146 break;
1147 }
1148 }
1149}
1150
Nick Chengcdd3cb12010-07-13 20:03:04 +08001151static void arcmsr_drain_donequeue(struct AdapterControlBlock *acb, struct CommandControlBlock *pCCB, bool error)
Nick Cheng1a4f5502007-09-13 17:26:40 +08001152{
Nick Chengae52e7f2010-06-18 15:39:12 +08001153 int id, lun;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001154 if ((pCCB->acb != acb) || (pCCB->startdone != ARCMSR_CCB_START)) {
1155 if (pCCB->startdone == ARCMSR_CCB_ABORTED) {
1156 struct scsi_cmnd *abortcmd = pCCB->pcmd;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001157 if (abortcmd) {
Nick Chengae52e7f2010-06-18 15:39:12 +08001158 id = abortcmd->device->id;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001159 lun = abortcmd->device->lun;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001160 abortcmd->result |= DID_ABORT << 16;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001161 arcmsr_ccb_complete(pCCB);
1162 printk(KERN_NOTICE "arcmsr%d: pCCB ='0x%p' isr got aborted command \n",
1163 acb->host->host_no, pCCB);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001164 }
Nick Chengcdd3cb12010-07-13 20:03:04 +08001165 return;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001166 }
1167 printk(KERN_NOTICE "arcmsr%d: isr get an illegal ccb command \
1168 done acb = '0x%p'"
1169 "ccb = '0x%p' ccbacb = '0x%p' startdone = 0x%x"
1170 " ccboutstandingcount = %d \n"
1171 , acb->host->host_no
1172 , acb
Nick Chengcdd3cb12010-07-13 20:03:04 +08001173 , pCCB
1174 , pCCB->acb
1175 , pCCB->startdone
Nick Cheng1a4f5502007-09-13 17:26:40 +08001176 , atomic_read(&acb->ccboutstandingcount));
Nick Chengcdd3cb12010-07-13 20:03:04 +08001177 return;
NickCheng97b99122011-01-06 17:32:41 +08001178 }
Nick Chengcdd3cb12010-07-13 20:03:04 +08001179 arcmsr_report_ccb_state(acb, pCCB, error);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001180}
1181
1182static void arcmsr_done4abort_postqueue(struct AdapterControlBlock *acb)
1183{
1184 int i = 0;
Ching Huang3b8155d2014-09-15 19:05:33 +08001185 uint32_t flag_ccb, ccb_cdb_phy;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001186 struct ARCMSR_CDB *pARCMSR_CDB;
1187 bool error;
1188 struct CommandControlBlock *pCCB;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001189 switch (acb->adapter_type) {
1190
1191 case ACB_ADAPTER_TYPE_A: {
Al Viro80da1ad2007-10-29 05:08:28 +00001192 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001193 uint32_t outbound_intstatus;
Al Viro80da1ad2007-10-29 05:08:28 +00001194 outbound_intstatus = readl(&reg->outbound_intstatus) &
Nick Cheng1a4f5502007-09-13 17:26:40 +08001195 acb->outbound_int_enable;
1196 /*clear and abort all outbound posted Q*/
1197 writel(outbound_intstatus, &reg->outbound_intstatus);/*clear interrupt*/
Nick Chengcdd3cb12010-07-13 20:03:04 +08001198 while(((flag_ccb = readl(&reg->outbound_queueport)) != 0xFFFFFFFF)
Nick Cheng1a4f5502007-09-13 17:26:40 +08001199 && (i++ < ARCMSR_MAX_OUTSTANDING_CMD)) {
Nick Chengcdd3cb12010-07-13 20:03:04 +08001200 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));/*frame must be 32 bytes aligned*/
1201 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
1202 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
1203 arcmsr_drain_donequeue(acb, pCCB, error);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001204 }
1205 }
1206 break;
1207
1208 case ACB_ADAPTER_TYPE_B: {
Al Viro80da1ad2007-10-29 05:08:28 +00001209 struct MessageUnit_B *reg = acb->pmuB;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001210 /*clear all outbound posted Q*/
NickCheng97b99122011-01-06 17:32:41 +08001211 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell); /* clear doorbell interrupt */
Nick Cheng1a4f5502007-09-13 17:26:40 +08001212 for (i = 0; i < ARCMSR_MAX_HBB_POSTQUEUE; i++) {
Ching Huangc10b1d52014-08-19 15:20:31 +08001213 flag_ccb = reg->done_qbuffer[i];
1214 if (flag_ccb != 0) {
1215 reg->done_qbuffer[i] = 0;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001216 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset+(flag_ccb << 5));/*frame must be 32 bytes aligned*/
1217 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
1218 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
1219 arcmsr_drain_donequeue(acb, pCCB, error);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001220 }
Nick Chengcdd3cb12010-07-13 20:03:04 +08001221 reg->post_qbuffer[i] = 0;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001222 }
1223 reg->doneq_index = 0;
1224 reg->postq_index = 0;
1225 }
1226 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001227 case ACB_ADAPTER_TYPE_C: {
Ching Huangc10b1d52014-08-19 15:20:31 +08001228 struct MessageUnit_C __iomem *reg = acb->pmuC;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001229 while ((readl(&reg->host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) && (i++ < ARCMSR_MAX_OUTSTANDING_CMD)) {
1230 /*need to do*/
1231 flag_ccb = readl(&reg->outbound_queueport_low);
1232 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);
1233 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset+ccb_cdb_phy);/*frame must be 32 bytes aligned*/
1234 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
1235 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
1236 arcmsr_drain_donequeue(acb, pCCB, error);
1237 }
Ching Huang5b374792014-08-19 15:25:22 +08001238 }
1239 break;
1240 case ACB_ADAPTER_TYPE_D: {
1241 struct MessageUnit_D *pmu = acb->pmuD;
Ching Huang3b8155d2014-09-15 19:05:33 +08001242 uint32_t outbound_write_pointer;
1243 uint32_t doneq_index, index_stripped, addressLow, residual, toggle;
1244 unsigned long flags;
Ching Huang5b374792014-08-19 15:25:22 +08001245
Ching Huang5b374792014-08-19 15:25:22 +08001246 residual = atomic_read(&acb->ccboutstandingcount);
1247 for (i = 0; i < residual; i++) {
Ching Huang3b8155d2014-09-15 19:05:33 +08001248 spin_lock_irqsave(&acb->doneq_lock, flags);
1249 outbound_write_pointer =
1250 pmu->done_qbuffer[0].addressLow + 1;
1251 doneq_index = pmu->doneq_index;
1252 if ((doneq_index & 0xFFF) !=
Ching Huang5b374792014-08-19 15:25:22 +08001253 (outbound_write_pointer & 0xFFF)) {
Ching Huang3b8155d2014-09-15 19:05:33 +08001254 toggle = doneq_index & 0x4000;
1255 index_stripped = (doneq_index & 0xFFF) + 1;
1256 index_stripped %= ARCMSR_MAX_ARC1214_DONEQUEUE;
1257 pmu->doneq_index = index_stripped ? (index_stripped | toggle) :
1258 ((toggle ^ 0x4000) + 1);
Ching Huang5b374792014-08-19 15:25:22 +08001259 doneq_index = pmu->doneq_index;
Ching Huang3b8155d2014-09-15 19:05:33 +08001260 spin_unlock_irqrestore(&acb->doneq_lock, flags);
Ching Huang5b374792014-08-19 15:25:22 +08001261 addressLow = pmu->done_qbuffer[doneq_index &
1262 0xFFF].addressLow;
1263 ccb_cdb_phy = (addressLow & 0xFFFFFFF0);
1264 pARCMSR_CDB = (struct ARCMSR_CDB *)
1265 (acb->vir2phy_offset + ccb_cdb_phy);
1266 pCCB = container_of(pARCMSR_CDB,
1267 struct CommandControlBlock, arcmsr_cdb);
1268 error = (addressLow &
1269 ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ?
1270 true : false;
1271 arcmsr_drain_donequeue(acb, pCCB, error);
1272 writel(doneq_index,
1273 pmu->outboundlist_read_pointer);
Ching Huang3b8155d2014-09-15 19:05:33 +08001274 } else {
1275 spin_unlock_irqrestore(&acb->doneq_lock, flags);
1276 mdelay(10);
Ching Huang5b374792014-08-19 15:25:22 +08001277 }
Ching Huang5b374792014-08-19 15:25:22 +08001278 }
1279 pmu->postq_index = 0;
1280 pmu->doneq_index = 0x40FF;
1281 }
1282 break;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001283 }
1284}
Ching Huang1d1166e2014-08-19 14:23:31 +08001285
Erich Chen1c57e862006-07-12 08:59:32 -07001286static void arcmsr_remove(struct pci_dev *pdev)
1287{
1288 struct Scsi_Host *host = pci_get_drvdata(pdev);
1289 struct AdapterControlBlock *acb =
1290 (struct AdapterControlBlock *) host->hostdata;
Erich Chen1c57e862006-07-12 08:59:32 -07001291 int poll_count = 0;
Erich Chen1c57e862006-07-12 08:59:32 -07001292 arcmsr_free_sysfs_attr(acb);
1293 scsi_remove_host(host);
Tejun Heo43829732012-08-20 14:51:24 -07001294 flush_work(&acb->arcmsr_do_message_isr_bh);
Nick Cheng36b83de2010-05-17 11:22:42 +08001295 del_timer_sync(&acb->eternal_timer);
1296 arcmsr_disable_outbound_ints(acb);
Erich Chen1c57e862006-07-12 08:59:32 -07001297 arcmsr_stop_adapter_bgrb(acb);
Nick Chengcdd3cb12010-07-13 20:03:04 +08001298 arcmsr_flush_adapter_cache(acb);
Erich Chen1c57e862006-07-12 08:59:32 -07001299 acb->acb_flags |= ACB_F_SCSISTOPADAPTER;
1300 acb->acb_flags &= ~ACB_F_IOP_INITED;
1301
Nick Chengcdd3cb12010-07-13 20:03:04 +08001302 for (poll_count = 0; poll_count < ARCMSR_MAX_OUTSTANDING_CMD; poll_count++){
Erich Chen1c57e862006-07-12 08:59:32 -07001303 if (!atomic_read(&acb->ccboutstandingcount))
1304 break;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001305 arcmsr_interrupt(acb);/* FIXME: need spinlock */
Erich Chen1c57e862006-07-12 08:59:32 -07001306 msleep(25);
1307 }
1308
1309 if (atomic_read(&acb->ccboutstandingcount)) {
1310 int i;
1311
1312 arcmsr_abort_allcmd(acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001313 arcmsr_done4abort_postqueue(acb);
Erich Chen1c57e862006-07-12 08:59:32 -07001314 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) {
1315 struct CommandControlBlock *ccb = acb->pccb_pool[i];
1316 if (ccb->startdone == ARCMSR_CCB_START) {
1317 ccb->startdone = ARCMSR_CCB_ABORTED;
1318 ccb->pcmd->result = DID_ABORT << 16;
Nick Chengae52e7f2010-06-18 15:39:12 +08001319 arcmsr_ccb_complete(ccb);
Erich Chen1c57e862006-07-12 08:59:32 -07001320 }
1321 }
1322 }
Ching Huang1d1166e2014-08-19 14:23:31 +08001323 arcmsr_free_irq(pdev, acb);
Erich Chen1c57e862006-07-12 08:59:32 -07001324 arcmsr_free_ccb_pool(acb);
Ching Huang626fa322014-08-19 15:10:12 +08001325 arcmsr_free_mu(acb);
Nick Chengcdd3cb12010-07-13 20:03:04 +08001326 arcmsr_unmap_pciregion(acb);
Erich Chen1c57e862006-07-12 08:59:32 -07001327 pci_release_regions(pdev);
Nick Chengcdd3cb12010-07-13 20:03:04 +08001328 scsi_host_put(host);
Erich Chen1c57e862006-07-12 08:59:32 -07001329 pci_disable_device(pdev);
Erich Chen1c57e862006-07-12 08:59:32 -07001330}
1331
1332static void arcmsr_shutdown(struct pci_dev *pdev)
1333{
1334 struct Scsi_Host *host = pci_get_drvdata(pdev);
1335 struct AdapterControlBlock *acb =
1336 (struct AdapterControlBlock *)host->hostdata;
Nick Cheng36b83de2010-05-17 11:22:42 +08001337 del_timer_sync(&acb->eternal_timer);
1338 arcmsr_disable_outbound_ints(acb);
Ching Huang1d1166e2014-08-19 14:23:31 +08001339 arcmsr_free_irq(pdev, acb);
Tejun Heo43829732012-08-20 14:51:24 -07001340 flush_work(&acb->arcmsr_do_message_isr_bh);
Erich Chen1c57e862006-07-12 08:59:32 -07001341 arcmsr_stop_adapter_bgrb(acb);
1342 arcmsr_flush_adapter_cache(acb);
1343}
1344
1345static int arcmsr_module_init(void)
1346{
1347 int error = 0;
Erich Chen1c57e862006-07-12 08:59:32 -07001348 error = pci_register_driver(&arcmsr_pci_driver);
1349 return error;
1350}
1351
1352static void arcmsr_module_exit(void)
1353{
1354 pci_unregister_driver(&arcmsr_pci_driver);
1355}
1356module_init(arcmsr_module_init);
1357module_exit(arcmsr_module_exit);
1358
Nick Cheng36b83de2010-05-17 11:22:42 +08001359static void arcmsr_enable_outbound_ints(struct AdapterControlBlock *acb,
Nick Cheng1a4f5502007-09-13 17:26:40 +08001360 u32 intmask_org)
Erich Chen1c57e862006-07-12 08:59:32 -07001361{
Erich Chen1c57e862006-07-12 08:59:32 -07001362 u32 mask;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001363 switch (acb->adapter_type) {
1364
Nick Chengcdd3cb12010-07-13 20:03:04 +08001365 case ACB_ADAPTER_TYPE_A: {
Al Viro80da1ad2007-10-29 05:08:28 +00001366 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001367 mask = intmask_org & ~(ARCMSR_MU_OUTBOUND_POSTQUEUE_INTMASKENABLE |
Nick Cheng36b83de2010-05-17 11:22:42 +08001368 ARCMSR_MU_OUTBOUND_DOORBELL_INTMASKENABLE|
1369 ARCMSR_MU_OUTBOUND_MESSAGE0_INTMASKENABLE);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001370 writel(mask, &reg->outbound_intmask);
1371 acb->outbound_int_enable = ~(intmask_org & mask) & 0x000000ff;
1372 }
1373 break;
Erich Chen1c57e862006-07-12 08:59:32 -07001374
Nick Chengcdd3cb12010-07-13 20:03:04 +08001375 case ACB_ADAPTER_TYPE_B: {
Al Viro80da1ad2007-10-29 05:08:28 +00001376 struct MessageUnit_B *reg = acb->pmuB;
Nick Cheng36b83de2010-05-17 11:22:42 +08001377 mask = intmask_org | (ARCMSR_IOP2DRV_DATA_WRITE_OK |
1378 ARCMSR_IOP2DRV_DATA_READ_OK |
1379 ARCMSR_IOP2DRV_CDB_DONE |
1380 ARCMSR_IOP2DRV_MESSAGE_CMD_DONE);
Nick Chengae52e7f2010-06-18 15:39:12 +08001381 writel(mask, reg->iop2drv_doorbell_mask);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001382 acb->outbound_int_enable = (intmask_org | mask) & 0x0000000f;
1383 }
Nick Chengcdd3cb12010-07-13 20:03:04 +08001384 break;
1385 case ACB_ADAPTER_TYPE_C: {
Ching Huangc10b1d52014-08-19 15:20:31 +08001386 struct MessageUnit_C __iomem *reg = acb->pmuC;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001387 mask = ~(ARCMSR_HBCMU_UTILITY_A_ISR_MASK | ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR_MASK|ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR_MASK);
1388 writel(intmask_org & mask, &reg->host_int_mask);
1389 acb->outbound_int_enable = ~(intmask_org & mask) & 0x0000000f;
1390 }
Ching Huang5b374792014-08-19 15:25:22 +08001391 break;
1392 case ACB_ADAPTER_TYPE_D: {
1393 struct MessageUnit_D *reg = acb->pmuD;
1394
1395 mask = ARCMSR_ARC1214_ALL_INT_ENABLE;
1396 writel(intmask_org | mask, reg->pcief0_int_enable);
1397 break;
1398 }
Erich Chen1c57e862006-07-12 08:59:32 -07001399 }
1400}
1401
Nick Cheng76d78302008-02-04 23:53:24 -08001402static int arcmsr_build_ccb(struct AdapterControlBlock *acb,
Erich Chen1c57e862006-07-12 08:59:32 -07001403 struct CommandControlBlock *ccb, struct scsi_cmnd *pcmd)
1404{
1405 struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb;
1406 int8_t *psge = (int8_t *)&arcmsr_cdb->u;
Al Viro80da1ad2007-10-29 05:08:28 +00001407 __le32 address_lo, address_hi;
Erich Chen1c57e862006-07-12 08:59:32 -07001408 int arccdbsize = 0x30;
Nick Chengae52e7f2010-06-18 15:39:12 +08001409 __le32 length = 0;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001410 int i;
Nick Chengae52e7f2010-06-18 15:39:12 +08001411 struct scatterlist *sg;
FUJITA Tomonorideff2622007-05-14 19:25:56 +09001412 int nseg;
Erich Chen1c57e862006-07-12 08:59:32 -07001413 ccb->pcmd = pcmd;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001414 memset(arcmsr_cdb, 0, sizeof(struct ARCMSR_CDB));
Erich Chen1c57e862006-07-12 08:59:32 -07001415 arcmsr_cdb->TargetID = pcmd->device->id;
1416 arcmsr_cdb->LUN = pcmd->device->lun;
1417 arcmsr_cdb->Function = 1;
Ching Huang626fa322014-08-19 15:10:12 +08001418 arcmsr_cdb->msgContext = 0;
Erich Chen1c57e862006-07-12 08:59:32 -07001419 memcpy(arcmsr_cdb->Cdb, pcmd->cmnd, pcmd->cmd_len);
Erich Chen1c57e862006-07-12 08:59:32 -07001420
FUJITA Tomonorideff2622007-05-14 19:25:56 +09001421 nseg = scsi_dma_map(pcmd);
Nick Chengcdd3cb12010-07-13 20:03:04 +08001422 if (unlikely(nseg > acb->host->sg_tablesize || nseg < 0))
Nick Cheng76d78302008-02-04 23:53:24 -08001423 return FAILED;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001424 scsi_for_each_sg(pcmd, sg, nseg, i) {
1425 /* Get the physical address of the current data pointer */
1426 length = cpu_to_le32(sg_dma_len(sg));
1427 address_lo = cpu_to_le32(dma_addr_lo32(sg_dma_address(sg)));
1428 address_hi = cpu_to_le32(dma_addr_hi32(sg_dma_address(sg)));
1429 if (address_hi == 0) {
1430 struct SG32ENTRY *pdma_sg = (struct SG32ENTRY *)psge;
Erich Chen1c57e862006-07-12 08:59:32 -07001431
Nick Chengcdd3cb12010-07-13 20:03:04 +08001432 pdma_sg->address = address_lo;
1433 pdma_sg->length = length;
1434 psge += sizeof (struct SG32ENTRY);
1435 arccdbsize += sizeof (struct SG32ENTRY);
1436 } else {
1437 struct SG64ENTRY *pdma_sg = (struct SG64ENTRY *)psge;
Erich Chen1c57e862006-07-12 08:59:32 -07001438
Nick Chengcdd3cb12010-07-13 20:03:04 +08001439 pdma_sg->addresshigh = address_hi;
1440 pdma_sg->address = address_lo;
1441 pdma_sg->length = length|cpu_to_le32(IS_SG64_ADDR);
1442 psge += sizeof (struct SG64ENTRY);
1443 arccdbsize += sizeof (struct SG64ENTRY);
Erich Chen1c57e862006-07-12 08:59:32 -07001444 }
Erich Chen1c57e862006-07-12 08:59:32 -07001445 }
Nick Chengcdd3cb12010-07-13 20:03:04 +08001446 arcmsr_cdb->sgcount = (uint8_t)nseg;
1447 arcmsr_cdb->DataLength = scsi_bufflen(pcmd);
1448 arcmsr_cdb->msgPages = arccdbsize/0x100 + (arccdbsize % 0x100 ? 1 : 0);
1449 if ( arccdbsize > 256)
1450 arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_SGL_BSIZE;
roel kluinc32e0612011-01-01 19:40:23 +01001451 if (pcmd->sc_data_direction == DMA_TO_DEVICE)
Nick Chengcdd3cb12010-07-13 20:03:04 +08001452 arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_WRITE;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001453 ccb->arc_cdb_size = arccdbsize;
Nick Cheng76d78302008-02-04 23:53:24 -08001454 return SUCCESS;
Erich Chen1c57e862006-07-12 08:59:32 -07001455}
1456
1457static void arcmsr_post_ccb(struct AdapterControlBlock *acb, struct CommandControlBlock *ccb)
1458{
Ching Huang626fa322014-08-19 15:10:12 +08001459 uint32_t cdb_phyaddr = ccb->cdb_phyaddr;
Erich Chen1c57e862006-07-12 08:59:32 -07001460 struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb;
Erich Chen1c57e862006-07-12 08:59:32 -07001461 atomic_inc(&acb->ccboutstandingcount);
1462 ccb->startdone = ARCMSR_CCB_START;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001463 switch (acb->adapter_type) {
1464 case ACB_ADAPTER_TYPE_A: {
Al Viro80da1ad2007-10-29 05:08:28 +00001465 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001466
1467 if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE)
Ching Huang626fa322014-08-19 15:10:12 +08001468 writel(cdb_phyaddr | ARCMSR_CCBPOST_FLAG_SGL_BSIZE,
Erich Chen1c57e862006-07-12 08:59:32 -07001469 &reg->inbound_queueport);
Ching Huang626fa322014-08-19 15:10:12 +08001470 else
1471 writel(cdb_phyaddr, &reg->inbound_queueport);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001472 break;
Ching Huang626fa322014-08-19 15:10:12 +08001473 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08001474
1475 case ACB_ADAPTER_TYPE_B: {
Al Viro80da1ad2007-10-29 05:08:28 +00001476 struct MessageUnit_B *reg = acb->pmuB;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001477 uint32_t ending_index, index = reg->postq_index;
1478
1479 ending_index = ((index + 1) % ARCMSR_MAX_HBB_POSTQUEUE);
Ching Huangc10b1d52014-08-19 15:20:31 +08001480 reg->post_qbuffer[ending_index] = 0;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001481 if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE) {
Ching Huangc10b1d52014-08-19 15:20:31 +08001482 reg->post_qbuffer[index] =
1483 cdb_phyaddr | ARCMSR_CCBPOST_FLAG_SGL_BSIZE;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001484 } else {
Ching Huangc10b1d52014-08-19 15:20:31 +08001485 reg->post_qbuffer[index] = cdb_phyaddr;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001486 }
1487 index++;
1488 index %= ARCMSR_MAX_HBB_POSTQUEUE;/*if last index number set it to 0 */
1489 reg->postq_index = index;
Nick Chengae52e7f2010-06-18 15:39:12 +08001490 writel(ARCMSR_DRV2IOP_CDB_POSTED, reg->drv2iop_doorbell);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001491 }
1492 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001493 case ACB_ADAPTER_TYPE_C: {
Ching Huangc10b1d52014-08-19 15:20:31 +08001494 struct MessageUnit_C __iomem *phbcmu = acb->pmuC;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001495 uint32_t ccb_post_stamp, arc_cdb_size;
1496
1497 arc_cdb_size = (ccb->arc_cdb_size > 0x300) ? 0x300 : ccb->arc_cdb_size;
Ching Huang626fa322014-08-19 15:10:12 +08001498 ccb_post_stamp = (cdb_phyaddr | ((arc_cdb_size - 1) >> 6) | 1);
Nick Chengcdd3cb12010-07-13 20:03:04 +08001499 if (acb->cdb_phyaddr_hi32) {
1500 writel(acb->cdb_phyaddr_hi32, &phbcmu->inbound_queueport_high);
1501 writel(ccb_post_stamp, &phbcmu->inbound_queueport_low);
1502 } else {
1503 writel(ccb_post_stamp, &phbcmu->inbound_queueport_low);
1504 }
1505 }
Ching Huang5b374792014-08-19 15:25:22 +08001506 break;
1507 case ACB_ADAPTER_TYPE_D: {
1508 struct MessageUnit_D *pmu = acb->pmuD;
1509 u16 index_stripped;
Ching Huang3b8155d2014-09-15 19:05:33 +08001510 u16 postq_index, toggle;
Ching Huang5b374792014-08-19 15:25:22 +08001511 unsigned long flags;
1512 struct InBound_SRB *pinbound_srb;
1513
1514 spin_lock_irqsave(&acb->postq_lock, flags);
1515 postq_index = pmu->postq_index;
1516 pinbound_srb = (struct InBound_SRB *)&(pmu->post_qbuffer[postq_index & 0xFF]);
1517 pinbound_srb->addressHigh = dma_addr_hi32(cdb_phyaddr);
1518 pinbound_srb->addressLow = dma_addr_lo32(cdb_phyaddr);
1519 pinbound_srb->length = ccb->arc_cdb_size >> 2;
1520 arcmsr_cdb->msgContext = dma_addr_lo32(cdb_phyaddr);
Ching Huang3b8155d2014-09-15 19:05:33 +08001521 toggle = postq_index & 0x4000;
1522 index_stripped = postq_index + 1;
1523 index_stripped &= (ARCMSR_MAX_ARC1214_POSTQUEUE - 1);
1524 pmu->postq_index = index_stripped ? (index_stripped | toggle) :
1525 (toggle ^ 0x4000);
Ching Huang5b374792014-08-19 15:25:22 +08001526 writel(postq_index, pmu->inboundlist_write_pointer);
1527 spin_unlock_irqrestore(&acb->postq_lock, flags);
1528 break;
1529 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08001530 }
Erich Chen1c57e862006-07-12 08:59:32 -07001531}
1532
Ching Huang626fa322014-08-19 15:10:12 +08001533static void arcmsr_hbaA_stop_bgrb(struct AdapterControlBlock *acb)
Erich Chen1c57e862006-07-12 08:59:32 -07001534{
Al Viro80da1ad2007-10-29 05:08:28 +00001535 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001536 acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
1537 writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, &reg->inbound_msgaddr0);
Ching Huang626fa322014-08-19 15:10:12 +08001538 if (!arcmsr_hbaA_wait_msgint_ready(acb)) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08001539 printk(KERN_NOTICE
Ching Huang626fa322014-08-19 15:10:12 +08001540 "arcmsr%d: wait 'stop adapter background rebulid' timeout\n"
Nick Cheng1a4f5502007-09-13 17:26:40 +08001541 , acb->host->host_no);
1542 }
1543}
1544
Ching Huang626fa322014-08-19 15:10:12 +08001545static void arcmsr_hbaB_stop_bgrb(struct AdapterControlBlock *acb)
Nick Cheng1a4f5502007-09-13 17:26:40 +08001546{
Al Viro80da1ad2007-10-29 05:08:28 +00001547 struct MessageUnit_B *reg = acb->pmuB;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001548 acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
Nick Chengae52e7f2010-06-18 15:39:12 +08001549 writel(ARCMSR_MESSAGE_STOP_BGRB, reg->drv2iop_doorbell);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001550
Ching Huang626fa322014-08-19 15:10:12 +08001551 if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08001552 printk(KERN_NOTICE
Ching Huang626fa322014-08-19 15:10:12 +08001553 "arcmsr%d: wait 'stop adapter background rebulid' timeout\n"
Nick Cheng1a4f5502007-09-13 17:26:40 +08001554 , acb->host->host_no);
Erich Chen1c57e862006-07-12 08:59:32 -07001555 }
1556}
1557
Ching Huang626fa322014-08-19 15:10:12 +08001558static void arcmsr_hbaC_stop_bgrb(struct AdapterControlBlock *pACB)
Nick Chengcdd3cb12010-07-13 20:03:04 +08001559{
Ching Huangc10b1d52014-08-19 15:20:31 +08001560 struct MessageUnit_C __iomem *reg = pACB->pmuC;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001561 pACB->acb_flags &= ~ACB_F_MSG_START_BGRB;
1562 writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, &reg->inbound_msgaddr0);
1563 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
Ching Huang626fa322014-08-19 15:10:12 +08001564 if (!arcmsr_hbaC_wait_msgint_ready(pACB)) {
Nick Chengcdd3cb12010-07-13 20:03:04 +08001565 printk(KERN_NOTICE
Ching Huang626fa322014-08-19 15:10:12 +08001566 "arcmsr%d: wait 'stop adapter background rebulid' timeout\n"
Nick Chengcdd3cb12010-07-13 20:03:04 +08001567 , pACB->host->host_no);
1568 }
1569 return;
1570}
Ching Huang5b374792014-08-19 15:25:22 +08001571
1572static void arcmsr_hbaD_stop_bgrb(struct AdapterControlBlock *pACB)
1573{
1574 struct MessageUnit_D *reg = pACB->pmuD;
1575
1576 pACB->acb_flags &= ~ACB_F_MSG_START_BGRB;
1577 writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, reg->inbound_msgaddr0);
1578 if (!arcmsr_hbaD_wait_msgint_ready(pACB))
1579 pr_notice("arcmsr%d: wait 'stop adapter background rebulid' "
1580 "timeout\n", pACB->host->host_no);
1581}
1582
Erich Chen1c57e862006-07-12 08:59:32 -07001583static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb)
1584{
Nick Cheng1a4f5502007-09-13 17:26:40 +08001585 switch (acb->adapter_type) {
1586 case ACB_ADAPTER_TYPE_A: {
Ching Huang626fa322014-08-19 15:10:12 +08001587 arcmsr_hbaA_stop_bgrb(acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001588 }
1589 break;
Erich Chen1c57e862006-07-12 08:59:32 -07001590
Nick Cheng1a4f5502007-09-13 17:26:40 +08001591 case ACB_ADAPTER_TYPE_B: {
Ching Huang626fa322014-08-19 15:10:12 +08001592 arcmsr_hbaB_stop_bgrb(acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001593 }
1594 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001595 case ACB_ADAPTER_TYPE_C: {
Ching Huang626fa322014-08-19 15:10:12 +08001596 arcmsr_hbaC_stop_bgrb(acb);
Nick Chengcdd3cb12010-07-13 20:03:04 +08001597 }
Ching Huang5b374792014-08-19 15:25:22 +08001598 break;
1599 case ACB_ADAPTER_TYPE_D:
1600 arcmsr_hbaD_stop_bgrb(acb);
1601 break;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001602 }
Erich Chen1c57e862006-07-12 08:59:32 -07001603}
1604
1605static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb)
1606{
Nick Chengcdd3cb12010-07-13 20:03:04 +08001607 dma_free_coherent(&acb->pdev->dev, acb->uncache_size, acb->dma_coherent, acb->dma_coherent_handle);
Erich Chen1c57e862006-07-12 08:59:32 -07001608}
1609
Ching Huangc10b1d52014-08-19 15:20:31 +08001610static void arcmsr_iop_message_read(struct AdapterControlBlock *acb)
Erich Chen1c57e862006-07-12 08:59:32 -07001611{
Nick Cheng1a4f5502007-09-13 17:26:40 +08001612 switch (acb->adapter_type) {
1613 case ACB_ADAPTER_TYPE_A: {
Al Viro80da1ad2007-10-29 05:08:28 +00001614 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001615 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, &reg->inbound_doorbell);
1616 }
1617 break;
Erich Chen1c57e862006-07-12 08:59:32 -07001618
Nick Cheng1a4f5502007-09-13 17:26:40 +08001619 case ACB_ADAPTER_TYPE_B: {
Al Viro80da1ad2007-10-29 05:08:28 +00001620 struct MessageUnit_B *reg = acb->pmuB;
Nick Chengae52e7f2010-06-18 15:39:12 +08001621 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001622 }
1623 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001624 case ACB_ADAPTER_TYPE_C: {
1625 struct MessageUnit_C __iomem *reg = acb->pmuC;
Ching Huang5b374792014-08-19 15:25:22 +08001626
Nick Chengcdd3cb12010-07-13 20:03:04 +08001627 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, &reg->inbound_doorbell);
1628 }
Ching Huang5b374792014-08-19 15:25:22 +08001629 break;
1630 case ACB_ADAPTER_TYPE_D: {
1631 struct MessageUnit_D *reg = acb->pmuD;
1632 writel(ARCMSR_ARC1214_DRV2IOP_DATA_OUT_READ,
1633 reg->inbound_doorbell);
1634 }
1635 break;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001636 }
1637}
1638
1639static void arcmsr_iop_message_wrote(struct AdapterControlBlock *acb)
1640{
1641 switch (acb->adapter_type) {
1642 case ACB_ADAPTER_TYPE_A: {
Al Viro80da1ad2007-10-29 05:08:28 +00001643 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001644 /*
1645 ** push inbound doorbell tell iop, driver data write ok
1646 ** and wait reply on next hwinterrupt for next Qbuffer post
1647 */
1648 writel(ARCMSR_INBOUND_DRIVER_DATA_WRITE_OK, &reg->inbound_doorbell);
1649 }
1650 break;
1651
1652 case ACB_ADAPTER_TYPE_B: {
Al Viro80da1ad2007-10-29 05:08:28 +00001653 struct MessageUnit_B *reg = acb->pmuB;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001654 /*
1655 ** push inbound doorbell tell iop, driver data write ok
1656 ** and wait reply on next hwinterrupt for next Qbuffer post
1657 */
Nick Chengae52e7f2010-06-18 15:39:12 +08001658 writel(ARCMSR_DRV2IOP_DATA_WRITE_OK, reg->drv2iop_doorbell);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001659 }
1660 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001661 case ACB_ADAPTER_TYPE_C: {
1662 struct MessageUnit_C __iomem *reg = acb->pmuC;
1663 /*
1664 ** push inbound doorbell tell iop, driver data write ok
1665 ** and wait reply on next hwinterrupt for next Qbuffer post
1666 */
1667 writel(ARCMSR_HBCMU_DRV2IOP_DATA_WRITE_OK, &reg->inbound_doorbell);
1668 }
1669 break;
Ching Huang5b374792014-08-19 15:25:22 +08001670 case ACB_ADAPTER_TYPE_D: {
1671 struct MessageUnit_D *reg = acb->pmuD;
1672 writel(ARCMSR_ARC1214_DRV2IOP_DATA_IN_READY,
1673 reg->inbound_doorbell);
1674 }
1675 break;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001676 }
1677}
1678
Al Viro80da1ad2007-10-29 05:08:28 +00001679struct QBUFFER __iomem *arcmsr_get_iop_rqbuffer(struct AdapterControlBlock *acb)
Nick Cheng1a4f5502007-09-13 17:26:40 +08001680{
Al Viro0c7eb2e2007-10-29 05:08:58 +00001681 struct QBUFFER __iomem *qbuffer = NULL;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001682 switch (acb->adapter_type) {
1683
1684 case ACB_ADAPTER_TYPE_A: {
Al Viro80da1ad2007-10-29 05:08:28 +00001685 struct MessageUnit_A __iomem *reg = acb->pmuA;
1686 qbuffer = (struct QBUFFER __iomem *)&reg->message_rbuffer;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001687 }
1688 break;
1689
1690 case ACB_ADAPTER_TYPE_B: {
Al Viro80da1ad2007-10-29 05:08:28 +00001691 struct MessageUnit_B *reg = acb->pmuB;
Nick Chengae52e7f2010-06-18 15:39:12 +08001692 qbuffer = (struct QBUFFER __iomem *)reg->message_rbuffer;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001693 }
1694 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001695 case ACB_ADAPTER_TYPE_C: {
Ching Huangc10b1d52014-08-19 15:20:31 +08001696 struct MessageUnit_C __iomem *phbcmu = acb->pmuC;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001697 qbuffer = (struct QBUFFER __iomem *)&phbcmu->message_rbuffer;
1698 }
Ching Huang5b374792014-08-19 15:25:22 +08001699 break;
1700 case ACB_ADAPTER_TYPE_D: {
1701 struct MessageUnit_D *reg = acb->pmuD;
1702 qbuffer = (struct QBUFFER __iomem *)reg->message_rbuffer;
1703 }
1704 break;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001705 }
1706 return qbuffer;
1707}
1708
Al Viro80da1ad2007-10-29 05:08:28 +00001709static struct QBUFFER __iomem *arcmsr_get_iop_wqbuffer(struct AdapterControlBlock *acb)
Nick Cheng1a4f5502007-09-13 17:26:40 +08001710{
Al Viro0c7eb2e2007-10-29 05:08:58 +00001711 struct QBUFFER __iomem *pqbuffer = NULL;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001712 switch (acb->adapter_type) {
1713
1714 case ACB_ADAPTER_TYPE_A: {
Al Viro80da1ad2007-10-29 05:08:28 +00001715 struct MessageUnit_A __iomem *reg = acb->pmuA;
1716 pqbuffer = (struct QBUFFER __iomem *) &reg->message_wbuffer;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001717 }
1718 break;
1719
1720 case ACB_ADAPTER_TYPE_B: {
Al Viro80da1ad2007-10-29 05:08:28 +00001721 struct MessageUnit_B *reg = acb->pmuB;
Nick Chengae52e7f2010-06-18 15:39:12 +08001722 pqbuffer = (struct QBUFFER __iomem *)reg->message_wbuffer;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001723 }
1724 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001725 case ACB_ADAPTER_TYPE_C: {
Ching Huangc10b1d52014-08-19 15:20:31 +08001726 struct MessageUnit_C __iomem *reg = acb->pmuC;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001727 pqbuffer = (struct QBUFFER __iomem *)&reg->message_wbuffer;
Ching Huang5b374792014-08-19 15:25:22 +08001728 }
1729 break;
1730 case ACB_ADAPTER_TYPE_D: {
1731 struct MessageUnit_D *reg = acb->pmuD;
1732 pqbuffer = (struct QBUFFER __iomem *)reg->message_wbuffer;
1733 }
1734 break;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001735 }
1736 return pqbuffer;
1737}
1738
Ching Huangbb263c42014-08-19 15:17:45 +08001739static uint32_t
1740arcmsr_Read_iop_rqbuffer_in_DWORD(struct AdapterControlBlock *acb,
1741 struct QBUFFER __iomem *prbuffer)
Nick Cheng1a4f5502007-09-13 17:26:40 +08001742{
Ching Huangbb263c42014-08-19 15:17:45 +08001743 uint8_t *pQbuffer;
1744 uint8_t *buf1 = NULL;
1745 uint32_t __iomem *iop_data;
1746 uint32_t iop_len, data_len, *buf2 = NULL;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001747
Ching Huangbb263c42014-08-19 15:17:45 +08001748 iop_data = (uint32_t __iomem *)prbuffer->data;
1749 iop_len = readl(&prbuffer->data_len);
1750 if (iop_len > 0) {
1751 buf1 = kmalloc(128, GFP_ATOMIC);
1752 buf2 = (uint32_t *)buf1;
1753 if (buf1 == NULL)
1754 return 0;
1755 data_len = iop_len;
1756 while (data_len >= 4) {
1757 *buf2++ = readl(iop_data);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001758 iop_data++;
Ching Huangbb263c42014-08-19 15:17:45 +08001759 data_len -= 4;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001760 }
Ching Huangbb263c42014-08-19 15:17:45 +08001761 if (data_len)
1762 *buf2 = readl(iop_data);
1763 buf2 = (uint32_t *)buf1;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001764 }
Ching Huangbb263c42014-08-19 15:17:45 +08001765 while (iop_len > 0) {
Ching Huang2e9feb42014-09-24 17:33:34 +08001766 pQbuffer = &acb->rqbuffer[acb->rqbuf_putIndex];
Ching Huangbb263c42014-08-19 15:17:45 +08001767 *pQbuffer = *buf1;
Ching Huang2e9feb42014-09-24 17:33:34 +08001768 acb->rqbuf_putIndex++;
Ching Huangbb263c42014-08-19 15:17:45 +08001769 /* if last, index number set it to 0 */
Ching Huang2e9feb42014-09-24 17:33:34 +08001770 acb->rqbuf_putIndex %= ARCMSR_MAX_QBUFFER;
Ching Huangbb263c42014-08-19 15:17:45 +08001771 buf1++;
1772 iop_len--;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001773 }
Ching Huang2e9feb42014-09-24 17:33:34 +08001774 kfree(buf2);
Ching Huangbb263c42014-08-19 15:17:45 +08001775 /* let IOP know data has been read */
1776 arcmsr_iop_message_read(acb);
1777 return 1;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001778}
1779
Ching Huangbb263c42014-08-19 15:17:45 +08001780uint32_t
1781arcmsr_Read_iop_rqbuffer_data(struct AdapterControlBlock *acb,
1782 struct QBUFFER __iomem *prbuffer) {
1783
1784 uint8_t *pQbuffer;
1785 uint8_t __iomem *iop_data;
1786 uint32_t iop_len;
1787
Ching Huang52b4dab2017-12-05 09:28:04 +08001788 if (acb->adapter_type > ACB_ADAPTER_TYPE_B)
Ching Huangbb263c42014-08-19 15:17:45 +08001789 return arcmsr_Read_iop_rqbuffer_in_DWORD(acb, prbuffer);
1790 iop_data = (uint8_t __iomem *)prbuffer->data;
1791 iop_len = readl(&prbuffer->data_len);
1792 while (iop_len > 0) {
Ching Huang2e9feb42014-09-24 17:33:34 +08001793 pQbuffer = &acb->rqbuffer[acb->rqbuf_putIndex];
Ching Huangbb263c42014-08-19 15:17:45 +08001794 *pQbuffer = readb(iop_data);
Ching Huang2e9feb42014-09-24 17:33:34 +08001795 acb->rqbuf_putIndex++;
1796 acb->rqbuf_putIndex %= ARCMSR_MAX_QBUFFER;
Ching Huangbb263c42014-08-19 15:17:45 +08001797 iop_data++;
1798 iop_len--;
1799 }
1800 arcmsr_iop_message_read(acb);
1801 return 1;
1802}
1803
1804static void arcmsr_iop2drv_data_wrote_handle(struct AdapterControlBlock *acb)
Nick Cheng1a4f5502007-09-13 17:26:40 +08001805{
Ching Huangbb263c42014-08-19 15:17:45 +08001806 unsigned long flags;
1807 struct QBUFFER __iomem *prbuffer;
1808 int32_t buf_empty_len;
1809
1810 spin_lock_irqsave(&acb->rqbuffer_lock, flags);
1811 prbuffer = arcmsr_get_iop_rqbuffer(acb);
Ching Huang2e9feb42014-09-24 17:33:34 +08001812 buf_empty_len = (acb->rqbuf_putIndex - acb->rqbuf_getIndex - 1) &
Ching Huangbb263c42014-08-19 15:17:45 +08001813 (ARCMSR_MAX_QBUFFER - 1);
1814 if (buf_empty_len >= readl(&prbuffer->data_len)) {
1815 if (arcmsr_Read_iop_rqbuffer_data(acb, prbuffer) == 0)
1816 acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW;
1817 } else
1818 acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW;
1819 spin_unlock_irqrestore(&acb->rqbuffer_lock, flags);
1820}
1821
1822static void arcmsr_write_ioctldata2iop_in_DWORD(struct AdapterControlBlock *acb)
1823{
1824 uint8_t *pQbuffer;
1825 struct QBUFFER __iomem *pwbuffer;
1826 uint8_t *buf1 = NULL;
1827 uint32_t __iomem *iop_data;
1828 uint32_t allxfer_len = 0, data_len, *buf2 = NULL, data;
1829
1830 if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_READED) {
1831 buf1 = kmalloc(128, GFP_ATOMIC);
1832 buf2 = (uint32_t *)buf1;
1833 if (buf1 == NULL)
1834 return;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001835
1836 acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED);
1837 pwbuffer = arcmsr_get_iop_wqbuffer(acb);
Ching Huangbb263c42014-08-19 15:17:45 +08001838 iop_data = (uint32_t __iomem *)pwbuffer->data;
Ching Huang2e9feb42014-09-24 17:33:34 +08001839 while ((acb->wqbuf_getIndex != acb->wqbuf_putIndex)
Ching Huangbb263c42014-08-19 15:17:45 +08001840 && (allxfer_len < 124)) {
Ching Huang2e9feb42014-09-24 17:33:34 +08001841 pQbuffer = &acb->wqbuffer[acb->wqbuf_getIndex];
Ching Huangbb263c42014-08-19 15:17:45 +08001842 *buf1 = *pQbuffer;
Ching Huang2e9feb42014-09-24 17:33:34 +08001843 acb->wqbuf_getIndex++;
1844 acb->wqbuf_getIndex %= ARCMSR_MAX_QBUFFER;
Ching Huangbb263c42014-08-19 15:17:45 +08001845 buf1++;
1846 allxfer_len++;
1847 }
1848 data_len = allxfer_len;
1849 buf1 = (uint8_t *)buf2;
1850 while (data_len >= 4) {
1851 data = *buf2++;
1852 writel(data, iop_data);
1853 iop_data++;
1854 data_len -= 4;
1855 }
1856 if (data_len) {
1857 data = *buf2;
1858 writel(data, iop_data);
1859 }
1860 writel(allxfer_len, &pwbuffer->data_len);
1861 kfree(buf1);
1862 arcmsr_iop_message_wrote(acb);
1863 }
1864}
1865
1866void
1867arcmsr_write_ioctldata2iop(struct AdapterControlBlock *acb)
1868{
1869 uint8_t *pQbuffer;
1870 struct QBUFFER __iomem *pwbuffer;
1871 uint8_t __iomem *iop_data;
1872 int32_t allxfer_len = 0;
1873
Ching Huang52b4dab2017-12-05 09:28:04 +08001874 if (acb->adapter_type > ACB_ADAPTER_TYPE_B) {
Ching Huangbb263c42014-08-19 15:17:45 +08001875 arcmsr_write_ioctldata2iop_in_DWORD(acb);
1876 return;
1877 }
1878 if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_READED) {
1879 acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED);
1880 pwbuffer = arcmsr_get_iop_wqbuffer(acb);
1881 iop_data = (uint8_t __iomem *)pwbuffer->data;
Ching Huang2e9feb42014-09-24 17:33:34 +08001882 while ((acb->wqbuf_getIndex != acb->wqbuf_putIndex)
Ching Huangbb263c42014-08-19 15:17:45 +08001883 && (allxfer_len < 124)) {
Ching Huang2e9feb42014-09-24 17:33:34 +08001884 pQbuffer = &acb->wqbuffer[acb->wqbuf_getIndex];
Ching Huangbb263c42014-08-19 15:17:45 +08001885 writeb(*pQbuffer, iop_data);
Ching Huang2e9feb42014-09-24 17:33:34 +08001886 acb->wqbuf_getIndex++;
1887 acb->wqbuf_getIndex %= ARCMSR_MAX_QBUFFER;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001888 iop_data++;
1889 allxfer_len++;
1890 }
Ching Huangbb263c42014-08-19 15:17:45 +08001891 writel(allxfer_len, &pwbuffer->data_len);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001892 arcmsr_iop_message_wrote(acb);
1893 }
Ching Huangbb263c42014-08-19 15:17:45 +08001894}
Nick Cheng1a4f5502007-09-13 17:26:40 +08001895
Ching Huangbb263c42014-08-19 15:17:45 +08001896static void arcmsr_iop2drv_data_read_handle(struct AdapterControlBlock *acb)
1897{
1898 unsigned long flags;
1899
1900 spin_lock_irqsave(&acb->wqbuffer_lock, flags);
1901 acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_READED;
Ching Huang2e9feb42014-09-24 17:33:34 +08001902 if (acb->wqbuf_getIndex != acb->wqbuf_putIndex)
Ching Huangbb263c42014-08-19 15:17:45 +08001903 arcmsr_write_ioctldata2iop(acb);
Ching Huang2e9feb42014-09-24 17:33:34 +08001904 if (acb->wqbuf_getIndex == acb->wqbuf_putIndex)
Nick Cheng1a4f5502007-09-13 17:26:40 +08001905 acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_CLEARED;
Ching Huangbb263c42014-08-19 15:17:45 +08001906 spin_unlock_irqrestore(&acb->wqbuffer_lock, flags);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001907}
1908
Ching Huang626fa322014-08-19 15:10:12 +08001909static void arcmsr_hbaA_doorbell_isr(struct AdapterControlBlock *acb)
Nick Cheng1a4f5502007-09-13 17:26:40 +08001910{
1911 uint32_t outbound_doorbell;
Al Viro80da1ad2007-10-29 05:08:28 +00001912 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001913 outbound_doorbell = readl(&reg->outbound_doorbell);
Ching Huang6b393722014-08-19 14:18:24 +08001914 do {
1915 writel(outbound_doorbell, &reg->outbound_doorbell);
1916 if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK)
1917 arcmsr_iop2drv_data_wrote_handle(acb);
1918 if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_READ_OK)
1919 arcmsr_iop2drv_data_read_handle(acb);
1920 outbound_doorbell = readl(&reg->outbound_doorbell);
1921 } while (outbound_doorbell & (ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK
1922 | ARCMSR_OUTBOUND_IOP331_DATA_READ_OK));
Nick Cheng1a4f5502007-09-13 17:26:40 +08001923}
Ching Huang626fa322014-08-19 15:10:12 +08001924static void arcmsr_hbaC_doorbell_isr(struct AdapterControlBlock *pACB)
Nick Chengcdd3cb12010-07-13 20:03:04 +08001925{
1926 uint32_t outbound_doorbell;
Ching Huangc10b1d52014-08-19 15:20:31 +08001927 struct MessageUnit_C __iomem *reg = pACB->pmuC;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001928 /*
1929 *******************************************************************
1930 ** Maybe here we need to check wrqbuffer_lock is lock or not
1931 ** DOORBELL: din! don!
1932 ** check if there are any mail need to pack from firmware
1933 *******************************************************************
1934 */
1935 outbound_doorbell = readl(&reg->outbound_doorbell);
Ching Huang6b393722014-08-19 14:18:24 +08001936 do {
1937 writel(outbound_doorbell, &reg->outbound_doorbell_clear);
1938 readl(&reg->outbound_doorbell_clear);
1939 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_DATA_WRITE_OK)
1940 arcmsr_iop2drv_data_wrote_handle(pACB);
1941 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_DATA_READ_OK)
1942 arcmsr_iop2drv_data_read_handle(pACB);
1943 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE)
Ching Huang626fa322014-08-19 15:10:12 +08001944 arcmsr_hbaC_message_isr(pACB);
Ching Huang6b393722014-08-19 14:18:24 +08001945 outbound_doorbell = readl(&reg->outbound_doorbell);
1946 } while (outbound_doorbell & (ARCMSR_HBCMU_IOP2DRV_DATA_WRITE_OK
1947 | ARCMSR_HBCMU_IOP2DRV_DATA_READ_OK
1948 | ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE));
Nick Chengcdd3cb12010-07-13 20:03:04 +08001949}
Ching Huang5b374792014-08-19 15:25:22 +08001950
1951static void arcmsr_hbaD_doorbell_isr(struct AdapterControlBlock *pACB)
1952{
1953 uint32_t outbound_doorbell;
1954 struct MessageUnit_D *pmu = pACB->pmuD;
1955
1956 outbound_doorbell = readl(pmu->outbound_doorbell);
1957 do {
1958 writel(outbound_doorbell, pmu->outbound_doorbell);
1959 if (outbound_doorbell & ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE)
1960 arcmsr_hbaD_message_isr(pACB);
1961 if (outbound_doorbell & ARCMSR_ARC1214_IOP2DRV_DATA_WRITE_OK)
1962 arcmsr_iop2drv_data_wrote_handle(pACB);
1963 if (outbound_doorbell & ARCMSR_ARC1214_IOP2DRV_DATA_READ_OK)
1964 arcmsr_iop2drv_data_read_handle(pACB);
1965 outbound_doorbell = readl(pmu->outbound_doorbell);
1966 } while (outbound_doorbell & (ARCMSR_ARC1214_IOP2DRV_DATA_WRITE_OK
1967 | ARCMSR_ARC1214_IOP2DRV_DATA_READ_OK
1968 | ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE));
1969}
1970
Ching Huang626fa322014-08-19 15:10:12 +08001971static void arcmsr_hbaA_postqueue_isr(struct AdapterControlBlock *acb)
Nick Cheng1a4f5502007-09-13 17:26:40 +08001972{
1973 uint32_t flag_ccb;
Al Viro80da1ad2007-10-29 05:08:28 +00001974 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001975 struct ARCMSR_CDB *pARCMSR_CDB;
1976 struct CommandControlBlock *pCCB;
1977 bool error;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001978 while ((flag_ccb = readl(&reg->outbound_queueport)) != 0xFFFFFFFF) {
Nick Chengcdd3cb12010-07-13 20:03:04 +08001979 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));/*frame must be 32 bytes aligned*/
1980 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
1981 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
1982 arcmsr_drain_donequeue(acb, pCCB, error);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001983 }
1984}
Ching Huang626fa322014-08-19 15:10:12 +08001985static void arcmsr_hbaB_postqueue_isr(struct AdapterControlBlock *acb)
Nick Cheng1a4f5502007-09-13 17:26:40 +08001986{
1987 uint32_t index;
1988 uint32_t flag_ccb;
Al Viro80da1ad2007-10-29 05:08:28 +00001989 struct MessageUnit_B *reg = acb->pmuB;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001990 struct ARCMSR_CDB *pARCMSR_CDB;
1991 struct CommandControlBlock *pCCB;
1992 bool error;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001993 index = reg->doneq_index;
Ching Huangc10b1d52014-08-19 15:20:31 +08001994 while ((flag_ccb = reg->done_qbuffer[index]) != 0) {
1995 reg->done_qbuffer[index] = 0;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001996 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset+(flag_ccb << 5));/*frame must be 32 bytes aligned*/
1997 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
1998 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
1999 arcmsr_drain_donequeue(acb, pCCB, error);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002000 index++;
2001 index %= ARCMSR_MAX_HBB_POSTQUEUE;
2002 reg->doneq_index = index;
2003 }
2004}
Nick Chengcdd3cb12010-07-13 20:03:04 +08002005
Ching Huang626fa322014-08-19 15:10:12 +08002006static void arcmsr_hbaC_postqueue_isr(struct AdapterControlBlock *acb)
Nick Chengcdd3cb12010-07-13 20:03:04 +08002007{
Ching Huangc10b1d52014-08-19 15:20:31 +08002008 struct MessageUnit_C __iomem *phbcmu;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002009 struct ARCMSR_CDB *arcmsr_cdb;
2010 struct CommandControlBlock *ccb;
2011 uint32_t flag_ccb, ccb_cdb_phy, throttling = 0;
2012 int error;
2013
Ching Huangc10b1d52014-08-19 15:20:31 +08002014 phbcmu = acb->pmuC;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002015 /* areca cdb command done */
2016 /* Use correct offset and size for syncing */
2017
Ching Huang6b393722014-08-19 14:18:24 +08002018 while ((flag_ccb = readl(&phbcmu->outbound_queueport_low)) !=
2019 0xFFFFFFFF) {
2020 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);
2021 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset
2022 + ccb_cdb_phy);
2023 ccb = container_of(arcmsr_cdb, struct CommandControlBlock,
2024 arcmsr_cdb);
2025 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1)
2026 ? true : false;
2027 /* check if command done with no error */
2028 arcmsr_drain_donequeue(acb, ccb, error);
2029 throttling++;
2030 if (throttling == ARCMSR_HBC_ISR_THROTTLING_LEVEL) {
2031 writel(ARCMSR_HBCMU_DRV2IOP_POSTQUEUE_THROTTLING,
2032 &phbcmu->inbound_doorbell);
2033 throttling = 0;
2034 }
Nick Chengcdd3cb12010-07-13 20:03:04 +08002035 }
2036}
Ching Huang5b374792014-08-19 15:25:22 +08002037
2038static void arcmsr_hbaD_postqueue_isr(struct AdapterControlBlock *acb)
2039{
Ching Huang3b8155d2014-09-15 19:05:33 +08002040 u32 outbound_write_pointer, doneq_index, index_stripped, toggle;
Ching Huang5b374792014-08-19 15:25:22 +08002041 uint32_t addressLow, ccb_cdb_phy;
2042 int error;
2043 struct MessageUnit_D *pmu;
2044 struct ARCMSR_CDB *arcmsr_cdb;
2045 struct CommandControlBlock *ccb;
2046 unsigned long flags;
2047
2048 spin_lock_irqsave(&acb->doneq_lock, flags);
2049 pmu = acb->pmuD;
2050 outbound_write_pointer = pmu->done_qbuffer[0].addressLow + 1;
2051 doneq_index = pmu->doneq_index;
2052 if ((doneq_index & 0xFFF) != (outbound_write_pointer & 0xFFF)) {
2053 do {
Ching Huang3b8155d2014-09-15 19:05:33 +08002054 toggle = doneq_index & 0x4000;
2055 index_stripped = (doneq_index & 0xFFF) + 1;
2056 index_stripped %= ARCMSR_MAX_ARC1214_DONEQUEUE;
2057 pmu->doneq_index = index_stripped ? (index_stripped | toggle) :
2058 ((toggle ^ 0x4000) + 1);
Ching Huang5b374792014-08-19 15:25:22 +08002059 doneq_index = pmu->doneq_index;
2060 addressLow = pmu->done_qbuffer[doneq_index &
2061 0xFFF].addressLow;
2062 ccb_cdb_phy = (addressLow & 0xFFFFFFF0);
2063 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset
2064 + ccb_cdb_phy);
2065 ccb = container_of(arcmsr_cdb,
2066 struct CommandControlBlock, arcmsr_cdb);
2067 error = (addressLow & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1)
2068 ? true : false;
2069 arcmsr_drain_donequeue(acb, ccb, error);
2070 writel(doneq_index, pmu->outboundlist_read_pointer);
2071 } while ((doneq_index & 0xFFF) !=
2072 (outbound_write_pointer & 0xFFF));
2073 }
2074 writel(ARCMSR_ARC1214_OUTBOUND_LIST_INTERRUPT_CLEAR,
2075 pmu->outboundlist_interrupt_cause);
2076 readl(pmu->outboundlist_interrupt_cause);
2077 spin_unlock_irqrestore(&acb->doneq_lock, flags);
2078}
2079
Nick Cheng36b83de2010-05-17 11:22:42 +08002080/*
2081**********************************************************************************
2082** Handle a message interrupt
2083**
Nick Chengcdd3cb12010-07-13 20:03:04 +08002084** The only message interrupt we expect is in response to a query for the current adapter config.
Nick Cheng36b83de2010-05-17 11:22:42 +08002085** We want this in order to compare the drivemap so that we can detect newly-attached drives.
2086**********************************************************************************
2087*/
Ching Huang626fa322014-08-19 15:10:12 +08002088static void arcmsr_hbaA_message_isr(struct AdapterControlBlock *acb)
Nick Cheng36b83de2010-05-17 11:22:42 +08002089{
Ching Huangc10b1d52014-08-19 15:20:31 +08002090 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng36b83de2010-05-17 11:22:42 +08002091 /*clear interrupt and message state*/
2092 writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT, &reg->outbound_intstatus);
2093 schedule_work(&acb->arcmsr_do_message_isr_bh);
2094}
Ching Huang626fa322014-08-19 15:10:12 +08002095static void arcmsr_hbaB_message_isr(struct AdapterControlBlock *acb)
Nick Cheng36b83de2010-05-17 11:22:42 +08002096{
2097 struct MessageUnit_B *reg = acb->pmuB;
2098
2099 /*clear interrupt and message state*/
Nick Chengae52e7f2010-06-18 15:39:12 +08002100 writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
Nick Cheng36b83de2010-05-17 11:22:42 +08002101 schedule_work(&acb->arcmsr_do_message_isr_bh);
2102}
Nick Chengcdd3cb12010-07-13 20:03:04 +08002103/*
2104**********************************************************************************
2105** Handle a message interrupt
2106**
2107** The only message interrupt we expect is in response to a query for the
2108** current adapter config.
2109** We want this in order to compare the drivemap so that we can detect newly-attached drives.
2110**********************************************************************************
2111*/
Ching Huang626fa322014-08-19 15:10:12 +08002112static void arcmsr_hbaC_message_isr(struct AdapterControlBlock *acb)
Nick Chengcdd3cb12010-07-13 20:03:04 +08002113{
Ching Huangc10b1d52014-08-19 15:20:31 +08002114 struct MessageUnit_C __iomem *reg = acb->pmuC;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002115 /*clear interrupt and message state*/
2116 writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, &reg->outbound_doorbell_clear);
2117 schedule_work(&acb->arcmsr_do_message_isr_bh);
2118}
2119
Ching Huang5b374792014-08-19 15:25:22 +08002120static void arcmsr_hbaD_message_isr(struct AdapterControlBlock *acb)
2121{
2122 struct MessageUnit_D *reg = acb->pmuD;
2123
2124 writel(ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE, reg->outbound_doorbell);
2125 readl(reg->outbound_doorbell);
2126 schedule_work(&acb->arcmsr_do_message_isr_bh);
2127}
2128
Ching Huang626fa322014-08-19 15:10:12 +08002129static int arcmsr_hbaA_handle_isr(struct AdapterControlBlock *acb)
Nick Cheng1a4f5502007-09-13 17:26:40 +08002130{
2131 uint32_t outbound_intstatus;
Al Viro80da1ad2007-10-29 05:08:28 +00002132 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng36b83de2010-05-17 11:22:42 +08002133 outbound_intstatus = readl(&reg->outbound_intstatus) &
Nick Chengcdd3cb12010-07-13 20:03:04 +08002134 acb->outbound_int_enable;
Ching Huang6b393722014-08-19 14:18:24 +08002135 if (!(outbound_intstatus & ARCMSR_MU_OUTBOUND_HANDLE_INT))
2136 return IRQ_NONE;
2137 do {
2138 writel(outbound_intstatus, &reg->outbound_intstatus);
2139 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_DOORBELL_INT)
Ching Huang626fa322014-08-19 15:10:12 +08002140 arcmsr_hbaA_doorbell_isr(acb);
Ching Huang6b393722014-08-19 14:18:24 +08002141 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_POSTQUEUE_INT)
Ching Huang626fa322014-08-19 15:10:12 +08002142 arcmsr_hbaA_postqueue_isr(acb);
Ching Huang6b393722014-08-19 14:18:24 +08002143 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_MESSAGE0_INT)
Ching Huang626fa322014-08-19 15:10:12 +08002144 arcmsr_hbaA_message_isr(acb);
Ching Huang6b393722014-08-19 14:18:24 +08002145 outbound_intstatus = readl(&reg->outbound_intstatus) &
2146 acb->outbound_int_enable;
2147 } while (outbound_intstatus & (ARCMSR_MU_OUTBOUND_DOORBELL_INT
2148 | ARCMSR_MU_OUTBOUND_POSTQUEUE_INT
2149 | ARCMSR_MU_OUTBOUND_MESSAGE0_INT));
2150 return IRQ_HANDLED;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002151}
2152
Ching Huang626fa322014-08-19 15:10:12 +08002153static int arcmsr_hbaB_handle_isr(struct AdapterControlBlock *acb)
Nick Cheng1a4f5502007-09-13 17:26:40 +08002154{
2155 uint32_t outbound_doorbell;
Al Viro80da1ad2007-10-29 05:08:28 +00002156 struct MessageUnit_B *reg = acb->pmuB;
Nick Chengae52e7f2010-06-18 15:39:12 +08002157 outbound_doorbell = readl(reg->iop2drv_doorbell) &
Nick Chengcdd3cb12010-07-13 20:03:04 +08002158 acb->outbound_int_enable;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002159 if (!outbound_doorbell)
Ching Huang6b393722014-08-19 14:18:24 +08002160 return IRQ_NONE;
2161 do {
2162 writel(~outbound_doorbell, reg->iop2drv_doorbell);
2163 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell);
2164 if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_WRITE_OK)
2165 arcmsr_iop2drv_data_wrote_handle(acb);
2166 if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_READ_OK)
2167 arcmsr_iop2drv_data_read_handle(acb);
2168 if (outbound_doorbell & ARCMSR_IOP2DRV_CDB_DONE)
Ching Huang626fa322014-08-19 15:10:12 +08002169 arcmsr_hbaB_postqueue_isr(acb);
Ching Huang6b393722014-08-19 14:18:24 +08002170 if (outbound_doorbell & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE)
Ching Huang626fa322014-08-19 15:10:12 +08002171 arcmsr_hbaB_message_isr(acb);
Ching Huang6b393722014-08-19 14:18:24 +08002172 outbound_doorbell = readl(reg->iop2drv_doorbell) &
2173 acb->outbound_int_enable;
2174 } while (outbound_doorbell & (ARCMSR_IOP2DRV_DATA_WRITE_OK
2175 | ARCMSR_IOP2DRV_DATA_READ_OK
2176 | ARCMSR_IOP2DRV_CDB_DONE
2177 | ARCMSR_IOP2DRV_MESSAGE_CMD_DONE));
2178 return IRQ_HANDLED;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002179}
2180
Ching Huang626fa322014-08-19 15:10:12 +08002181static int arcmsr_hbaC_handle_isr(struct AdapterControlBlock *pACB)
Nick Chengcdd3cb12010-07-13 20:03:04 +08002182{
2183 uint32_t host_interrupt_status;
Ching Huangc10b1d52014-08-19 15:20:31 +08002184 struct MessageUnit_C __iomem *phbcmu = pACB->pmuC;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002185 /*
2186 *********************************************
2187 ** check outbound intstatus
2188 *********************************************
2189 */
Ching Huang6b393722014-08-19 14:18:24 +08002190 host_interrupt_status = readl(&phbcmu->host_int_status) &
2191 (ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR |
2192 ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR);
2193 if (!host_interrupt_status)
2194 return IRQ_NONE;
2195 do {
2196 if (host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR)
Ching Huang626fa322014-08-19 15:10:12 +08002197 arcmsr_hbaC_doorbell_isr(pACB);
Ching Huang6b393722014-08-19 14:18:24 +08002198 /* MU post queue interrupts*/
2199 if (host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR)
Ching Huang626fa322014-08-19 15:10:12 +08002200 arcmsr_hbaC_postqueue_isr(pACB);
Ching Huang6b393722014-08-19 14:18:24 +08002201 host_interrupt_status = readl(&phbcmu->host_int_status);
2202 } while (host_interrupt_status & (ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR |
2203 ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR));
2204 return IRQ_HANDLED;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002205}
Ching Huang5b374792014-08-19 15:25:22 +08002206
2207static irqreturn_t arcmsr_hbaD_handle_isr(struct AdapterControlBlock *pACB)
2208{
2209 u32 host_interrupt_status;
2210 struct MessageUnit_D *pmu = pACB->pmuD;
2211
2212 host_interrupt_status = readl(pmu->host_int_status) &
2213 (ARCMSR_ARC1214_OUTBOUND_POSTQUEUE_ISR |
2214 ARCMSR_ARC1214_OUTBOUND_DOORBELL_ISR);
2215 if (!host_interrupt_status)
2216 return IRQ_NONE;
2217 do {
2218 /* MU post queue interrupts*/
2219 if (host_interrupt_status &
2220 ARCMSR_ARC1214_OUTBOUND_POSTQUEUE_ISR)
2221 arcmsr_hbaD_postqueue_isr(pACB);
2222 if (host_interrupt_status &
2223 ARCMSR_ARC1214_OUTBOUND_DOORBELL_ISR)
2224 arcmsr_hbaD_doorbell_isr(pACB);
2225 host_interrupt_status = readl(pmu->host_int_status);
2226 } while (host_interrupt_status &
2227 (ARCMSR_ARC1214_OUTBOUND_POSTQUEUE_ISR |
2228 ARCMSR_ARC1214_OUTBOUND_DOORBELL_ISR));
2229 return IRQ_HANDLED;
2230}
2231
Nick Cheng1a4f5502007-09-13 17:26:40 +08002232static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb)
2233{
2234 switch (acb->adapter_type) {
Ching Huang6b393722014-08-19 14:18:24 +08002235 case ACB_ADAPTER_TYPE_A:
Ching Huang626fa322014-08-19 15:10:12 +08002236 return arcmsr_hbaA_handle_isr(acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002237 break;
Ching Huang6b393722014-08-19 14:18:24 +08002238 case ACB_ADAPTER_TYPE_B:
Ching Huang626fa322014-08-19 15:10:12 +08002239 return arcmsr_hbaB_handle_isr(acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002240 break;
Ching Huang6b393722014-08-19 14:18:24 +08002241 case ACB_ADAPTER_TYPE_C:
Ching Huang626fa322014-08-19 15:10:12 +08002242 return arcmsr_hbaC_handle_isr(acb);
Ching Huang5b374792014-08-19 15:25:22 +08002243 case ACB_ADAPTER_TYPE_D:
2244 return arcmsr_hbaD_handle_isr(acb);
Ching Huang6b393722014-08-19 14:18:24 +08002245 default:
2246 return IRQ_NONE;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002247 }
Erich Chen1c57e862006-07-12 08:59:32 -07002248}
2249
2250static void arcmsr_iop_parking(struct AdapterControlBlock *acb)
2251{
2252 if (acb) {
2253 /* stop adapter background rebuild */
2254 if (acb->acb_flags & ACB_F_MSG_START_BGRB) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08002255 uint32_t intmask_org;
Erich Chen1c57e862006-07-12 08:59:32 -07002256 acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002257 intmask_org = arcmsr_disable_outbound_ints(acb);
Erich Chen1c57e862006-07-12 08:59:32 -07002258 arcmsr_stop_adapter_bgrb(acb);
2259 arcmsr_flush_adapter_cache(acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002260 arcmsr_enable_outbound_ints(acb, intmask_org);
Erich Chen1c57e862006-07-12 08:59:32 -07002261 }
2262 }
2263}
2264
Ching Huangbb263c42014-08-19 15:17:45 +08002265
2266void arcmsr_clear_iop2drv_rqueue_buffer(struct AdapterControlBlock *acb)
Erich Chen1c57e862006-07-12 08:59:32 -07002267{
Ching Huangbb263c42014-08-19 15:17:45 +08002268 uint32_t i;
2269
2270 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
2271 for (i = 0; i < 15; i++) {
2272 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
2273 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
Ching Huang2e9feb42014-09-24 17:33:34 +08002274 acb->rqbuf_getIndex = 0;
2275 acb->rqbuf_putIndex = 0;
Ching Huangbb263c42014-08-19 15:17:45 +08002276 arcmsr_iop_message_read(acb);
2277 mdelay(30);
Ching Huang2e9feb42014-09-24 17:33:34 +08002278 } else if (acb->rqbuf_getIndex !=
2279 acb->rqbuf_putIndex) {
2280 acb->rqbuf_getIndex = 0;
2281 acb->rqbuf_putIndex = 0;
Ching Huangbb263c42014-08-19 15:17:45 +08002282 mdelay(30);
2283 } else
2284 break;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002285 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08002286 }
2287}
2288
Nick Cheng36b83de2010-05-17 11:22:42 +08002289static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb,
Ching Huangbb263c42014-08-19 15:17:45 +08002290 struct scsi_cmnd *cmd)
Nick Cheng1a4f5502007-09-13 17:26:40 +08002291{
Erich Chen1c57e862006-07-12 08:59:32 -07002292 char *buffer;
Ching Huangbb263c42014-08-19 15:17:45 +08002293 unsigned short use_sg;
2294 int retvalue = 0, transfer_len = 0;
2295 unsigned long flags;
2296 struct CMD_MESSAGE_FIELD *pcmdmessagefld;
2297 uint32_t controlcode = (uint32_t)cmd->cmnd[5] << 24 |
2298 (uint32_t)cmd->cmnd[6] << 16 |
2299 (uint32_t)cmd->cmnd[7] << 8 |
2300 (uint32_t)cmd->cmnd[8];
FUJITA Tomonorideff2622007-05-14 19:25:56 +09002301 struct scatterlist *sg;
Ching Huangbb263c42014-08-19 15:17:45 +08002302
2303 use_sg = scsi_sg_count(cmd);
FUJITA Tomonorideff2622007-05-14 19:25:56 +09002304 sg = scsi_sglist(cmd);
Cong Wang77dfce02011-11-25 23:14:23 +08002305 buffer = kmap_atomic(sg_page(sg)) + sg->offset;
Ching Huangbb263c42014-08-19 15:17:45 +08002306 if (use_sg > 1) {
FUJITA Tomonorideff2622007-05-14 19:25:56 +09002307 retvalue = ARCMSR_MESSAGE_FAIL;
2308 goto message_out;
Erich Chen1c57e862006-07-12 08:59:32 -07002309 }
FUJITA Tomonorideff2622007-05-14 19:25:56 +09002310 transfer_len += sg->length;
Erich Chen1c57e862006-07-12 08:59:32 -07002311 if (transfer_len > sizeof(struct CMD_MESSAGE_FIELD)) {
2312 retvalue = ARCMSR_MESSAGE_FAIL;
Ching Huangbb263c42014-08-19 15:17:45 +08002313 pr_info("%s: ARCMSR_MESSAGE_FAIL!\n", __func__);
Erich Chen1c57e862006-07-12 08:59:32 -07002314 goto message_out;
2315 }
Ching Huangbb263c42014-08-19 15:17:45 +08002316 pcmdmessagefld = (struct CMD_MESSAGE_FIELD *)buffer;
2317 switch (controlcode) {
Erich Chen1c57e862006-07-12 08:59:32 -07002318 case ARCMSR_MESSAGE_READ_RQBUFFER: {
Daniel Drake69e562c2008-02-20 13:29:05 +00002319 unsigned char *ver_addr;
Ching Huang2e9feb42014-09-24 17:33:34 +08002320 uint8_t *ptmpQbuffer;
Ching Huangbb263c42014-08-19 15:17:45 +08002321 uint32_t allxfer_len = 0;
Ching Huang2e9feb42014-09-24 17:33:34 +08002322 ver_addr = kmalloc(ARCMSR_API_DATA_BUFLEN, GFP_ATOMIC);
Daniel Drake69e562c2008-02-20 13:29:05 +00002323 if (!ver_addr) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08002324 retvalue = ARCMSR_MESSAGE_FAIL;
Ching Huangbb263c42014-08-19 15:17:45 +08002325 pr_info("%s: memory not enough!\n", __func__);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002326 goto message_out;
2327 }
Daniel Drake69e562c2008-02-20 13:29:05 +00002328 ptmpQbuffer = ver_addr;
Ching Huangbb263c42014-08-19 15:17:45 +08002329 spin_lock_irqsave(&acb->rqbuffer_lock, flags);
Ching Huang2e9feb42014-09-24 17:33:34 +08002330 if (acb->rqbuf_getIndex != acb->rqbuf_putIndex) {
2331 unsigned int tail = acb->rqbuf_getIndex;
2332 unsigned int head = acb->rqbuf_putIndex;
2333 unsigned int cnt_to_end = CIRC_CNT_TO_END(head, tail, ARCMSR_MAX_QBUFFER);
2334
2335 allxfer_len = CIRC_CNT(head, tail, ARCMSR_MAX_QBUFFER);
2336 if (allxfer_len > ARCMSR_API_DATA_BUFLEN)
2337 allxfer_len = ARCMSR_API_DATA_BUFLEN;
2338
2339 if (allxfer_len <= cnt_to_end)
2340 memcpy(ptmpQbuffer, acb->rqbuffer + tail, allxfer_len);
2341 else {
2342 memcpy(ptmpQbuffer, acb->rqbuffer + tail, cnt_to_end);
2343 memcpy(ptmpQbuffer + cnt_to_end, acb->rqbuffer, allxfer_len - cnt_to_end);
Ching Huangbb263c42014-08-19 15:17:45 +08002344 }
Ching Huang2e9feb42014-09-24 17:33:34 +08002345 acb->rqbuf_getIndex = (acb->rqbuf_getIndex + allxfer_len) % ARCMSR_MAX_QBUFFER;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002346 }
Ching Huangbb263c42014-08-19 15:17:45 +08002347 memcpy(pcmdmessagefld->messagedatabuffer, ver_addr,
2348 allxfer_len);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002349 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
Al Viro80da1ad2007-10-29 05:08:28 +00002350 struct QBUFFER __iomem *prbuffer;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002351 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
2352 prbuffer = arcmsr_get_iop_rqbuffer(acb);
Ching Huangbb263c42014-08-19 15:17:45 +08002353 if (arcmsr_Read_iop_rqbuffer_data(acb, prbuffer) == 0)
2354 acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002355 }
Ching Huangbb263c42014-08-19 15:17:45 +08002356 spin_unlock_irqrestore(&acb->rqbuffer_lock, flags);
Daniel Drake69e562c2008-02-20 13:29:05 +00002357 kfree(ver_addr);
Ching Huangbb263c42014-08-19 15:17:45 +08002358 pcmdmessagefld->cmdmessage.Length = allxfer_len;
2359 if (acb->fw_flag == FW_DEADLOCK)
2360 pcmdmessagefld->cmdmessage.ReturnCode =
2361 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
2362 else
2363 pcmdmessagefld->cmdmessage.ReturnCode =
2364 ARCMSR_MESSAGE_RETURNCODE_OK;
Erich Chen1c57e862006-07-12 08:59:32 -07002365 break;
Ching Huangbb263c42014-08-19 15:17:45 +08002366 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08002367 case ARCMSR_MESSAGE_WRITE_WQBUFFER: {
Daniel Drake69e562c2008-02-20 13:29:05 +00002368 unsigned char *ver_addr;
Dan Carpenter7bc2b552016-09-15 16:44:56 +03002369 uint32_t user_len;
2370 int32_t cnt2end;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002371 uint8_t *pQbuffer, *ptmpuserbuffer;
Borislav Petkov4bd173c2016-09-23 13:22:26 +02002372
2373 user_len = pcmdmessagefld->cmdmessage.Length;
2374 if (user_len > ARCMSR_API_DATA_BUFLEN) {
2375 retvalue = ARCMSR_MESSAGE_FAIL;
2376 goto message_out;
2377 }
2378
Ching Huang2e9feb42014-09-24 17:33:34 +08002379 ver_addr = kmalloc(ARCMSR_API_DATA_BUFLEN, GFP_ATOMIC);
Daniel Drake69e562c2008-02-20 13:29:05 +00002380 if (!ver_addr) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08002381 retvalue = ARCMSR_MESSAGE_FAIL;
2382 goto message_out;
2383 }
Daniel Drake69e562c2008-02-20 13:29:05 +00002384 ptmpuserbuffer = ver_addr;
Borislav Petkov4bd173c2016-09-23 13:22:26 +02002385
Ching Huangbb263c42014-08-19 15:17:45 +08002386 memcpy(ptmpuserbuffer,
2387 pcmdmessagefld->messagedatabuffer, user_len);
2388 spin_lock_irqsave(&acb->wqbuffer_lock, flags);
Ching Huang2e9feb42014-09-24 17:33:34 +08002389 if (acb->wqbuf_putIndex != acb->wqbuf_getIndex) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08002390 struct SENSE_DATA *sensebuffer =
2391 (struct SENSE_DATA *)cmd->sense_buffer;
Ching Huangbb263c42014-08-19 15:17:45 +08002392 arcmsr_write_ioctldata2iop(acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002393 /* has error report sensedata */
Ching Huangbb263c42014-08-19 15:17:45 +08002394 sensebuffer->ErrorCode = SCSI_SENSE_CURRENT_ERRORS;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002395 sensebuffer->SenseKey = ILLEGAL_REQUEST;
2396 sensebuffer->AdditionalSenseLength = 0x0A;
2397 sensebuffer->AdditionalSenseCode = 0x20;
2398 sensebuffer->Valid = 1;
2399 retvalue = ARCMSR_MESSAGE_FAIL;
2400 } else {
Ching Huang2e9feb42014-09-24 17:33:34 +08002401 pQbuffer = &acb->wqbuffer[acb->wqbuf_putIndex];
2402 cnt2end = ARCMSR_MAX_QBUFFER - acb->wqbuf_putIndex;
2403 if (user_len > cnt2end) {
2404 memcpy(pQbuffer, ptmpuserbuffer, cnt2end);
2405 ptmpuserbuffer += cnt2end;
2406 user_len -= cnt2end;
2407 acb->wqbuf_putIndex = 0;
2408 pQbuffer = acb->wqbuffer;
2409 }
2410 memcpy(pQbuffer, ptmpuserbuffer, user_len);
2411 acb->wqbuf_putIndex += user_len;
2412 acb->wqbuf_putIndex %= ARCMSR_MAX_QBUFFER;
2413 if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_CLEARED) {
2414 acb->acb_flags &=
Nick Cheng1a4f5502007-09-13 17:26:40 +08002415 ~ACB_F_MESSAGE_WQBUFFER_CLEARED;
Ching Huang2e9feb42014-09-24 17:33:34 +08002416 arcmsr_write_ioctldata2iop(acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002417 }
Erich Chen1c57e862006-07-12 08:59:32 -07002418 }
Ching Huangbb263c42014-08-19 15:17:45 +08002419 spin_unlock_irqrestore(&acb->wqbuffer_lock, flags);
2420 kfree(ver_addr);
2421 if (acb->fw_flag == FW_DEADLOCK)
2422 pcmdmessagefld->cmdmessage.ReturnCode =
2423 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
2424 else
2425 pcmdmessagefld->cmdmessage.ReturnCode =
2426 ARCMSR_MESSAGE_RETURNCODE_OK;
Erich Chen1c57e862006-07-12 08:59:32 -07002427 break;
Ching Huangbb263c42014-08-19 15:17:45 +08002428 }
Erich Chen1c57e862006-07-12 08:59:32 -07002429 case ARCMSR_MESSAGE_CLEAR_RQBUFFER: {
Nick Cheng1a4f5502007-09-13 17:26:40 +08002430 uint8_t *pQbuffer = acb->rqbuffer;
Ching Huangbb263c42014-08-19 15:17:45 +08002431
2432 arcmsr_clear_iop2drv_rqueue_buffer(acb);
2433 spin_lock_irqsave(&acb->rqbuffer_lock, flags);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002434 acb->acb_flags |= ACB_F_MESSAGE_RQBUFFER_CLEARED;
Ching Huang2e9feb42014-09-24 17:33:34 +08002435 acb->rqbuf_getIndex = 0;
2436 acb->rqbuf_putIndex = 0;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002437 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER);
Ching Huangbb263c42014-08-19 15:17:45 +08002438 spin_unlock_irqrestore(&acb->rqbuffer_lock, flags);
2439 if (acb->fw_flag == FW_DEADLOCK)
Nick Chengae52e7f2010-06-18 15:39:12 +08002440 pcmdmessagefld->cmdmessage.ReturnCode =
Ching Huangbb263c42014-08-19 15:17:45 +08002441 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
2442 else
Nick Chengae52e7f2010-06-18 15:39:12 +08002443 pcmdmessagefld->cmdmessage.ReturnCode =
Ching Huangbb263c42014-08-19 15:17:45 +08002444 ARCMSR_MESSAGE_RETURNCODE_OK;
Erich Chen1c57e862006-07-12 08:59:32 -07002445 break;
Ching Huangbb263c42014-08-19 15:17:45 +08002446 }
Erich Chen1c57e862006-07-12 08:59:32 -07002447 case ARCMSR_MESSAGE_CLEAR_WQBUFFER: {
Nick Cheng1a4f5502007-09-13 17:26:40 +08002448 uint8_t *pQbuffer = acb->wqbuffer;
Ching Huangbb263c42014-08-19 15:17:45 +08002449 spin_lock_irqsave(&acb->wqbuffer_lock, flags);
2450 acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED |
2451 ACB_F_MESSAGE_WQBUFFER_READED);
Ching Huang2e9feb42014-09-24 17:33:34 +08002452 acb->wqbuf_getIndex = 0;
2453 acb->wqbuf_putIndex = 0;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002454 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER);
Ching Huangbb263c42014-08-19 15:17:45 +08002455 spin_unlock_irqrestore(&acb->wqbuffer_lock, flags);
2456 if (acb->fw_flag == FW_DEADLOCK)
2457 pcmdmessagefld->cmdmessage.ReturnCode =
2458 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
2459 else
2460 pcmdmessagefld->cmdmessage.ReturnCode =
2461 ARCMSR_MESSAGE_RETURNCODE_OK;
Erich Chen1c57e862006-07-12 08:59:32 -07002462 break;
Ching Huangbb263c42014-08-19 15:17:45 +08002463 }
Erich Chen1c57e862006-07-12 08:59:32 -07002464 case ARCMSR_MESSAGE_CLEAR_ALLQBUFFER: {
Nick Cheng1a4f5502007-09-13 17:26:40 +08002465 uint8_t *pQbuffer;
Ching Huangbb263c42014-08-19 15:17:45 +08002466 arcmsr_clear_iop2drv_rqueue_buffer(acb);
2467 spin_lock_irqsave(&acb->rqbuffer_lock, flags);
2468 acb->acb_flags |= ACB_F_MESSAGE_RQBUFFER_CLEARED;
Ching Huang2e9feb42014-09-24 17:33:34 +08002469 acb->rqbuf_getIndex = 0;
2470 acb->rqbuf_putIndex = 0;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002471 pQbuffer = acb->rqbuffer;
2472 memset(pQbuffer, 0, sizeof(struct QBUFFER));
Ching Huangbb263c42014-08-19 15:17:45 +08002473 spin_unlock_irqrestore(&acb->rqbuffer_lock, flags);
2474 spin_lock_irqsave(&acb->wqbuffer_lock, flags);
2475 acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED |
2476 ACB_F_MESSAGE_WQBUFFER_READED);
Ching Huang2e9feb42014-09-24 17:33:34 +08002477 acb->wqbuf_getIndex = 0;
2478 acb->wqbuf_putIndex = 0;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002479 pQbuffer = acb->wqbuffer;
2480 memset(pQbuffer, 0, sizeof(struct QBUFFER));
Ching Huangbb263c42014-08-19 15:17:45 +08002481 spin_unlock_irqrestore(&acb->wqbuffer_lock, flags);
2482 if (acb->fw_flag == FW_DEADLOCK)
Nick Chengae52e7f2010-06-18 15:39:12 +08002483 pcmdmessagefld->cmdmessage.ReturnCode =
Ching Huangbb263c42014-08-19 15:17:45 +08002484 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
2485 else
Nick Chengae52e7f2010-06-18 15:39:12 +08002486 pcmdmessagefld->cmdmessage.ReturnCode =
Ching Huangbb263c42014-08-19 15:17:45 +08002487 ARCMSR_MESSAGE_RETURNCODE_OK;
Erich Chen1c57e862006-07-12 08:59:32 -07002488 break;
Ching Huangbb263c42014-08-19 15:17:45 +08002489 }
Erich Chen1c57e862006-07-12 08:59:32 -07002490 case ARCMSR_MESSAGE_RETURN_CODE_3F: {
Ching Huangbb263c42014-08-19 15:17:45 +08002491 if (acb->fw_flag == FW_DEADLOCK)
Nick Cheng36b83de2010-05-17 11:22:42 +08002492 pcmdmessagefld->cmdmessage.ReturnCode =
Ching Huangbb263c42014-08-19 15:17:45 +08002493 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
2494 else
Nick Chengae52e7f2010-06-18 15:39:12 +08002495 pcmdmessagefld->cmdmessage.ReturnCode =
Ching Huangbb263c42014-08-19 15:17:45 +08002496 ARCMSR_MESSAGE_RETURNCODE_3F;
Erich Chen1c57e862006-07-12 08:59:32 -07002497 break;
Ching Huangbb263c42014-08-19 15:17:45 +08002498 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08002499 case ARCMSR_MESSAGE_SAY_HELLO: {
2500 int8_t *hello_string = "Hello! I am ARCMSR";
Ching Huangbb263c42014-08-19 15:17:45 +08002501 if (acb->fw_flag == FW_DEADLOCK)
Nick Cheng36b83de2010-05-17 11:22:42 +08002502 pcmdmessagefld->cmdmessage.ReturnCode =
Ching Huangbb263c42014-08-19 15:17:45 +08002503 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
2504 else
Nick Chengae52e7f2010-06-18 15:39:12 +08002505 pcmdmessagefld->cmdmessage.ReturnCode =
Ching Huangbb263c42014-08-19 15:17:45 +08002506 ARCMSR_MESSAGE_RETURNCODE_OK;
2507 memcpy(pcmdmessagefld->messagedatabuffer,
2508 hello_string, (int16_t)strlen(hello_string));
Erich Chen1c57e862006-07-12 08:59:32 -07002509 break;
Ching Huangbb263c42014-08-19 15:17:45 +08002510 }
2511 case ARCMSR_MESSAGE_SAY_GOODBYE: {
2512 if (acb->fw_flag == FW_DEADLOCK)
Nick Cheng36b83de2010-05-17 11:22:42 +08002513 pcmdmessagefld->cmdmessage.ReturnCode =
Ching Huangbb263c42014-08-19 15:17:45 +08002514 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
2515 else
2516 pcmdmessagefld->cmdmessage.ReturnCode =
2517 ARCMSR_MESSAGE_RETURNCODE_OK;
Erich Chen1c57e862006-07-12 08:59:32 -07002518 arcmsr_iop_parking(acb);
2519 break;
Ching Huangbb263c42014-08-19 15:17:45 +08002520 }
2521 case ARCMSR_MESSAGE_FLUSH_ADAPTER_CACHE: {
2522 if (acb->fw_flag == FW_DEADLOCK)
Nick Cheng36b83de2010-05-17 11:22:42 +08002523 pcmdmessagefld->cmdmessage.ReturnCode =
Ching Huangbb263c42014-08-19 15:17:45 +08002524 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
2525 else
2526 pcmdmessagefld->cmdmessage.ReturnCode =
2527 ARCMSR_MESSAGE_RETURNCODE_OK;
Erich Chen1c57e862006-07-12 08:59:32 -07002528 arcmsr_flush_adapter_cache(acb);
2529 break;
Ching Huangbb263c42014-08-19 15:17:45 +08002530 }
Erich Chen1c57e862006-07-12 08:59:32 -07002531 default:
2532 retvalue = ARCMSR_MESSAGE_FAIL;
Ching Huangbb263c42014-08-19 15:17:45 +08002533 pr_info("%s: unknown controlcode!\n", __func__);
Erich Chen1c57e862006-07-12 08:59:32 -07002534 }
Ching Huangbb263c42014-08-19 15:17:45 +08002535message_out:
2536 if (use_sg) {
2537 struct scatterlist *sg = scsi_sglist(cmd);
2538 kunmap_atomic(buffer - sg->offset);
2539 }
Erich Chen1c57e862006-07-12 08:59:32 -07002540 return retvalue;
2541}
2542
2543static struct CommandControlBlock *arcmsr_get_freeccb(struct AdapterControlBlock *acb)
2544{
2545 struct list_head *head = &acb->ccb_free_list;
2546 struct CommandControlBlock *ccb = NULL;
Nick Chengae52e7f2010-06-18 15:39:12 +08002547 unsigned long flags;
2548 spin_lock_irqsave(&acb->ccblist_lock, flags);
Erich Chen1c57e862006-07-12 08:59:32 -07002549 if (!list_empty(head)) {
2550 ccb = list_entry(head->next, struct CommandControlBlock, list);
Nick Chengae52e7f2010-06-18 15:39:12 +08002551 list_del_init(&ccb->list);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002552 }else{
Nick Chengae52e7f2010-06-18 15:39:12 +08002553 spin_unlock_irqrestore(&acb->ccblist_lock, flags);
Ching Huangc10b1d52014-08-19 15:20:31 +08002554 return NULL;
Erich Chen1c57e862006-07-12 08:59:32 -07002555 }
Nick Chengae52e7f2010-06-18 15:39:12 +08002556 spin_unlock_irqrestore(&acb->ccblist_lock, flags);
Erich Chen1c57e862006-07-12 08:59:32 -07002557 return ccb;
2558}
2559
2560static void arcmsr_handle_virtual_command(struct AdapterControlBlock *acb,
2561 struct scsi_cmnd *cmd)
2562{
2563 switch (cmd->cmnd[0]) {
2564 case INQUIRY: {
2565 unsigned char inqdata[36];
2566 char *buffer;
FUJITA Tomonorideff2622007-05-14 19:25:56 +09002567 struct scatterlist *sg;
Erich Chen1c57e862006-07-12 08:59:32 -07002568
2569 if (cmd->device->lun) {
2570 cmd->result = (DID_TIME_OUT << 16);
2571 cmd->scsi_done(cmd);
2572 return;
2573 }
2574 inqdata[0] = TYPE_PROCESSOR;
2575 /* Periph Qualifier & Periph Dev Type */
2576 inqdata[1] = 0;
2577 /* rem media bit & Dev Type Modifier */
2578 inqdata[2] = 0;
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08002579 /* ISO, ECMA, & ANSI versions */
Erich Chen1c57e862006-07-12 08:59:32 -07002580 inqdata[4] = 31;
2581 /* length of additional data */
2582 strncpy(&inqdata[8], "Areca ", 8);
2583 /* Vendor Identification */
2584 strncpy(&inqdata[16], "RAID controller ", 16);
2585 /* Product Identification */
2586 strncpy(&inqdata[32], "R001", 4); /* Product Revision */
Erich Chen1c57e862006-07-12 08:59:32 -07002587
FUJITA Tomonorideff2622007-05-14 19:25:56 +09002588 sg = scsi_sglist(cmd);
Cong Wang77dfce02011-11-25 23:14:23 +08002589 buffer = kmap_atomic(sg_page(sg)) + sg->offset;
FUJITA Tomonorideff2622007-05-14 19:25:56 +09002590
Erich Chen1c57e862006-07-12 08:59:32 -07002591 memcpy(buffer, inqdata, sizeof(inqdata));
FUJITA Tomonorideff2622007-05-14 19:25:56 +09002592 sg = scsi_sglist(cmd);
Cong Wang77dfce02011-11-25 23:14:23 +08002593 kunmap_atomic(buffer - sg->offset);
Erich Chen1c57e862006-07-12 08:59:32 -07002594
Erich Chen1c57e862006-07-12 08:59:32 -07002595 cmd->scsi_done(cmd);
2596 }
2597 break;
2598 case WRITE_BUFFER:
2599 case READ_BUFFER: {
2600 if (arcmsr_iop_message_xfer(acb, cmd))
2601 cmd->result = (DID_ERROR << 16);
2602 cmd->scsi_done(cmd);
2603 }
2604 break;
2605 default:
2606 cmd->scsi_done(cmd);
2607 }
2608}
2609
Jeff Garzikf2812332010-11-16 02:10:29 -05002610static int arcmsr_queue_command_lck(struct scsi_cmnd *cmd,
Erich Chen1c57e862006-07-12 08:59:32 -07002611 void (* done)(struct scsi_cmnd *))
2612{
2613 struct Scsi_Host *host = cmd->device->host;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002614 struct AdapterControlBlock *acb = (struct AdapterControlBlock *) host->hostdata;
Erich Chen1c57e862006-07-12 08:59:32 -07002615 struct CommandControlBlock *ccb;
2616 int target = cmd->device->id;
Erich Chen1c57e862006-07-12 08:59:32 -07002617 cmd->scsi_done = done;
2618 cmd->host_scribble = NULL;
2619 cmd->result = 0;
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08002620 if (target == 16) {
Erich Chen1c57e862006-07-12 08:59:32 -07002621 /* virtual device for iop message transfer */
2622 arcmsr_handle_virtual_command(acb, cmd);
2623 return 0;
2624 }
Erich Chen1c57e862006-07-12 08:59:32 -07002625 ccb = arcmsr_get_freeccb(acb);
2626 if (!ccb)
2627 return SCSI_MLQUEUE_HOST_BUSY;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002628 if (arcmsr_build_ccb( acb, ccb, cmd ) == FAILED) {
Nick Cheng76d78302008-02-04 23:53:24 -08002629 cmd->result = (DID_ERROR << 16) | (RESERVATION_CONFLICT << 1);
2630 cmd->scsi_done(cmd);
2631 return 0;
2632 }
Erich Chen1c57e862006-07-12 08:59:32 -07002633 arcmsr_post_ccb(acb, ccb);
2634 return 0;
2635}
2636
Jeff Garzikf2812332010-11-16 02:10:29 -05002637static DEF_SCSI_QCMD(arcmsr_queue_command)
2638
Ching Huang626fa322014-08-19 15:10:12 +08002639static bool arcmsr_hbaA_get_config(struct AdapterControlBlock *acb)
Erich Chen1c57e862006-07-12 08:59:32 -07002640{
Al Viro80da1ad2007-10-29 05:08:28 +00002641 struct MessageUnit_A __iomem *reg = acb->pmuA;
Erich Chen1c57e862006-07-12 08:59:32 -07002642 char *acb_firm_model = acb->firm_model;
2643 char *acb_firm_version = acb->firm_version;
Nick Cheng36b83de2010-05-17 11:22:42 +08002644 char *acb_device_map = acb->device_map;
Al Viro80da1ad2007-10-29 05:08:28 +00002645 char __iomem *iop_firm_model = (char __iomem *)(&reg->message_rwbuffer[15]);
2646 char __iomem *iop_firm_version = (char __iomem *)(&reg->message_rwbuffer[17]);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002647 char __iomem *iop_device_map = (char __iomem *)(&reg->message_rwbuffer[21]);
Erich Chen1c57e862006-07-12 08:59:32 -07002648 int count;
Erich Chen1c57e862006-07-12 08:59:32 -07002649 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
Ching Huang626fa322014-08-19 15:10:12 +08002650 if (!arcmsr_hbaA_wait_msgint_ready(acb)) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08002651 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \
2652 miscellaneous data' timeout \n", acb->host->host_no);
Nick Chengae52e7f2010-06-18 15:39:12 +08002653 return false;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002654 }
Erich Chen1c57e862006-07-12 08:59:32 -07002655 count = 8;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002656 while (count){
Erich Chen1c57e862006-07-12 08:59:32 -07002657 *acb_firm_model = readb(iop_firm_model);
2658 acb_firm_model++;
2659 iop_firm_model++;
2660 count--;
2661 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08002662
Erich Chen1c57e862006-07-12 08:59:32 -07002663 count = 16;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002664 while (count){
Erich Chen1c57e862006-07-12 08:59:32 -07002665 *acb_firm_version = readb(iop_firm_version);
2666 acb_firm_version++;
2667 iop_firm_version++;
2668 count--;
2669 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08002670
Nick Chengcdd3cb12010-07-13 20:03:04 +08002671 count=16;
2672 while(count){
2673 *acb_device_map = readb(iop_device_map);
2674 acb_device_map++;
2675 iop_device_map++;
2676 count--;
2677 }
Ching Huanga2c89bb2014-08-19 15:03:55 +08002678 pr_notice("Areca RAID Controller%d: Model %s, F/W %s\n",
Nick Chengae52e7f2010-06-18 15:39:12 +08002679 acb->host->host_no,
Ching Huanga2c89bb2014-08-19 15:03:55 +08002680 acb->firm_model,
2681 acb->firm_version);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002682 acb->signature = readl(&reg->message_rwbuffer[0]);
Erich Chen1c57e862006-07-12 08:59:32 -07002683 acb->firm_request_len = readl(&reg->message_rwbuffer[1]);
2684 acb->firm_numbers_queue = readl(&reg->message_rwbuffer[2]);
2685 acb->firm_sdram_size = readl(&reg->message_rwbuffer[3]);
2686 acb->firm_hd_channels = readl(&reg->message_rwbuffer[4]);
Nick Chengae52e7f2010-06-18 15:39:12 +08002687 acb->firm_cfg_version = readl(&reg->message_rwbuffer[25]); /*firm_cfg_version,25,100-103*/
2688 return true;
Erich Chen1c57e862006-07-12 08:59:32 -07002689}
Ching Huang626fa322014-08-19 15:10:12 +08002690static bool arcmsr_hbaB_get_config(struct AdapterControlBlock *acb)
Nick Cheng1a4f5502007-09-13 17:26:40 +08002691{
Ching Huang02040672015-11-26 19:41:15 +08002692 struct MessageUnit_B *reg = acb->pmuB;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002693 char *acb_firm_model = acb->firm_model;
2694 char *acb_firm_version = acb->firm_version;
Nick Cheng36b83de2010-05-17 11:22:42 +08002695 char *acb_device_map = acb->device_map;
Nick Chengae52e7f2010-06-18 15:39:12 +08002696 char __iomem *iop_firm_model;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002697 /*firm_model,15,60-67*/
Nick Chengae52e7f2010-06-18 15:39:12 +08002698 char __iomem *iop_firm_version;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002699 /*firm_version,17,68-83*/
Nick Chengae52e7f2010-06-18 15:39:12 +08002700 char __iomem *iop_device_map;
Nick Cheng36b83de2010-05-17 11:22:42 +08002701 /*firm_version,21,84-99*/
Nick Cheng1a4f5502007-09-13 17:26:40 +08002702 int count;
Ching Huang6e38adf2014-08-19 15:14:14 +08002703
Nick Chengae52e7f2010-06-18 15:39:12 +08002704 iop_firm_model = (char __iomem *)(&reg->message_rwbuffer[15]); /*firm_model,15,60-67*/
2705 iop_firm_version = (char __iomem *)(&reg->message_rwbuffer[17]); /*firm_version,17,68-83*/
2706 iop_device_map = (char __iomem *)(&reg->message_rwbuffer[21]); /*firm_version,21,84-99*/
Nick Cheng1a4f5502007-09-13 17:26:40 +08002707
Ching Huang7e315ff2015-11-25 19:49:33 +08002708 arcmsr_wait_firmware_ready(acb);
2709 writel(ARCMSR_MESSAGE_START_DRIVER_MODE, reg->drv2iop_doorbell);
2710 if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
2711 printk(KERN_ERR "arcmsr%d: can't set driver mode.\n", acb->host->host_no);
Ching Huang02040672015-11-26 19:41:15 +08002712 return false;
Ching Huang7e315ff2015-11-25 19:49:33 +08002713 }
Nick Chengae52e7f2010-06-18 15:39:12 +08002714 writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell);
Ching Huang626fa322014-08-19 15:10:12 +08002715 if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08002716 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \
2717 miscellaneous data' timeout \n", acb->host->host_no);
Ching Huang02040672015-11-26 19:41:15 +08002718 return false;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002719 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08002720 count = 8;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002721 while (count){
2722 *acb_firm_model = readb(iop_firm_model);
2723 acb_firm_model++;
2724 iop_firm_model++;
2725 count--;
2726 }
2727 count = 16;
2728 while (count){
2729 *acb_firm_version = readb(iop_firm_version);
2730 acb_firm_version++;
2731 iop_firm_version++;
2732 count--;
2733 }
2734
2735 count = 16;
2736 while(count){
2737 *acb_device_map = readb(iop_device_map);
2738 acb_device_map++;
2739 iop_device_map++;
2740 count--;
2741 }
2742
Ching Huanga2c89bb2014-08-19 15:03:55 +08002743 pr_notice("Areca RAID Controller%d: Model %s, F/W %s\n",
Nick Chengcdd3cb12010-07-13 20:03:04 +08002744 acb->host->host_no,
Ching Huanga2c89bb2014-08-19 15:03:55 +08002745 acb->firm_model,
2746 acb->firm_version);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002747
Ching Huang251e2d22015-11-25 19:36:02 +08002748 acb->signature = readl(&reg->message_rwbuffer[0]);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002749 /*firm_signature,1,00-03*/
Ching Huang251e2d22015-11-25 19:36:02 +08002750 acb->firm_request_len = readl(&reg->message_rwbuffer[1]);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002751 /*firm_request_len,1,04-07*/
Ching Huang251e2d22015-11-25 19:36:02 +08002752 acb->firm_numbers_queue = readl(&reg->message_rwbuffer[2]);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002753 /*firm_numbers_queue,2,08-11*/
Ching Huang251e2d22015-11-25 19:36:02 +08002754 acb->firm_sdram_size = readl(&reg->message_rwbuffer[3]);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002755 /*firm_sdram_size,3,12-15*/
Ching Huang251e2d22015-11-25 19:36:02 +08002756 acb->firm_hd_channels = readl(&reg->message_rwbuffer[4]);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002757 /*firm_ide_channels,4,16-19*/
2758 acb->firm_cfg_version = readl(&reg->message_rwbuffer[25]); /*firm_cfg_version,25,100-103*/
2759 /*firm_ide_channels,4,16-19*/
2760 return true;
2761}
2762
Ching Huang626fa322014-08-19 15:10:12 +08002763static bool arcmsr_hbaC_get_config(struct AdapterControlBlock *pACB)
Nick Chengcdd3cb12010-07-13 20:03:04 +08002764{
2765 uint32_t intmask_org, Index, firmware_state = 0;
Ching Huangc10b1d52014-08-19 15:20:31 +08002766 struct MessageUnit_C __iomem *reg = pACB->pmuC;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002767 char *acb_firm_model = pACB->firm_model;
2768 char *acb_firm_version = pACB->firm_version;
Ching Huangc10b1d52014-08-19 15:20:31 +08002769 char __iomem *iop_firm_model = (char __iomem *)(&reg->msgcode_rwbuffer[15]); /*firm_model,15,60-67*/
2770 char __iomem *iop_firm_version = (char __iomem *)(&reg->msgcode_rwbuffer[17]); /*firm_version,17,68-83*/
Nick Chengcdd3cb12010-07-13 20:03:04 +08002771 int count;
2772 /* disable all outbound interrupt */
2773 intmask_org = readl(&reg->host_int_mask); /* disable outbound message0 int */
2774 writel(intmask_org|ARCMSR_HBCMU_ALL_INTMASKENABLE, &reg->host_int_mask);
2775 /* wait firmware ready */
2776 do {
2777 firmware_state = readl(&reg->outbound_msgaddr1);
2778 } while ((firmware_state & ARCMSR_HBCMU_MESSAGE_FIRMWARE_OK) == 0);
2779 /* post "get config" instruction */
2780 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
2781 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
2782 /* wait message ready */
2783 for (Index = 0; Index < 2000; Index++) {
2784 if (readl(&reg->outbound_doorbell) & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) {
2785 writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, &reg->outbound_doorbell_clear);/*clear interrupt*/
2786 break;
2787 }
2788 udelay(10);
2789 } /*max 1 seconds*/
2790 if (Index >= 2000) {
2791 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \
2792 miscellaneous data' timeout \n", pACB->host->host_no);
2793 return false;
2794 }
2795 count = 8;
Nick Chengae52e7f2010-06-18 15:39:12 +08002796 while (count) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08002797 *acb_firm_model = readb(iop_firm_model);
2798 acb_firm_model++;
2799 iop_firm_model++;
2800 count--;
2801 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08002802 count = 16;
Nick Chengae52e7f2010-06-18 15:39:12 +08002803 while (count) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08002804 *acb_firm_version = readb(iop_firm_version);
2805 acb_firm_version++;
2806 iop_firm_version++;
2807 count--;
2808 }
Ching Huanga2c89bb2014-08-19 15:03:55 +08002809 pr_notice("Areca RAID Controller%d: Model %s, F/W %s\n",
Nick Chengcdd3cb12010-07-13 20:03:04 +08002810 pACB->host->host_no,
Ching Huanga2c89bb2014-08-19 15:03:55 +08002811 pACB->firm_model,
2812 pACB->firm_version);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002813 pACB->firm_request_len = readl(&reg->msgcode_rwbuffer[1]); /*firm_request_len,1,04-07*/
2814 pACB->firm_numbers_queue = readl(&reg->msgcode_rwbuffer[2]); /*firm_numbers_queue,2,08-11*/
2815 pACB->firm_sdram_size = readl(&reg->msgcode_rwbuffer[3]); /*firm_sdram_size,3,12-15*/
2816 pACB->firm_hd_channels = readl(&reg->msgcode_rwbuffer[4]); /*firm_ide_channels,4,16-19*/
2817 pACB->firm_cfg_version = readl(&reg->msgcode_rwbuffer[25]); /*firm_cfg_version,25,100-103*/
2818 /*all interrupt service will be enable at arcmsr_iop_init*/
Nick Chengae52e7f2010-06-18 15:39:12 +08002819 return true;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002820}
Ching Huang5b374792014-08-19 15:25:22 +08002821
2822static bool arcmsr_hbaD_get_config(struct AdapterControlBlock *acb)
2823{
2824 char *acb_firm_model = acb->firm_model;
2825 char *acb_firm_version = acb->firm_version;
2826 char *acb_device_map = acb->device_map;
2827 char __iomem *iop_firm_model;
2828 char __iomem *iop_firm_version;
2829 char __iomem *iop_device_map;
2830 u32 count;
Ching Huang02040672015-11-26 19:41:15 +08002831 struct MessageUnit_D *reg = acb->pmuD;
Ching Huang5b374792014-08-19 15:25:22 +08002832
Ching Huang5b374792014-08-19 15:25:22 +08002833 iop_firm_model = (char __iomem *)(&reg->msgcode_rwbuffer[15]);
2834 iop_firm_version = (char __iomem *)(&reg->msgcode_rwbuffer[17]);
2835 iop_device_map = (char __iomem *)(&reg->msgcode_rwbuffer[21]);
2836 if (readl(acb->pmuD->outbound_doorbell) &
2837 ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE) {
2838 writel(ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE,
2839 acb->pmuD->outbound_doorbell);/*clear interrupt*/
2840 }
2841 /* post "get config" instruction */
2842 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, reg->inbound_msgaddr0);
2843 /* wait message ready */
2844 if (!arcmsr_hbaD_wait_msgint_ready(acb)) {
2845 pr_notice("arcmsr%d: wait get adapter firmware "
2846 "miscellaneous data timeout\n", acb->host->host_no);
Ching Huang5b374792014-08-19 15:25:22 +08002847 return false;
2848 }
2849 count = 8;
2850 while (count) {
2851 *acb_firm_model = readb(iop_firm_model);
2852 acb_firm_model++;
2853 iop_firm_model++;
2854 count--;
2855 }
2856 count = 16;
2857 while (count) {
2858 *acb_firm_version = readb(iop_firm_version);
2859 acb_firm_version++;
2860 iop_firm_version++;
2861 count--;
2862 }
2863 count = 16;
2864 while (count) {
2865 *acb_device_map = readb(iop_device_map);
2866 acb_device_map++;
2867 iop_device_map++;
2868 count--;
2869 }
Ching Huang251e2d22015-11-25 19:36:02 +08002870 acb->signature = readl(&reg->msgcode_rwbuffer[0]);
Ching Huang5b374792014-08-19 15:25:22 +08002871 /*firm_signature,1,00-03*/
Ching Huang251e2d22015-11-25 19:36:02 +08002872 acb->firm_request_len = readl(&reg->msgcode_rwbuffer[1]);
Ching Huang5b374792014-08-19 15:25:22 +08002873 /*firm_request_len,1,04-07*/
Ching Huang251e2d22015-11-25 19:36:02 +08002874 acb->firm_numbers_queue = readl(&reg->msgcode_rwbuffer[2]);
Ching Huang5b374792014-08-19 15:25:22 +08002875 /*firm_numbers_queue,2,08-11*/
Ching Huang251e2d22015-11-25 19:36:02 +08002876 acb->firm_sdram_size = readl(&reg->msgcode_rwbuffer[3]);
Ching Huang5b374792014-08-19 15:25:22 +08002877 /*firm_sdram_size,3,12-15*/
Ching Huang251e2d22015-11-25 19:36:02 +08002878 acb->firm_hd_channels = readl(&reg->msgcode_rwbuffer[4]);
Ching Huang5b374792014-08-19 15:25:22 +08002879 /*firm_hd_channels,4,16-19*/
2880 acb->firm_cfg_version = readl(&reg->msgcode_rwbuffer[25]);
2881 pr_notice("Areca RAID Controller%d: Model %s, F/W %s\n",
2882 acb->host->host_no,
2883 acb->firm_model,
2884 acb->firm_version);
2885 return true;
2886}
2887
Nick Chengae52e7f2010-06-18 15:39:12 +08002888static bool arcmsr_get_firmware_spec(struct AdapterControlBlock *acb)
Nick Cheng1a4f5502007-09-13 17:26:40 +08002889{
Ching Huang3df824a2014-08-19 14:29:41 +08002890 bool rtn = false;
2891
2892 switch (acb->adapter_type) {
2893 case ACB_ADAPTER_TYPE_A:
Ching Huang626fa322014-08-19 15:10:12 +08002894 rtn = arcmsr_hbaA_get_config(acb);
Ching Huang3df824a2014-08-19 14:29:41 +08002895 break;
2896 case ACB_ADAPTER_TYPE_B:
Ching Huang626fa322014-08-19 15:10:12 +08002897 rtn = arcmsr_hbaB_get_config(acb);
Ching Huang3df824a2014-08-19 14:29:41 +08002898 break;
2899 case ACB_ADAPTER_TYPE_C:
Ching Huang626fa322014-08-19 15:10:12 +08002900 rtn = arcmsr_hbaC_get_config(acb);
Ching Huang3df824a2014-08-19 14:29:41 +08002901 break;
Ching Huang5b374792014-08-19 15:25:22 +08002902 case ACB_ADAPTER_TYPE_D:
2903 rtn = arcmsr_hbaD_get_config(acb);
2904 break;
Ching Huang3df824a2014-08-19 14:29:41 +08002905 default:
2906 break;
2907 }
2908 if (acb->firm_numbers_queue > ARCMSR_MAX_OUTSTANDING_CMD)
2909 acb->maxOutstanding = ARCMSR_MAX_OUTSTANDING_CMD;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002910 else
Ching Huang3df824a2014-08-19 14:29:41 +08002911 acb->maxOutstanding = acb->firm_numbers_queue - 1;
2912 acb->host->can_queue = acb->maxOutstanding;
2913 return rtn;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002914}
2915
Ching Huang626fa322014-08-19 15:10:12 +08002916static int arcmsr_hbaA_polling_ccbdone(struct AdapterControlBlock *acb,
Erich Chen1c57e862006-07-12 08:59:32 -07002917 struct CommandControlBlock *poll_ccb)
2918{
Al Viro80da1ad2007-10-29 05:08:28 +00002919 struct MessageUnit_A __iomem *reg = acb->pmuA;
Erich Chen1c57e862006-07-12 08:59:32 -07002920 struct CommandControlBlock *ccb;
Nick Chengae52e7f2010-06-18 15:39:12 +08002921 struct ARCMSR_CDB *arcmsr_cdb;
Erich Chen1c57e862006-07-12 08:59:32 -07002922 uint32_t flag_ccb, outbound_intstatus, poll_ccb_done = 0, poll_count = 0;
Nick Chengae52e7f2010-06-18 15:39:12 +08002923 int rtn;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002924 bool error;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002925 polling_hba_ccb_retry:
Erich Chen1c57e862006-07-12 08:59:32 -07002926 poll_count++;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002927 outbound_intstatus = readl(&reg->outbound_intstatus) & acb->outbound_int_enable;
Erich Chen1c57e862006-07-12 08:59:32 -07002928 writel(outbound_intstatus, &reg->outbound_intstatus);/*clear interrupt*/
2929 while (1) {
2930 if ((flag_ccb = readl(&reg->outbound_queueport)) == 0xFFFFFFFF) {
Nick Chengcdd3cb12010-07-13 20:03:04 +08002931 if (poll_ccb_done){
Nick Chengae52e7f2010-06-18 15:39:12 +08002932 rtn = SUCCESS;
Erich Chen1c57e862006-07-12 08:59:32 -07002933 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002934 }else {
2935 msleep(25);
2936 if (poll_count > 100){
Nick Chengae52e7f2010-06-18 15:39:12 +08002937 rtn = FAILED;
Erich Chen1c57e862006-07-12 08:59:32 -07002938 break;
Nick Chengae52e7f2010-06-18 15:39:12 +08002939 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08002940 goto polling_hba_ccb_retry;
Erich Chen1c57e862006-07-12 08:59:32 -07002941 }
2942 }
Nick Chengae52e7f2010-06-18 15:39:12 +08002943 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));
2944 ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb);
Ching Huangcab5aec2014-08-19 14:47:16 +08002945 poll_ccb_done |= (ccb == poll_ccb) ? 1 : 0;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002946 if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) {
2947 if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) {
2948 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'"
Erich Chen1c57e862006-07-12 08:59:32 -07002949 " poll command abort successfully \n"
2950 , acb->host->host_no
2951 , ccb->pcmd->device->id
Hannes Reinecke9cb78c12014-06-25 15:27:36 +02002952 , (u32)ccb->pcmd->device->lun
Erich Chen1c57e862006-07-12 08:59:32 -07002953 , ccb);
2954 ccb->pcmd->result = DID_ABORT << 16;
Nick Chengae52e7f2010-06-18 15:39:12 +08002955 arcmsr_ccb_complete(ccb);
Erich Chen1c57e862006-07-12 08:59:32 -07002956 continue;
2957 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08002958 printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb"
2959 " command done ccb = '0x%p'"
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08002960 "ccboutstandingcount = %d \n"
Erich Chen1c57e862006-07-12 08:59:32 -07002961 , acb->host->host_no
2962 , ccb
2963 , atomic_read(&acb->ccboutstandingcount));
2964 continue;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002965 }
2966 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
2967 arcmsr_report_ccb_state(acb, ccb, error);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002968 }
Nick Chengae52e7f2010-06-18 15:39:12 +08002969 return rtn;
2970}
Nick Cheng1a4f5502007-09-13 17:26:40 +08002971
Ching Huang626fa322014-08-19 15:10:12 +08002972static int arcmsr_hbaB_polling_ccbdone(struct AdapterControlBlock *acb,
Nick Cheng1a4f5502007-09-13 17:26:40 +08002973 struct CommandControlBlock *poll_ccb)
2974{
Nick Chengcdd3cb12010-07-13 20:03:04 +08002975 struct MessageUnit_B *reg = acb->pmuB;
Nick Chengae52e7f2010-06-18 15:39:12 +08002976 struct ARCMSR_CDB *arcmsr_cdb;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002977 struct CommandControlBlock *ccb;
2978 uint32_t flag_ccb, poll_ccb_done = 0, poll_count = 0;
Nick Chengae52e7f2010-06-18 15:39:12 +08002979 int index, rtn;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002980 bool error;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002981 polling_hbb_ccb_retry:
NickCheng97b99122011-01-06 17:32:41 +08002982
Nick Chengcdd3cb12010-07-13 20:03:04 +08002983 poll_count++;
2984 /* clear doorbell interrupt */
Nick Chengae52e7f2010-06-18 15:39:12 +08002985 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002986 while(1){
2987 index = reg->doneq_index;
Ching Huangc10b1d52014-08-19 15:20:31 +08002988 flag_ccb = reg->done_qbuffer[index];
2989 if (flag_ccb == 0) {
Nick Chengcdd3cb12010-07-13 20:03:04 +08002990 if (poll_ccb_done){
Nick Chengae52e7f2010-06-18 15:39:12 +08002991 rtn = SUCCESS;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002992 break;
2993 }else {
2994 msleep(25);
2995 if (poll_count > 100){
Nick Chengae52e7f2010-06-18 15:39:12 +08002996 rtn = FAILED;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002997 break;
Nick Chengae52e7f2010-06-18 15:39:12 +08002998 }
Nick Chengcdd3cb12010-07-13 20:03:04 +08002999 goto polling_hbb_ccb_retry;
Erich Chen1c57e862006-07-12 08:59:32 -07003000 }
Nick Chengcdd3cb12010-07-13 20:03:04 +08003001 }
Ching Huangc10b1d52014-08-19 15:20:31 +08003002 reg->done_qbuffer[index] = 0;
Nick Chengcdd3cb12010-07-13 20:03:04 +08003003 index++;
3004 /*if last index number set it to 0 */
3005 index %= ARCMSR_MAX_HBB_POSTQUEUE;
3006 reg->doneq_index = index;
3007 /* check if command done with no error*/
Nick Chengae52e7f2010-06-18 15:39:12 +08003008 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));
3009 ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb);
Ching Huangcab5aec2014-08-19 14:47:16 +08003010 poll_ccb_done |= (ccb == poll_ccb) ? 1 : 0;
Nick Chengcdd3cb12010-07-13 20:03:04 +08003011 if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) {
3012 if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) {
Nick Chengae52e7f2010-06-18 15:39:12 +08003013 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'"
3014 " poll command abort successfully \n"
Nick Chengcdd3cb12010-07-13 20:03:04 +08003015 ,acb->host->host_no
3016 ,ccb->pcmd->device->id
Hannes Reinecke9cb78c12014-06-25 15:27:36 +02003017 ,(u32)ccb->pcmd->device->lun
Nick Chengcdd3cb12010-07-13 20:03:04 +08003018 ,ccb);
3019 ccb->pcmd->result = DID_ABORT << 16;
Nick Chengae52e7f2010-06-18 15:39:12 +08003020 arcmsr_ccb_complete(ccb);
Nick Cheng1a4f5502007-09-13 17:26:40 +08003021 continue;
Nick Chengcdd3cb12010-07-13 20:03:04 +08003022 }
3023 printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb"
3024 " command done ccb = '0x%p'"
3025 "ccboutstandingcount = %d \n"
3026 , acb->host->host_no
3027 , ccb
3028 , atomic_read(&acb->ccboutstandingcount));
3029 continue;
3030 }
3031 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
3032 arcmsr_report_ccb_state(acb, ccb, error);
3033 }
Nick Chengae52e7f2010-06-18 15:39:12 +08003034 return rtn;
Nick Cheng1a4f5502007-09-13 17:26:40 +08003035}
3036
Ching Huang626fa322014-08-19 15:10:12 +08003037static int arcmsr_hbaC_polling_ccbdone(struct AdapterControlBlock *acb,
3038 struct CommandControlBlock *poll_ccb)
Nick Chengcdd3cb12010-07-13 20:03:04 +08003039{
Ching Huangc10b1d52014-08-19 15:20:31 +08003040 struct MessageUnit_C __iomem *reg = acb->pmuC;
Nick Chengcdd3cb12010-07-13 20:03:04 +08003041 uint32_t flag_ccb, ccb_cdb_phy;
3042 struct ARCMSR_CDB *arcmsr_cdb;
3043 bool error;
3044 struct CommandControlBlock *pCCB;
3045 uint32_t poll_ccb_done = 0, poll_count = 0;
3046 int rtn;
3047polling_hbc_ccb_retry:
3048 poll_count++;
3049 while (1) {
3050 if ((readl(&reg->host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) == 0) {
3051 if (poll_ccb_done) {
3052 rtn = SUCCESS;
3053 break;
3054 } else {
3055 msleep(25);
3056 if (poll_count > 100) {
3057 rtn = FAILED;
3058 break;
3059 }
3060 goto polling_hbc_ccb_retry;
3061 }
3062 }
3063 flag_ccb = readl(&reg->outbound_queueport_low);
3064 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);
3065 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy);/*frame must be 32 bytes aligned*/
3066 pCCB = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb);
Ching Huangcab5aec2014-08-19 14:47:16 +08003067 poll_ccb_done |= (pCCB == poll_ccb) ? 1 : 0;
Nick Chengcdd3cb12010-07-13 20:03:04 +08003068 /* check ifcommand done with no error*/
3069 if ((pCCB->acb != acb) || (pCCB->startdone != ARCMSR_CCB_START)) {
3070 if (pCCB->startdone == ARCMSR_CCB_ABORTED) {
3071 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'"
3072 " poll command abort successfully \n"
3073 , acb->host->host_no
3074 , pCCB->pcmd->device->id
Hannes Reinecke9cb78c12014-06-25 15:27:36 +02003075 , (u32)pCCB->pcmd->device->lun
Nick Chengcdd3cb12010-07-13 20:03:04 +08003076 , pCCB);
3077 pCCB->pcmd->result = DID_ABORT << 16;
3078 arcmsr_ccb_complete(pCCB);
3079 continue;
3080 }
3081 printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb"
3082 " command done ccb = '0x%p'"
3083 "ccboutstandingcount = %d \n"
3084 , acb->host->host_no
3085 , pCCB
3086 , atomic_read(&acb->ccboutstandingcount));
3087 continue;
3088 }
3089 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
3090 arcmsr_report_ccb_state(acb, pCCB, error);
3091 }
3092 return rtn;
3093}
Ching Huang5b374792014-08-19 15:25:22 +08003094
3095static int arcmsr_hbaD_polling_ccbdone(struct AdapterControlBlock *acb,
3096 struct CommandControlBlock *poll_ccb)
3097{
3098 bool error;
3099 uint32_t poll_ccb_done = 0, poll_count = 0, flag_ccb, ccb_cdb_phy;
Ching Huang3b8155d2014-09-15 19:05:33 +08003100 int rtn, doneq_index, index_stripped, outbound_write_pointer, toggle;
Ching Huang5b374792014-08-19 15:25:22 +08003101 unsigned long flags;
3102 struct ARCMSR_CDB *arcmsr_cdb;
3103 struct CommandControlBlock *pCCB;
3104 struct MessageUnit_D *pmu = acb->pmuD;
3105
3106polling_hbaD_ccb_retry:
3107 poll_count++;
3108 while (1) {
Ching Huang3b8155d2014-09-15 19:05:33 +08003109 spin_lock_irqsave(&acb->doneq_lock, flags);
Ching Huang5b374792014-08-19 15:25:22 +08003110 outbound_write_pointer = pmu->done_qbuffer[0].addressLow + 1;
3111 doneq_index = pmu->doneq_index;
3112 if ((outbound_write_pointer & 0xFFF) == (doneq_index & 0xFFF)) {
Ching Huang3b8155d2014-09-15 19:05:33 +08003113 spin_unlock_irqrestore(&acb->doneq_lock, flags);
Ching Huang5b374792014-08-19 15:25:22 +08003114 if (poll_ccb_done) {
3115 rtn = SUCCESS;
3116 break;
3117 } else {
3118 msleep(25);
3119 if (poll_count > 40) {
3120 rtn = FAILED;
3121 break;
3122 }
3123 goto polling_hbaD_ccb_retry;
3124 }
3125 }
Ching Huang3b8155d2014-09-15 19:05:33 +08003126 toggle = doneq_index & 0x4000;
3127 index_stripped = (doneq_index & 0xFFF) + 1;
3128 index_stripped %= ARCMSR_MAX_ARC1214_DONEQUEUE;
3129 pmu->doneq_index = index_stripped ? (index_stripped | toggle) :
3130 ((toggle ^ 0x4000) + 1);
Ching Huang5b374792014-08-19 15:25:22 +08003131 doneq_index = pmu->doneq_index;
Ching Huang3b8155d2014-09-15 19:05:33 +08003132 spin_unlock_irqrestore(&acb->doneq_lock, flags);
Ching Huang5b374792014-08-19 15:25:22 +08003133 flag_ccb = pmu->done_qbuffer[doneq_index & 0xFFF].addressLow;
3134 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);
3135 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset +
3136 ccb_cdb_phy);
3137 pCCB = container_of(arcmsr_cdb, struct CommandControlBlock,
3138 arcmsr_cdb);
3139 poll_ccb_done |= (pCCB == poll_ccb) ? 1 : 0;
3140 if ((pCCB->acb != acb) ||
3141 (pCCB->startdone != ARCMSR_CCB_START)) {
3142 if (pCCB->startdone == ARCMSR_CCB_ABORTED) {
3143 pr_notice("arcmsr%d: scsi id = %d "
3144 "lun = %d ccb = '0x%p' poll command "
3145 "abort successfully\n"
3146 , acb->host->host_no
3147 , pCCB->pcmd->device->id
3148 , (u32)pCCB->pcmd->device->lun
3149 , pCCB);
3150 pCCB->pcmd->result = DID_ABORT << 16;
3151 arcmsr_ccb_complete(pCCB);
3152 continue;
3153 }
3154 pr_notice("arcmsr%d: polling an illegal "
3155 "ccb command done ccb = '0x%p' "
3156 "ccboutstandingcount = %d\n"
3157 , acb->host->host_no
3158 , pCCB
3159 , atomic_read(&acb->ccboutstandingcount));
3160 continue;
3161 }
3162 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1)
3163 ? true : false;
3164 arcmsr_report_ccb_state(acb, pCCB, error);
3165 }
3166 return rtn;
3167}
3168
Nick Chengae52e7f2010-06-18 15:39:12 +08003169static int arcmsr_polling_ccbdone(struct AdapterControlBlock *acb,
Nick Cheng1a4f5502007-09-13 17:26:40 +08003170 struct CommandControlBlock *poll_ccb)
3171{
Nick Chengae52e7f2010-06-18 15:39:12 +08003172 int rtn = 0;
Nick Cheng1a4f5502007-09-13 17:26:40 +08003173 switch (acb->adapter_type) {
3174
3175 case ACB_ADAPTER_TYPE_A: {
Ching Huang626fa322014-08-19 15:10:12 +08003176 rtn = arcmsr_hbaA_polling_ccbdone(acb, poll_ccb);
Nick Cheng1a4f5502007-09-13 17:26:40 +08003177 }
3178 break;
3179
3180 case ACB_ADAPTER_TYPE_B: {
Ching Huang626fa322014-08-19 15:10:12 +08003181 rtn = arcmsr_hbaB_polling_ccbdone(acb, poll_ccb);
Erich Chen1c57e862006-07-12 08:59:32 -07003182 }
Nick Chengcdd3cb12010-07-13 20:03:04 +08003183 break;
3184 case ACB_ADAPTER_TYPE_C: {
Ching Huang626fa322014-08-19 15:10:12 +08003185 rtn = arcmsr_hbaC_polling_ccbdone(acb, poll_ccb);
Nick Chengcdd3cb12010-07-13 20:03:04 +08003186 }
Ching Huang5b374792014-08-19 15:25:22 +08003187 break;
3188 case ACB_ADAPTER_TYPE_D:
3189 rtn = arcmsr_hbaD_polling_ccbdone(acb, poll_ccb);
3190 break;
Erich Chen1c57e862006-07-12 08:59:32 -07003191 }
Nick Chengae52e7f2010-06-18 15:39:12 +08003192 return rtn;
Erich Chen1c57e862006-07-12 08:59:32 -07003193}
Nick Cheng1a4f5502007-09-13 17:26:40 +08003194
3195static int arcmsr_iop_confirm(struct AdapterControlBlock *acb)
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08003196{
Nick Chengae52e7f2010-06-18 15:39:12 +08003197 uint32_t cdb_phyaddr, cdb_phyaddr_hi32;
Ching Huang6e38adf2014-08-19 15:14:14 +08003198 dma_addr_t dma_coherent_handle;
Dan Carpentere2c70422014-02-11 19:06:33 +03003199
Nick Cheng1a4f5502007-09-13 17:26:40 +08003200 /*
3201 ********************************************************************
3202 ** here we need to tell iop 331 our freeccb.HighPart
3203 ** if freeccb.HighPart is not zero
3204 ********************************************************************
3205 */
Ching Huang6e38adf2014-08-19 15:14:14 +08003206 switch (acb->adapter_type) {
3207 case ACB_ADAPTER_TYPE_B:
Ching Huang5b374792014-08-19 15:25:22 +08003208 case ACB_ADAPTER_TYPE_D:
Ching Huang6e38adf2014-08-19 15:14:14 +08003209 dma_coherent_handle = acb->dma_coherent_handle2;
3210 break;
3211 default:
3212 dma_coherent_handle = acb->dma_coherent_handle;
3213 break;
3214 }
3215 cdb_phyaddr = lower_32_bits(dma_coherent_handle);
3216 cdb_phyaddr_hi32 = upper_32_bits(dma_coherent_handle);
Nick Chengcdd3cb12010-07-13 20:03:04 +08003217 acb->cdb_phyaddr_hi32 = cdb_phyaddr_hi32;
Nick Cheng1a4f5502007-09-13 17:26:40 +08003218 /*
3219 ***********************************************************************
3220 ** if adapter type B, set window of "post command Q"
3221 ***********************************************************************
3222 */
3223 switch (acb->adapter_type) {
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08003224
Nick Cheng1a4f5502007-09-13 17:26:40 +08003225 case ACB_ADAPTER_TYPE_A: {
Nick Chengae52e7f2010-06-18 15:39:12 +08003226 if (cdb_phyaddr_hi32 != 0) {
Al Viro80da1ad2007-10-29 05:08:28 +00003227 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng1a4f5502007-09-13 17:26:40 +08003228 writel(ARCMSR_SIGNATURE_SET_CONFIG, \
3229 &reg->message_rwbuffer[0]);
Nick Chengae52e7f2010-06-18 15:39:12 +08003230 writel(cdb_phyaddr_hi32, &reg->message_rwbuffer[1]);
Nick Cheng1a4f5502007-09-13 17:26:40 +08003231 writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, \
3232 &reg->inbound_msgaddr0);
Ching Huang626fa322014-08-19 15:10:12 +08003233 if (!arcmsr_hbaA_wait_msgint_ready(acb)) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08003234 printk(KERN_NOTICE "arcmsr%d: ""set ccb high \
3235 part physical address timeout\n",
3236 acb->host->host_no);
3237 return 1;
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08003238 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08003239 }
3240 }
3241 break;
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08003242
Nick Cheng1a4f5502007-09-13 17:26:40 +08003243 case ACB_ADAPTER_TYPE_B: {
Al Viro80da1ad2007-10-29 05:08:28 +00003244 uint32_t __iomem *rwbuffer;
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08003245
Al Viro80da1ad2007-10-29 05:08:28 +00003246 struct MessageUnit_B *reg = acb->pmuB;
Nick Cheng1a4f5502007-09-13 17:26:40 +08003247 reg->postq_index = 0;
3248 reg->doneq_index = 0;
Nick Chengae52e7f2010-06-18 15:39:12 +08003249 writel(ARCMSR_MESSAGE_SET_POST_WINDOW, reg->drv2iop_doorbell);
Ching Huang626fa322014-08-19 15:10:12 +08003250 if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
Nik Nyby47268a42015-06-30 17:25:27 -04003251 printk(KERN_NOTICE "arcmsr%d: cannot set driver mode\n", \
Nick Cheng1a4f5502007-09-13 17:26:40 +08003252 acb->host->host_no);
3253 return 1;
3254 }
Nick Chengae52e7f2010-06-18 15:39:12 +08003255 rwbuffer = reg->message_rwbuffer;
Nick Cheng1a4f5502007-09-13 17:26:40 +08003256 /* driver "set config" signature */
3257 writel(ARCMSR_SIGNATURE_SET_CONFIG, rwbuffer++);
3258 /* normal should be zero */
Nick Chengae52e7f2010-06-18 15:39:12 +08003259 writel(cdb_phyaddr_hi32, rwbuffer++);
Nick Cheng1a4f5502007-09-13 17:26:40 +08003260 /* postQ size (256 + 8)*4 */
Ching Huang6e38adf2014-08-19 15:14:14 +08003261 writel(cdb_phyaddr, rwbuffer++);
Nick Cheng1a4f5502007-09-13 17:26:40 +08003262 /* doneQ size (256 + 8)*4 */
Ching Huang6e38adf2014-08-19 15:14:14 +08003263 writel(cdb_phyaddr + 1056, rwbuffer++);
Nick Cheng1a4f5502007-09-13 17:26:40 +08003264 /* ccb maxQ size must be --> [(256 + 8)*4]*/
3265 writel(1056, rwbuffer);
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08003266
Nick Chengae52e7f2010-06-18 15:39:12 +08003267 writel(ARCMSR_MESSAGE_SET_CONFIG, reg->drv2iop_doorbell);
Ching Huang626fa322014-08-19 15:10:12 +08003268 if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08003269 printk(KERN_NOTICE "arcmsr%d: 'set command Q window' \
3270 timeout \n",acb->host->host_no);
3271 return 1;
3272 }
Ching Huanga5849722014-08-19 15:01:28 +08003273 writel(ARCMSR_MESSAGE_START_DRIVER_MODE, reg->drv2iop_doorbell);
Ching Huang626fa322014-08-19 15:10:12 +08003274 if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
Ching Huanga5849722014-08-19 15:01:28 +08003275 pr_err("arcmsr%d: can't set driver mode.\n",
3276 acb->host->host_no);
3277 return 1;
3278 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08003279 }
3280 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08003281 case ACB_ADAPTER_TYPE_C: {
3282 if (cdb_phyaddr_hi32 != 0) {
Ching Huangc10b1d52014-08-19 15:20:31 +08003283 struct MessageUnit_C __iomem *reg = acb->pmuC;
Nick Chengcdd3cb12010-07-13 20:03:04 +08003284
Tomas Henzl8b7eb862011-04-29 16:28:24 +02003285 printk(KERN_NOTICE "arcmsr%d: cdb_phyaddr_hi32=0x%x\n",
3286 acb->adapter_index, cdb_phyaddr_hi32);
Nick Chengcdd3cb12010-07-13 20:03:04 +08003287 writel(ARCMSR_SIGNATURE_SET_CONFIG, &reg->msgcode_rwbuffer[0]);
3288 writel(cdb_phyaddr_hi32, &reg->msgcode_rwbuffer[1]);
3289 writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, &reg->inbound_msgaddr0);
3290 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
Ching Huang626fa322014-08-19 15:10:12 +08003291 if (!arcmsr_hbaC_wait_msgint_ready(acb)) {
Nick Chengcdd3cb12010-07-13 20:03:04 +08003292 printk(KERN_NOTICE "arcmsr%d: 'set command Q window' \
3293 timeout \n", acb->host->host_no);
3294 return 1;
3295 }
3296 }
3297 }
Ching Huang5b374792014-08-19 15:25:22 +08003298 break;
3299 case ACB_ADAPTER_TYPE_D: {
3300 uint32_t __iomem *rwbuffer;
3301 struct MessageUnit_D *reg = acb->pmuD;
3302 reg->postq_index = 0;
3303 reg->doneq_index = 0;
3304 rwbuffer = reg->msgcode_rwbuffer;
3305 writel(ARCMSR_SIGNATURE_SET_CONFIG, rwbuffer++);
3306 writel(cdb_phyaddr_hi32, rwbuffer++);
3307 writel(cdb_phyaddr, rwbuffer++);
3308 writel(cdb_phyaddr + (ARCMSR_MAX_ARC1214_POSTQUEUE *
3309 sizeof(struct InBound_SRB)), rwbuffer++);
3310 writel(0x100, rwbuffer);
3311 writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, reg->inbound_msgaddr0);
3312 if (!arcmsr_hbaD_wait_msgint_ready(acb)) {
3313 pr_notice("arcmsr%d: 'set command Q window' timeout\n",
3314 acb->host->host_no);
3315 return 1;
3316 }
3317 }
3318 break;
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08003319 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08003320 return 0;
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08003321}
3322
Nick Cheng1a4f5502007-09-13 17:26:40 +08003323static void arcmsr_wait_firmware_ready(struct AdapterControlBlock *acb)
3324{
3325 uint32_t firmware_state = 0;
Nick Cheng1a4f5502007-09-13 17:26:40 +08003326 switch (acb->adapter_type) {
3327
3328 case ACB_ADAPTER_TYPE_A: {
Al Viro80da1ad2007-10-29 05:08:28 +00003329 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng1a4f5502007-09-13 17:26:40 +08003330 do {
3331 firmware_state = readl(&reg->outbound_msgaddr1);
3332 } while ((firmware_state & ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK) == 0);
3333 }
3334 break;
3335
3336 case ACB_ADAPTER_TYPE_B: {
Al Viro80da1ad2007-10-29 05:08:28 +00003337 struct MessageUnit_B *reg = acb->pmuB;
Nick Cheng1a4f5502007-09-13 17:26:40 +08003338 do {
Nick Chengae52e7f2010-06-18 15:39:12 +08003339 firmware_state = readl(reg->iop2drv_doorbell);
Nick Cheng1a4f5502007-09-13 17:26:40 +08003340 } while ((firmware_state & ARCMSR_MESSAGE_FIRMWARE_OK) == 0);
Nick Chengae52e7f2010-06-18 15:39:12 +08003341 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell);
Nick Cheng1a4f5502007-09-13 17:26:40 +08003342 }
3343 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08003344 case ACB_ADAPTER_TYPE_C: {
Ching Huangc10b1d52014-08-19 15:20:31 +08003345 struct MessageUnit_C __iomem *reg = acb->pmuC;
Nick Chengcdd3cb12010-07-13 20:03:04 +08003346 do {
3347 firmware_state = readl(&reg->outbound_msgaddr1);
3348 } while ((firmware_state & ARCMSR_HBCMU_MESSAGE_FIRMWARE_OK) == 0);
3349 }
Ching Huang5b374792014-08-19 15:25:22 +08003350 break;
3351 case ACB_ADAPTER_TYPE_D: {
3352 struct MessageUnit_D *reg = acb->pmuD;
3353 do {
3354 firmware_state = readl(reg->outbound_msgaddr1);
3355 } while ((firmware_state &
3356 ARCMSR_ARC1214_MESSAGE_FIRMWARE_OK) == 0);
3357 }
3358 break;
Nick Cheng1a4f5502007-09-13 17:26:40 +08003359 }
3360}
3361
Ching Huang626fa322014-08-19 15:10:12 +08003362static void arcmsr_hbaA_request_device_map(struct AdapterControlBlock *acb)
Nick Cheng36b83de2010-05-17 11:22:42 +08003363{
3364 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Chengcdd3cb12010-07-13 20:03:04 +08003365 if (unlikely(atomic_read(&acb->rq_map_token) == 0) || ((acb->acb_flags & ACB_F_BUS_RESET) != 0 ) || ((acb->acb_flags & ACB_F_ABORT) != 0 )){
NickCheng97b99122011-01-06 17:32:41 +08003366 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
Nick Chengcdd3cb12010-07-13 20:03:04 +08003367 return;
3368 } else {
3369 acb->fw_flag = FW_NORMAL;
3370 if (atomic_read(&acb->ante_token_value) == atomic_read(&acb->rq_map_token)){
3371 atomic_set(&acb->rq_map_token, 16);
3372 }
3373 atomic_set(&acb->ante_token_value, atomic_read(&acb->rq_map_token));
NickCheng97b99122011-01-06 17:32:41 +08003374 if (atomic_dec_and_test(&acb->rq_map_token)) {
3375 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
Nick Chengcdd3cb12010-07-13 20:03:04 +08003376 return;
NickCheng97b99122011-01-06 17:32:41 +08003377 }
Nick Chengcdd3cb12010-07-13 20:03:04 +08003378 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
3379 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
3380 }
3381 return;
3382}
3383
Ching Huang626fa322014-08-19 15:10:12 +08003384static void arcmsr_hbaB_request_device_map(struct AdapterControlBlock *acb)
Nick Chengcdd3cb12010-07-13 20:03:04 +08003385{
Ching Huangc10b1d52014-08-19 15:20:31 +08003386 struct MessageUnit_B *reg = acb->pmuB;
Nick Chengcdd3cb12010-07-13 20:03:04 +08003387 if (unlikely(atomic_read(&acb->rq_map_token) == 0) || ((acb->acb_flags & ACB_F_BUS_RESET) != 0 ) || ((acb->acb_flags & ACB_F_ABORT) != 0 )){
NickCheng97b99122011-01-06 17:32:41 +08003388 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
Nick Chengcdd3cb12010-07-13 20:03:04 +08003389 return;
3390 } else {
3391 acb->fw_flag = FW_NORMAL;
3392 if (atomic_read(&acb->ante_token_value) == atomic_read(&acb->rq_map_token)) {
NickCheng97b99122011-01-06 17:32:41 +08003393 atomic_set(&acb->rq_map_token, 16);
Nick Chengcdd3cb12010-07-13 20:03:04 +08003394 }
3395 atomic_set(&acb->ante_token_value, atomic_read(&acb->rq_map_token));
NickCheng97b99122011-01-06 17:32:41 +08003396 if (atomic_dec_and_test(&acb->rq_map_token)) {
3397 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
Nick Chengcdd3cb12010-07-13 20:03:04 +08003398 return;
NickCheng97b99122011-01-06 17:32:41 +08003399 }
Nick Chengcdd3cb12010-07-13 20:03:04 +08003400 writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell);
3401 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
3402 }
3403 return;
3404}
3405
Ching Huang626fa322014-08-19 15:10:12 +08003406static void arcmsr_hbaC_request_device_map(struct AdapterControlBlock *acb)
Nick Chengcdd3cb12010-07-13 20:03:04 +08003407{
3408 struct MessageUnit_C __iomem *reg = acb->pmuC;
Nick Chengae52e7f2010-06-18 15:39:12 +08003409 if (unlikely(atomic_read(&acb->rq_map_token) == 0) || ((acb->acb_flags & ACB_F_BUS_RESET) != 0) || ((acb->acb_flags & ACB_F_ABORT) != 0)) {
NickCheng97b99122011-01-06 17:32:41 +08003410 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
Nick Chengae52e7f2010-06-18 15:39:12 +08003411 return;
Nick Cheng36b83de2010-05-17 11:22:42 +08003412 } else {
Nick Chengae52e7f2010-06-18 15:39:12 +08003413 acb->fw_flag = FW_NORMAL;
3414 if (atomic_read(&acb->ante_token_value) == atomic_read(&acb->rq_map_token)) {
Nick Cheng36b83de2010-05-17 11:22:42 +08003415 atomic_set(&acb->rq_map_token, 16);
3416 }
Nick Chengae52e7f2010-06-18 15:39:12 +08003417 atomic_set(&acb->ante_token_value, atomic_read(&acb->rq_map_token));
NickCheng97b99122011-01-06 17:32:41 +08003418 if (atomic_dec_and_test(&acb->rq_map_token)) {
3419 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
Nick Chengae52e7f2010-06-18 15:39:12 +08003420 return;
NickCheng97b99122011-01-06 17:32:41 +08003421 }
Nick Cheng36b83de2010-05-17 11:22:42 +08003422 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
Nick Chengcdd3cb12010-07-13 20:03:04 +08003423 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
3424 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
Nick Cheng36b83de2010-05-17 11:22:42 +08003425 }
Nick Cheng36b83de2010-05-17 11:22:42 +08003426 return;
3427}
3428
Ching Huang5b374792014-08-19 15:25:22 +08003429static void arcmsr_hbaD_request_device_map(struct AdapterControlBlock *acb)
3430{
3431 struct MessageUnit_D *reg = acb->pmuD;
3432
3433 if (unlikely(atomic_read(&acb->rq_map_token) == 0) ||
3434 ((acb->acb_flags & ACB_F_BUS_RESET) != 0) ||
3435 ((acb->acb_flags & ACB_F_ABORT) != 0)) {
3436 mod_timer(&acb->eternal_timer,
3437 jiffies + msecs_to_jiffies(6 * HZ));
3438 } else {
3439 acb->fw_flag = FW_NORMAL;
3440 if (atomic_read(&acb->ante_token_value) ==
3441 atomic_read(&acb->rq_map_token)) {
3442 atomic_set(&acb->rq_map_token, 16);
3443 }
3444 atomic_set(&acb->ante_token_value,
3445 atomic_read(&acb->rq_map_token));
3446 if (atomic_dec_and_test(&acb->rq_map_token)) {
3447 mod_timer(&acb->eternal_timer, jiffies +
3448 msecs_to_jiffies(6 * HZ));
3449 return;
3450 }
3451 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG,
3452 reg->inbound_msgaddr0);
3453 mod_timer(&acb->eternal_timer, jiffies +
3454 msecs_to_jiffies(6 * HZ));
3455 }
3456}
3457
Kees Cooke99e88a2017-10-16 14:43:17 -07003458static void arcmsr_request_device_map(struct timer_list *t)
Nick Cheng36b83de2010-05-17 11:22:42 +08003459{
Kees Cooke99e88a2017-10-16 14:43:17 -07003460 struct AdapterControlBlock *acb = from_timer(acb, t, eternal_timer);
Nick Cheng36b83de2010-05-17 11:22:42 +08003461 switch (acb->adapter_type) {
3462 case ACB_ADAPTER_TYPE_A: {
Ching Huang626fa322014-08-19 15:10:12 +08003463 arcmsr_hbaA_request_device_map(acb);
Nick Cheng36b83de2010-05-17 11:22:42 +08003464 }
3465 break;
3466 case ACB_ADAPTER_TYPE_B: {
Ching Huang626fa322014-08-19 15:10:12 +08003467 arcmsr_hbaB_request_device_map(acb);
Nick Cheng36b83de2010-05-17 11:22:42 +08003468 }
3469 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08003470 case ACB_ADAPTER_TYPE_C: {
Ching Huang626fa322014-08-19 15:10:12 +08003471 arcmsr_hbaC_request_device_map(acb);
Nick Chengcdd3cb12010-07-13 20:03:04 +08003472 }
Ching Huang5b374792014-08-19 15:25:22 +08003473 break;
3474 case ACB_ADAPTER_TYPE_D:
3475 arcmsr_hbaD_request_device_map(acb);
3476 break;
Nick Cheng36b83de2010-05-17 11:22:42 +08003477 }
3478}
3479
Ching Huang626fa322014-08-19 15:10:12 +08003480static void arcmsr_hbaA_start_bgrb(struct AdapterControlBlock *acb)
Nick Cheng1a4f5502007-09-13 17:26:40 +08003481{
Al Viro80da1ad2007-10-29 05:08:28 +00003482 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng1a4f5502007-09-13 17:26:40 +08003483 acb->acb_flags |= ACB_F_MSG_START_BGRB;
3484 writel(ARCMSR_INBOUND_MESG0_START_BGRB, &reg->inbound_msgaddr0);
Ching Huang626fa322014-08-19 15:10:12 +08003485 if (!arcmsr_hbaA_wait_msgint_ready(acb)) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08003486 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \
3487 rebulid' timeout \n", acb->host->host_no);
3488 }
3489}
3490
Ching Huang626fa322014-08-19 15:10:12 +08003491static void arcmsr_hbaB_start_bgrb(struct AdapterControlBlock *acb)
Nick Cheng1a4f5502007-09-13 17:26:40 +08003492{
Al Viro80da1ad2007-10-29 05:08:28 +00003493 struct MessageUnit_B *reg = acb->pmuB;
Nick Cheng1a4f5502007-09-13 17:26:40 +08003494 acb->acb_flags |= ACB_F_MSG_START_BGRB;
Nick Chengae52e7f2010-06-18 15:39:12 +08003495 writel(ARCMSR_MESSAGE_START_BGRB, reg->drv2iop_doorbell);
Ching Huang626fa322014-08-19 15:10:12 +08003496 if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08003497 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \
3498 rebulid' timeout \n",acb->host->host_no);
3499 }
3500}
3501
Ching Huang626fa322014-08-19 15:10:12 +08003502static void arcmsr_hbaC_start_bgrb(struct AdapterControlBlock *pACB)
Nick Chengcdd3cb12010-07-13 20:03:04 +08003503{
Ching Huangc10b1d52014-08-19 15:20:31 +08003504 struct MessageUnit_C __iomem *phbcmu = pACB->pmuC;
Nick Chengcdd3cb12010-07-13 20:03:04 +08003505 pACB->acb_flags |= ACB_F_MSG_START_BGRB;
3506 writel(ARCMSR_INBOUND_MESG0_START_BGRB, &phbcmu->inbound_msgaddr0);
3507 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &phbcmu->inbound_doorbell);
Ching Huang626fa322014-08-19 15:10:12 +08003508 if (!arcmsr_hbaC_wait_msgint_ready(pACB)) {
Nick Chengcdd3cb12010-07-13 20:03:04 +08003509 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \
3510 rebulid' timeout \n", pACB->host->host_no);
3511 }
3512 return;
3513}
Ching Huang5b374792014-08-19 15:25:22 +08003514
3515static void arcmsr_hbaD_start_bgrb(struct AdapterControlBlock *pACB)
3516{
3517 struct MessageUnit_D *pmu = pACB->pmuD;
3518
3519 pACB->acb_flags |= ACB_F_MSG_START_BGRB;
3520 writel(ARCMSR_INBOUND_MESG0_START_BGRB, pmu->inbound_msgaddr0);
3521 if (!arcmsr_hbaD_wait_msgint_ready(pACB)) {
3522 pr_notice("arcmsr%d: wait 'start adapter "
3523 "background rebulid' timeout\n", pACB->host->host_no);
3524 }
3525}
3526
Nick Cheng1a4f5502007-09-13 17:26:40 +08003527static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb)
3528{
3529 switch (acb->adapter_type) {
3530 case ACB_ADAPTER_TYPE_A:
Ching Huang626fa322014-08-19 15:10:12 +08003531 arcmsr_hbaA_start_bgrb(acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +08003532 break;
3533 case ACB_ADAPTER_TYPE_B:
Ching Huang626fa322014-08-19 15:10:12 +08003534 arcmsr_hbaB_start_bgrb(acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +08003535 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08003536 case ACB_ADAPTER_TYPE_C:
Ching Huang626fa322014-08-19 15:10:12 +08003537 arcmsr_hbaC_start_bgrb(acb);
Ching Huang5b374792014-08-19 15:25:22 +08003538 break;
3539 case ACB_ADAPTER_TYPE_D:
3540 arcmsr_hbaD_start_bgrb(acb);
3541 break;
Nick Cheng1a4f5502007-09-13 17:26:40 +08003542 }
3543}
3544
3545static void arcmsr_clear_doorbell_queue_buffer(struct AdapterControlBlock *acb)
3546{
3547 switch (acb->adapter_type) {
3548 case ACB_ADAPTER_TYPE_A: {
Al Viro80da1ad2007-10-29 05:08:28 +00003549 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng1a4f5502007-09-13 17:26:40 +08003550 uint32_t outbound_doorbell;
3551 /* empty doorbell Qbuffer if door bell ringed */
3552 outbound_doorbell = readl(&reg->outbound_doorbell);
3553 /*clear doorbell interrupt */
3554 writel(outbound_doorbell, &reg->outbound_doorbell);
3555 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, &reg->inbound_doorbell);
3556 }
3557 break;
3558
3559 case ACB_ADAPTER_TYPE_B: {
Al Viro80da1ad2007-10-29 05:08:28 +00003560 struct MessageUnit_B *reg = acb->pmuB;
Nick Cheng1a4f5502007-09-13 17:26:40 +08003561 /*clear interrupt and message state*/
Nick Chengae52e7f2010-06-18 15:39:12 +08003562 writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
3563 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell);
Nick Cheng1a4f5502007-09-13 17:26:40 +08003564 /* let IOP know data has been read */
3565 }
3566 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08003567 case ACB_ADAPTER_TYPE_C: {
Ching Huangc10b1d52014-08-19 15:20:31 +08003568 struct MessageUnit_C __iomem *reg = acb->pmuC;
Ching Huang5eb6bfa2014-08-19 15:07:35 +08003569 uint32_t outbound_doorbell, i;
Nick Chengcdd3cb12010-07-13 20:03:04 +08003570 /* empty doorbell Qbuffer if door bell ringed */
3571 outbound_doorbell = readl(&reg->outbound_doorbell);
3572 writel(outbound_doorbell, &reg->outbound_doorbell_clear);
3573 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, &reg->inbound_doorbell);
Ching Huang5eb6bfa2014-08-19 15:07:35 +08003574 for (i = 0; i < 200; i++) {
3575 msleep(20);
3576 outbound_doorbell = readl(&reg->outbound_doorbell);
3577 if (outbound_doorbell &
3578 ARCMSR_HBCMU_IOP2DRV_DATA_WRITE_OK) {
3579 writel(outbound_doorbell,
3580 &reg->outbound_doorbell_clear);
3581 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK,
3582 &reg->inbound_doorbell);
3583 } else
3584 break;
3585 }
Nick Chengcdd3cb12010-07-13 20:03:04 +08003586 }
Ching Huang5b374792014-08-19 15:25:22 +08003587 break;
3588 case ACB_ADAPTER_TYPE_D: {
3589 struct MessageUnit_D *reg = acb->pmuD;
3590 uint32_t outbound_doorbell, i;
3591 /* empty doorbell Qbuffer if door bell ringed */
3592 outbound_doorbell = readl(reg->outbound_doorbell);
3593 writel(outbound_doorbell, reg->outbound_doorbell);
3594 writel(ARCMSR_ARC1214_DRV2IOP_DATA_OUT_READ,
3595 reg->inbound_doorbell);
3596 for (i = 0; i < 200; i++) {
3597 msleep(20);
3598 outbound_doorbell = readl(reg->outbound_doorbell);
3599 if (outbound_doorbell &
3600 ARCMSR_ARC1214_IOP2DRV_DATA_WRITE_OK) {
3601 writel(outbound_doorbell,
3602 reg->outbound_doorbell);
3603 writel(ARCMSR_ARC1214_DRV2IOP_DATA_OUT_READ,
3604 reg->inbound_doorbell);
3605 } else
3606 break;
3607 }
3608 }
3609 break;
Nick Cheng1a4f5502007-09-13 17:26:40 +08003610 }
3611}
Erich Chen1c57e862006-07-12 08:59:32 -07003612
Nick Cheng76d78302008-02-04 23:53:24 -08003613static void arcmsr_enable_eoi_mode(struct AdapterControlBlock *acb)
3614{
3615 switch (acb->adapter_type) {
3616 case ACB_ADAPTER_TYPE_A:
3617 return;
3618 case ACB_ADAPTER_TYPE_B:
3619 {
3620 struct MessageUnit_B *reg = acb->pmuB;
Nick Chengae52e7f2010-06-18 15:39:12 +08003621 writel(ARCMSR_MESSAGE_ACTIVE_EOI_MODE, reg->drv2iop_doorbell);
Ching Huang626fa322014-08-19 15:10:12 +08003622 if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
Nick Cheng76d78302008-02-04 23:53:24 -08003623 printk(KERN_NOTICE "ARCMSR IOP enables EOI_MODE TIMEOUT");
3624 return;
3625 }
3626 }
3627 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08003628 case ACB_ADAPTER_TYPE_C:
3629 return;
Nick Cheng76d78302008-02-04 23:53:24 -08003630 }
3631 return;
3632}
3633
Nick Cheng36b83de2010-05-17 11:22:42 +08003634static void arcmsr_hardware_reset(struct AdapterControlBlock *acb)
3635{
3636 uint8_t value[64];
Nick Chengcdd3cb12010-07-13 20:03:04 +08003637 int i, count = 0;
3638 struct MessageUnit_A __iomem *pmuA = acb->pmuA;
3639 struct MessageUnit_C __iomem *pmuC = acb->pmuC;
Ching Huang5b374792014-08-19 15:25:22 +08003640 struct MessageUnit_D *pmuD = acb->pmuD;
Dan Carpenter6ad819b2012-06-09 12:10:19 +03003641
Nick Cheng36b83de2010-05-17 11:22:42 +08003642 /* backup pci config data */
Nick Chengcdd3cb12010-07-13 20:03:04 +08003643 printk(KERN_NOTICE "arcmsr%d: executing hw bus reset .....\n", acb->host->host_no);
Nick Cheng36b83de2010-05-17 11:22:42 +08003644 for (i = 0; i < 64; i++) {
3645 pci_read_config_byte(acb->pdev, i, &value[i]);
3646 }
3647 /* hardware reset signal */
Nick Chengae52e7f2010-06-18 15:39:12 +08003648 if ((acb->dev_id == 0x1680)) {
Nick Chengcdd3cb12010-07-13 20:03:04 +08003649 writel(ARCMSR_ARC1680_BUS_RESET, &pmuA->reserved1[0]);
3650 } else if ((acb->dev_id == 0x1880)) {
3651 do {
3652 count++;
3653 writel(0xF, &pmuC->write_sequence);
3654 writel(0x4, &pmuC->write_sequence);
3655 writel(0xB, &pmuC->write_sequence);
3656 writel(0x2, &pmuC->write_sequence);
3657 writel(0x7, &pmuC->write_sequence);
3658 writel(0xD, &pmuC->write_sequence);
Dan Carpenter6ad819b2012-06-09 12:10:19 +03003659 } while (((readl(&pmuC->host_diagnostic) & ARCMSR_ARC1880_DiagWrite_ENABLE) == 0) && (count < 5));
Nick Chengcdd3cb12010-07-13 20:03:04 +08003660 writel(ARCMSR_ARC1880_RESET_ADAPTER, &pmuC->host_diagnostic);
Ching Huang5b374792014-08-19 15:25:22 +08003661 } else if ((acb->dev_id == 0x1214)) {
3662 writel(0x20, pmuD->reset_request);
Nick Chengae52e7f2010-06-18 15:39:12 +08003663 } else {
Nick Chengcdd3cb12010-07-13 20:03:04 +08003664 pci_write_config_byte(acb->pdev, 0x84, 0x20);
Nick Chengae52e7f2010-06-18 15:39:12 +08003665 }
Nick Chengcdd3cb12010-07-13 20:03:04 +08003666 msleep(2000);
Nick Cheng36b83de2010-05-17 11:22:42 +08003667 /* write back pci config data */
3668 for (i = 0; i < 64; i++) {
3669 pci_write_config_byte(acb->pdev, i, value[i]);
3670 }
3671 msleep(1000);
3672 return;
3673}
Ching Huang72a7f312017-12-05 09:31:59 +08003674
3675static bool arcmsr_reset_in_progress(struct AdapterControlBlock *acb)
3676{
3677 bool rtn = true;
3678
3679 switch(acb->adapter_type) {
3680 case ACB_ADAPTER_TYPE_A:{
3681 struct MessageUnit_A __iomem *reg = acb->pmuA;
3682 rtn = ((readl(&reg->outbound_msgaddr1) &
3683 ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK) == 0) ? true : false;
3684 }
3685 break;
3686 case ACB_ADAPTER_TYPE_B:{
3687 struct MessageUnit_B *reg = acb->pmuB;
3688 rtn = ((readl(reg->iop2drv_doorbell) &
3689 ARCMSR_MESSAGE_FIRMWARE_OK) == 0) ? true : false;
3690 }
3691 break;
3692 case ACB_ADAPTER_TYPE_C:{
3693 struct MessageUnit_C __iomem *reg = acb->pmuC;
3694 rtn = (readl(&reg->host_diagnostic) & 0x04) ? true : false;
3695 }
3696 break;
3697 case ACB_ADAPTER_TYPE_D:{
3698 struct MessageUnit_D *reg = acb->pmuD;
3699 rtn = ((readl(reg->sample_at_reset) & 0x80) == 0) ?
3700 true : false;
3701 }
3702 break;
3703 }
3704 return rtn;
3705}
3706
Erich Chen1c57e862006-07-12 08:59:32 -07003707static void arcmsr_iop_init(struct AdapterControlBlock *acb)
3708{
Nick Cheng1a4f5502007-09-13 17:26:40 +08003709 uint32_t intmask_org;
Nick Chengcdd3cb12010-07-13 20:03:04 +08003710 /* disable all outbound interrupt */
3711 intmask_org = arcmsr_disable_outbound_ints(acb);
Nick Cheng76d78302008-02-04 23:53:24 -08003712 arcmsr_wait_firmware_ready(acb);
3713 arcmsr_iop_confirm(acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +08003714 /*start background rebuild*/
3715 arcmsr_start_adapter_bgrb(acb);
3716 /* empty doorbell Qbuffer if door bell ringed */
3717 arcmsr_clear_doorbell_queue_buffer(acb);
Nick Cheng76d78302008-02-04 23:53:24 -08003718 arcmsr_enable_eoi_mode(acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +08003719 /* enable outbound Post Queue,outbound doorbell Interrupt */
3720 arcmsr_enable_outbound_ints(acb, intmask_org);
Erich Chen1c57e862006-07-12 08:59:32 -07003721 acb->acb_flags |= ACB_F_IOP_INITED;
3722}
3723
Nick Cheng36b83de2010-05-17 11:22:42 +08003724static uint8_t arcmsr_iop_reset(struct AdapterControlBlock *acb)
Erich Chen1c57e862006-07-12 08:59:32 -07003725{
Erich Chen1c57e862006-07-12 08:59:32 -07003726 struct CommandControlBlock *ccb;
3727 uint32_t intmask_org;
Nick Cheng36b83de2010-05-17 11:22:42 +08003728 uint8_t rtnval = 0x00;
Erich Chen1c57e862006-07-12 08:59:32 -07003729 int i = 0;
NickCheng97b99122011-01-06 17:32:41 +08003730 unsigned long flags;
3731
Erich Chen1c57e862006-07-12 08:59:32 -07003732 if (atomic_read(&acb->ccboutstandingcount) != 0) {
Erich Chen1c57e862006-07-12 08:59:32 -07003733 /* disable all outbound interrupt */
3734 intmask_org = arcmsr_disable_outbound_ints(acb);
Nick Cheng36b83de2010-05-17 11:22:42 +08003735 /* talk to iop 331 outstanding command aborted */
3736 rtnval = arcmsr_abort_allcmd(acb);
Erich Chen1c57e862006-07-12 08:59:32 -07003737 /* clear all outbound posted Q */
Nick Cheng1a4f5502007-09-13 17:26:40 +08003738 arcmsr_done4abort_postqueue(acb);
Erich Chen1c57e862006-07-12 08:59:32 -07003739 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) {
3740 ccb = acb->pccb_pool[i];
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08003741 if (ccb->startdone == ARCMSR_CCB_START) {
NickCheng97b99122011-01-06 17:32:41 +08003742 scsi_dma_unmap(ccb->pcmd);
3743 ccb->startdone = ARCMSR_CCB_DONE;
3744 ccb->ccb_flags = 0;
3745 spin_lock_irqsave(&acb->ccblist_lock, flags);
3746 list_add_tail(&ccb->list, &acb->ccb_free_list);
3747 spin_unlock_irqrestore(&acb->ccblist_lock, flags);
Erich Chen1c57e862006-07-12 08:59:32 -07003748 }
3749 }
Nick Cheng36b83de2010-05-17 11:22:42 +08003750 atomic_set(&acb->ccboutstandingcount, 0);
Erich Chen1c57e862006-07-12 08:59:32 -07003751 /* enable all outbound interrupt */
3752 arcmsr_enable_outbound_ints(acb, intmask_org);
Nick Cheng36b83de2010-05-17 11:22:42 +08003753 return rtnval;
Erich Chen1c57e862006-07-12 08:59:32 -07003754 }
Nick Cheng36b83de2010-05-17 11:22:42 +08003755 return rtnval;
Erich Chen1c57e862006-07-12 08:59:32 -07003756}
3757
3758static int arcmsr_bus_reset(struct scsi_cmnd *cmd)
3759{
NickCheng97b99122011-01-06 17:32:41 +08003760 struct AdapterControlBlock *acb;
Nick Chengae52e7f2010-06-18 15:39:12 +08003761 int retry_count = 0;
3762 int rtn = FAILED;
Nick Chengae52e7f2010-06-18 15:39:12 +08003763 acb = (struct AdapterControlBlock *) cmd->device->host->hostdata;
Ching Huang72a7f312017-12-05 09:31:59 +08003764 pr_notice("arcmsr: executing bus reset eh.....num_resets = %d,"
3765 " num_aborts = %d \n", acb->num_resets, acb->num_aborts);
Nick Cheng36b83de2010-05-17 11:22:42 +08003766 acb->num_resets++;
Nick Cheng36b83de2010-05-17 11:22:42 +08003767
Ching Huang72a7f312017-12-05 09:31:59 +08003768 if (acb->acb_flags & ACB_F_BUS_RESET) {
3769 long timeout;
3770 pr_notice("arcmsr: there is an bus reset eh proceeding...\n");
3771 timeout = wait_event_timeout(wait_q, (acb->acb_flags
3772 & ACB_F_BUS_RESET) == 0, 220 * HZ);
3773 if (timeout)
3774 return SUCCESS;
3775 }
3776 acb->acb_flags |= ACB_F_BUS_RESET;
3777 if (!arcmsr_iop_reset(acb)) {
3778 arcmsr_hardware_reset(acb);
3779 acb->acb_flags &= ~ACB_F_IOP_INITED;
3780wait_reset_done:
3781 ssleep(ARCMSR_SLEEPTIME);
3782 if (arcmsr_reset_in_progress(acb)) {
3783 if (retry_count > ARCMSR_RETRYCOUNT) {
3784 acb->fw_flag = FW_DEADLOCK;
3785 pr_notice("arcmsr%d: waiting for hw bus reset"
3786 " return, RETRY TERMINATED!!\n",
3787 acb->host->host_no);
3788 return FAILED;
Nick Chengae52e7f2010-06-18 15:39:12 +08003789 }
Ching Huang72a7f312017-12-05 09:31:59 +08003790 retry_count++;
3791 goto wait_reset_done;
Nick Chengcdd3cb12010-07-13 20:03:04 +08003792 }
Ching Huang72a7f312017-12-05 09:31:59 +08003793 arcmsr_iop_init(acb);
3794 atomic_set(&acb->rq_map_token, 16);
3795 atomic_set(&acb->ante_token_value, 16);
3796 acb->fw_flag = FW_NORMAL;
3797 mod_timer(&acb->eternal_timer, jiffies +
3798 msecs_to_jiffies(6 * HZ));
3799 acb->acb_flags &= ~ACB_F_BUS_RESET;
3800 rtn = SUCCESS;
3801 pr_notice("arcmsr: scsi bus reset eh returns with success\n");
3802 } else {
3803 acb->acb_flags &= ~ACB_F_BUS_RESET;
3804 atomic_set(&acb->rq_map_token, 16);
3805 atomic_set(&acb->ante_token_value, 16);
3806 acb->fw_flag = FW_NORMAL;
3807 mod_timer(&acb->eternal_timer, jiffies +
3808 msecs_to_jiffies(6 * HZ));
3809 rtn = SUCCESS;
Nick Chengae52e7f2010-06-18 15:39:12 +08003810 }
3811 return rtn;
Erich Chen1c57e862006-07-12 08:59:32 -07003812}
3813
Nick Chengae52e7f2010-06-18 15:39:12 +08003814static int arcmsr_abort_one_cmd(struct AdapterControlBlock *acb,
Erich Chen1c57e862006-07-12 08:59:32 -07003815 struct CommandControlBlock *ccb)
3816{
Nick Chengae52e7f2010-06-18 15:39:12 +08003817 int rtn;
Nick Chengae52e7f2010-06-18 15:39:12 +08003818 rtn = arcmsr_polling_ccbdone(acb, ccb);
Nick Chengae52e7f2010-06-18 15:39:12 +08003819 return rtn;
Erich Chen1c57e862006-07-12 08:59:32 -07003820}
3821
3822static int arcmsr_abort(struct scsi_cmnd *cmd)
3823{
3824 struct AdapterControlBlock *acb =
3825 (struct AdapterControlBlock *)cmd->device->host->hostdata;
3826 int i = 0;
Nick Chengae52e7f2010-06-18 15:39:12 +08003827 int rtn = FAILED;
Ching Huangcab5aec2014-08-19 14:47:16 +08003828 uint32_t intmask_org;
3829
Erich Chen1c57e862006-07-12 08:59:32 -07003830 printk(KERN_NOTICE
Ching Huangcab5aec2014-08-19 14:47:16 +08003831 "arcmsr%d: abort device command of scsi id = %d lun = %d\n",
Hannes Reinecke9cb78c12014-06-25 15:27:36 +02003832 acb->host->host_no, cmd->device->id, (u32)cmd->device->lun);
Nick Chengae52e7f2010-06-18 15:39:12 +08003833 acb->acb_flags |= ACB_F_ABORT;
Erich Chen1c57e862006-07-12 08:59:32 -07003834 acb->num_aborts++;
Erich Chen1c57e862006-07-12 08:59:32 -07003835 /*
3836 ************************************************
3837 ** the all interrupt service routine is locked
3838 ** we need to handle it as soon as possible and exit
3839 ************************************************
3840 */
Ching Huangcab5aec2014-08-19 14:47:16 +08003841 if (!atomic_read(&acb->ccboutstandingcount)) {
3842 acb->acb_flags &= ~ACB_F_ABORT;
Nick Chengae52e7f2010-06-18 15:39:12 +08003843 return rtn;
Ching Huangcab5aec2014-08-19 14:47:16 +08003844 }
Erich Chen1c57e862006-07-12 08:59:32 -07003845
Ching Huangcab5aec2014-08-19 14:47:16 +08003846 intmask_org = arcmsr_disable_outbound_ints(acb);
Erich Chen1c57e862006-07-12 08:59:32 -07003847 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) {
3848 struct CommandControlBlock *ccb = acb->pccb_pool[i];
3849 if (ccb->startdone == ARCMSR_CCB_START && ccb->pcmd == cmd) {
Nick Chengae52e7f2010-06-18 15:39:12 +08003850 ccb->startdone = ARCMSR_CCB_ABORTED;
3851 rtn = arcmsr_abort_one_cmd(acb, ccb);
Erich Chen1c57e862006-07-12 08:59:32 -07003852 break;
3853 }
3854 }
Nick Chengae52e7f2010-06-18 15:39:12 +08003855 acb->acb_flags &= ~ACB_F_ABORT;
Ching Huangcab5aec2014-08-19 14:47:16 +08003856 arcmsr_enable_outbound_ints(acb, intmask_org);
Nick Chengae52e7f2010-06-18 15:39:12 +08003857 return rtn;
Erich Chen1c57e862006-07-12 08:59:32 -07003858}
3859
3860static const char *arcmsr_info(struct Scsi_Host *host)
3861{
3862 struct AdapterControlBlock *acb =
3863 (struct AdapterControlBlock *) host->hostdata;
3864 static char buf[256];
3865 char *type;
3866 int raid6 = 1;
Erich Chen1c57e862006-07-12 08:59:32 -07003867 switch (acb->pdev->device) {
3868 case PCI_DEVICE_ID_ARECA_1110:
Nick Cheng1a4f5502007-09-13 17:26:40 +08003869 case PCI_DEVICE_ID_ARECA_1200:
3870 case PCI_DEVICE_ID_ARECA_1202:
Erich Chen1c57e862006-07-12 08:59:32 -07003871 case PCI_DEVICE_ID_ARECA_1210:
3872 raid6 = 0;
3873 /*FALLTHRU*/
3874 case PCI_DEVICE_ID_ARECA_1120:
3875 case PCI_DEVICE_ID_ARECA_1130:
3876 case PCI_DEVICE_ID_ARECA_1160:
3877 case PCI_DEVICE_ID_ARECA_1170:
Nick Cheng1a4f5502007-09-13 17:26:40 +08003878 case PCI_DEVICE_ID_ARECA_1201:
Ching Huang7e315ff2015-11-25 19:49:33 +08003879 case PCI_DEVICE_ID_ARECA_1203:
Erich Chen1c57e862006-07-12 08:59:32 -07003880 case PCI_DEVICE_ID_ARECA_1220:
3881 case PCI_DEVICE_ID_ARECA_1230:
3882 case PCI_DEVICE_ID_ARECA_1260:
3883 case PCI_DEVICE_ID_ARECA_1270:
3884 case PCI_DEVICE_ID_ARECA_1280:
3885 type = "SATA";
3886 break;
Ching Huang5b374792014-08-19 15:25:22 +08003887 case PCI_DEVICE_ID_ARECA_1214:
Erich Chen1c57e862006-07-12 08:59:32 -07003888 case PCI_DEVICE_ID_ARECA_1380:
3889 case PCI_DEVICE_ID_ARECA_1381:
3890 case PCI_DEVICE_ID_ARECA_1680:
3891 case PCI_DEVICE_ID_ARECA_1681:
Nick Chengcdd3cb12010-07-13 20:03:04 +08003892 case PCI_DEVICE_ID_ARECA_1880:
Ching Huangaaa64f62014-08-19 15:22:45 +08003893 type = "SAS/SATA";
Erich Chen1c57e862006-07-12 08:59:32 -07003894 break;
3895 default:
Ching Huangaaa64f62014-08-19 15:22:45 +08003896 type = "unknown";
3897 raid6 = 0;
Erich Chen1c57e862006-07-12 08:59:32 -07003898 break;
3899 }
Ching Huangaaa64f62014-08-19 15:22:45 +08003900 sprintf(buf, "Areca %s RAID Controller %s\narcmsr version %s\n",
3901 type, raid6 ? "(RAID6 capable)" : "", ARCMSR_DRIVER_VERSION);
Erich Chen1c57e862006-07-12 08:59:32 -07003902 return buf;
3903}