Mauro Carvalho Chehab | ab42b81 | 2019-06-12 14:52:45 -0300 | [diff] [blame] | 1 | ================================================ |
| 2 | SH7760/SH7763 integrated LCDC Framebuffer driver |
| 3 | ================================================ |
| 4 | |
| 5 | 0. Overview |
| 6 | ----------- |
| 7 | The SH7760/SH7763 have an integrated LCD Display controller (LCDC) which |
| 8 | supports (in theory) resolutions ranging from 1x1 to 1024x1024, |
| 9 | with color depths ranging from 1 to 16 bits, on STN, DSTN and TFT Panels. |
| 10 | |
| 11 | Caveats: |
| 12 | |
| 13 | * Framebuffer memory must be a large chunk allocated at the top |
| 14 | of Area3 (HW requirement). Because of this requirement you should NOT |
| 15 | make the driver a module since at runtime it may become impossible to |
| 16 | get a large enough contiguous chunk of memory. |
| 17 | |
| 18 | * The driver does not support changing resolution while loaded |
| 19 | (displays aren't hotpluggable anyway) |
| 20 | |
| 21 | * Heavy flickering may be observed |
| 22 | a) if you're using 15/16bit color modes at >= 640x480 px resolutions, |
| 23 | b) during PCMCIA (or any other slow bus) activity. |
| 24 | |
| 25 | * Rotation works only 90degress clockwise, and only if horizontal |
| 26 | resolution is <= 320 pixels. |
| 27 | |
| 28 | Files: |
| 29 | - drivers/video/sh7760fb.c |
| 30 | - include/asm-sh/sh7760fb.h |
| 31 | - Documentation/fb/sh7760fb.rst |
| 32 | |
| 33 | 1. Platform setup |
| 34 | ----------------- |
| 35 | SH7760: |
| 36 | Video data is fetched via the DMABRG DMA engine, so you have to |
| 37 | configure the SH DMAC for DMABRG mode (write 0x94808080 to the |
| 38 | DMARSRA register somewhere at boot). |
| 39 | |
| 40 | PFC registers PCCR and PCDR must be set to peripheral mode. |
| 41 | (write zeros to both). |
| 42 | |
| 43 | The driver does NOT do the above for you since board setup is, well, job |
| 44 | of the board setup code. |
| 45 | |
| 46 | 2. Panel definitions |
| 47 | -------------------- |
| 48 | The LCDC must explicitly be told about the type of LCD panel |
| 49 | attached. Data must be wrapped in a "struct sh7760fb_platdata" and |
| 50 | passed to the driver as platform_data. |
| 51 | |
| 52 | Suggest you take a closer look at the SH7760 Manual, Section 30. |
| 53 | (http://documentation.renesas.com/eng/products/mpumcu/e602291_sh7760.pdf) |
| 54 | |
| 55 | The following code illustrates what needs to be done to |
| 56 | get the framebuffer working on a 640x480 TFT:: |
| 57 | |
| 58 | #include <linux/fb.h> |
| 59 | #include <asm/sh7760fb.h> |
| 60 | |
| 61 | /* |
| 62 | * NEC NL6440bc26-01 640x480 TFT |
| 63 | * dotclock 25175 kHz |
| 64 | * Xres 640 Yres 480 |
| 65 | * Htotal 800 Vtotal 525 |
| 66 | * HsynStart 656 VsynStart 490 |
| 67 | * HsynLenn 30 VsynLenn 2 |
| 68 | * |
| 69 | * The linux framebuffer layer does not use the syncstart/synclen |
| 70 | * values but right/left/upper/lower margin values. The comments |
| 71 | * for the x_margin explain how to calculate those from given |
| 72 | * panel sync timings. |
| 73 | */ |
| 74 | static struct fb_videomode nl6448bc26 = { |
| 75 | .name = "NL6448BC26", |
| 76 | .refresh = 60, |
| 77 | .xres = 640, |
| 78 | .yres = 480, |
| 79 | .pixclock = 39683, /* in picoseconds! */ |
| 80 | .hsync_len = 30, |
| 81 | .vsync_len = 2, |
| 82 | .left_margin = 114, /* HTOT - (HSYNSLEN + HSYNSTART) */ |
| 83 | .right_margin = 16, /* HSYNSTART - XRES */ |
| 84 | .upper_margin = 33, /* VTOT - (VSYNLEN + VSYNSTART) */ |
| 85 | .lower_margin = 10, /* VSYNSTART - YRES */ |
| 86 | .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, |
| 87 | .vmode = FB_VMODE_NONINTERLACED, |
| 88 | .flag = 0, |
| 89 | }; |
| 90 | |
| 91 | static struct sh7760fb_platdata sh7760fb_nl6448 = { |
| 92 | .def_mode = &nl6448bc26, |
| 93 | .ldmtr = LDMTR_TFT_COLOR_16, /* 16bit TFT panel */ |
| 94 | .lddfr = LDDFR_8BPP, /* we want 8bit output */ |
| 95 | .ldpmmr = 0x0070, |
| 96 | .ldpspr = 0x0500, |
| 97 | .ldaclnr = 0, |
| 98 | .ldickr = LDICKR_CLKSRC(LCDC_CLKSRC_EXTERNAL) | |
| 99 | LDICKR_CLKDIV(1), |
| 100 | .rotate = 0, |
| 101 | .novsync = 1, |
| 102 | .blank = NULL, |
| 103 | }; |
| 104 | |
| 105 | /* SH7760: |
| 106 | * 0xFE300800: 256 * 4byte xRGB palette ram |
| 107 | * 0xFE300C00: 42 bytes ctrl registers |
| 108 | */ |
| 109 | static struct resource sh7760_lcdc_res[] = { |
| 110 | [0] = { |
| 111 | .start = 0xFE300800, |
| 112 | .end = 0xFE300CFF, |
| 113 | .flags = IORESOURCE_MEM, |
| 114 | }, |
| 115 | [1] = { |
| 116 | .start = 65, |
| 117 | .end = 65, |
| 118 | .flags = IORESOURCE_IRQ, |
| 119 | }, |
| 120 | }; |
| 121 | |
| 122 | static struct platform_device sh7760_lcdc_dev = { |
| 123 | .dev = { |
| 124 | .platform_data = &sh7760fb_nl6448, |
| 125 | }, |
| 126 | .name = "sh7760-lcdc", |
| 127 | .id = -1, |
| 128 | .resource = sh7760_lcdc_res, |
| 129 | .num_resources = ARRAY_SIZE(sh7760_lcdc_res), |
| 130 | }; |