Greg Kroah-Hartman | b244131 | 2017-11-01 15:07:57 +0100 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
Linus Walleij | 56ff337 | 2017-01-28 22:50:48 +0100 | [diff] [blame] | 2 | /* |
| 3 | * Cortina Systems Gemini OF physmap add-on |
| 4 | * Copyright (C) 2017 Linus Walleij <linus.walleij@linaro.org> |
| 5 | * |
| 6 | * This SoC has an elaborate flash control register, so we need to |
| 7 | * detect and set it up when booting on this platform. |
| 8 | */ |
| 9 | #include <linux/export.h> |
| 10 | #include <linux/of.h> |
| 11 | #include <linux/of_device.h> |
| 12 | #include <linux/mtd/map.h> |
Linus Walleij | 9d3b508 | 2018-11-27 21:53:58 +0100 | [diff] [blame] | 13 | #include <linux/mtd/xip.h> |
Linus Walleij | 56ff337 | 2017-01-28 22:50:48 +0100 | [diff] [blame] | 14 | #include <linux/mfd/syscon.h> |
| 15 | #include <linux/regmap.h> |
| 16 | #include <linux/bitops.h> |
Linus Walleij | 9d3b508 | 2018-11-27 21:53:58 +0100 | [diff] [blame] | 17 | #include <linux/pinctrl/consumer.h> |
Boris Brezillon | 6ca15cf | 2018-10-19 09:49:05 +0200 | [diff] [blame] | 18 | #include "physmap-gemini.h" |
Linus Walleij | 56ff337 | 2017-01-28 22:50:48 +0100 | [diff] [blame] | 19 | |
| 20 | /* |
| 21 | * The Flash-relevant parts of the global status register |
| 22 | * These would also be relevant for a NAND driver. |
| 23 | */ |
| 24 | #define GLOBAL_STATUS 0x04 |
| 25 | #define FLASH_TYPE_MASK (0x3 << 24) |
| 26 | #define FLASH_TYPE_NAND_2K (0x3 << 24) |
| 27 | #define FLASH_TYPE_NAND_512 (0x2 << 24) |
| 28 | #define FLASH_TYPE_PARALLEL (0x1 << 24) |
| 29 | #define FLASH_TYPE_SERIAL (0x0 << 24) |
| 30 | /* if parallel */ |
| 31 | #define FLASH_WIDTH_16BIT (1 << 23) /* else 8 bit */ |
| 32 | /* if serial */ |
| 33 | #define FLASH_ATMEL (1 << 23) /* else STM */ |
| 34 | |
| 35 | #define FLASH_SIZE_MASK (0x3 << 21) |
| 36 | #define NAND_256M (0x3 << 21) /* and more */ |
| 37 | #define NAND_128M (0x2 << 21) |
| 38 | #define NAND_64M (0x1 << 21) |
| 39 | #define NAND_32M (0x0 << 21) |
| 40 | #define ATMEL_16M (0x3 << 21) /* and more */ |
| 41 | #define ATMEL_8M (0x2 << 21) |
| 42 | #define ATMEL_4M_2M (0x1 << 21) |
| 43 | #define ATMEL_1M (0x0 << 21) /* and less */ |
| 44 | #define STM_32M (1 << 22) /* and more */ |
| 45 | #define STM_16M (0 << 22) /* and less */ |
| 46 | |
| 47 | #define FLASH_PARALLEL_HIGH_PIN_CNT (1 << 20) /* else low pin cnt */ |
| 48 | |
Linus Walleij | 9d3b508 | 2018-11-27 21:53:58 +0100 | [diff] [blame] | 49 | static const struct of_device_id syscon_match[] = { |
| 50 | { .compatible = "cortina,gemini-syscon" }, |
| 51 | { }, |
| 52 | }; |
| 53 | |
| 54 | struct gemini_flash { |
| 55 | struct device *dev; |
| 56 | struct pinctrl *p; |
| 57 | struct pinctrl_state *enabled_state; |
| 58 | struct pinctrl_state *disabled_state; |
| 59 | }; |
| 60 | |
| 61 | /* Static local state */ |
| 62 | static struct gemini_flash *gf; |
| 63 | |
| 64 | static void gemini_flash_enable_pins(void) |
| 65 | { |
| 66 | int ret; |
| 67 | |
| 68 | if (IS_ERR(gf->enabled_state)) |
| 69 | return; |
| 70 | ret = pinctrl_select_state(gf->p, gf->enabled_state); |
| 71 | if (ret) |
| 72 | dev_err(gf->dev, "failed to enable pins\n"); |
| 73 | } |
| 74 | |
| 75 | static void gemini_flash_disable_pins(void) |
| 76 | { |
| 77 | int ret; |
| 78 | |
| 79 | if (IS_ERR(gf->disabled_state)) |
| 80 | return; |
| 81 | ret = pinctrl_select_state(gf->p, gf->disabled_state); |
| 82 | if (ret) |
| 83 | dev_err(gf->dev, "failed to disable pins\n"); |
| 84 | } |
| 85 | |
| 86 | static map_word __xipram gemini_flash_map_read(struct map_info *map, |
| 87 | unsigned long ofs) |
| 88 | { |
| 89 | map_word __xipram ret; |
| 90 | |
| 91 | gemini_flash_enable_pins(); |
| 92 | ret = inline_map_read(map, ofs); |
| 93 | gemini_flash_disable_pins(); |
| 94 | |
| 95 | return ret; |
| 96 | } |
| 97 | |
| 98 | static void __xipram gemini_flash_map_write(struct map_info *map, |
| 99 | const map_word datum, |
| 100 | unsigned long ofs) |
| 101 | { |
| 102 | gemini_flash_enable_pins(); |
| 103 | inline_map_write(map, datum, ofs); |
| 104 | gemini_flash_disable_pins(); |
| 105 | } |
| 106 | |
| 107 | static void __xipram gemini_flash_map_copy_from(struct map_info *map, |
| 108 | void *to, unsigned long from, |
| 109 | ssize_t len) |
| 110 | { |
| 111 | gemini_flash_enable_pins(); |
| 112 | inline_map_copy_from(map, to, from, len); |
| 113 | gemini_flash_disable_pins(); |
| 114 | } |
| 115 | |
| 116 | static void __xipram gemini_flash_map_copy_to(struct map_info *map, |
| 117 | unsigned long to, |
| 118 | const void *from, ssize_t len) |
| 119 | { |
| 120 | gemini_flash_enable_pins(); |
| 121 | inline_map_copy_to(map, to, from, len); |
| 122 | gemini_flash_disable_pins(); |
| 123 | } |
| 124 | |
Linus Walleij | 56ff337 | 2017-01-28 22:50:48 +0100 | [diff] [blame] | 125 | int of_flash_probe_gemini(struct platform_device *pdev, |
| 126 | struct device_node *np, |
| 127 | struct map_info *map) |
| 128 | { |
Julia Lawall | 6c51a52 | 2017-05-04 22:10:47 +0200 | [diff] [blame] | 129 | struct regmap *rmap; |
Linus Walleij | 56ff337 | 2017-01-28 22:50:48 +0100 | [diff] [blame] | 130 | struct device *dev = &pdev->dev; |
| 131 | u32 val; |
| 132 | int ret; |
| 133 | |
| 134 | /* Multiplatform guard */ |
| 135 | if (!of_device_is_compatible(np, "cortina,gemini-flash")) |
| 136 | return 0; |
| 137 | |
Linus Walleij | 9d3b508 | 2018-11-27 21:53:58 +0100 | [diff] [blame] | 138 | gf = devm_kzalloc(dev, sizeof(*gf), GFP_KERNEL); |
| 139 | if (!gf) |
| 140 | return -ENOMEM; |
| 141 | gf->dev = dev; |
| 142 | |
Linus Walleij | 56ff337 | 2017-01-28 22:50:48 +0100 | [diff] [blame] | 143 | rmap = syscon_regmap_lookup_by_phandle(np, "syscon"); |
| 144 | if (IS_ERR(rmap)) { |
| 145 | dev_err(dev, "no syscon\n"); |
| 146 | return PTR_ERR(rmap); |
| 147 | } |
| 148 | |
| 149 | ret = regmap_read(rmap, GLOBAL_STATUS, &val); |
| 150 | if (ret) { |
| 151 | dev_err(dev, "failed to read global status register\n"); |
| 152 | return -ENODEV; |
| 153 | } |
| 154 | dev_dbg(dev, "global status reg: %08x\n", val); |
| 155 | |
| 156 | /* |
| 157 | * It would be contradictory if a physmap flash was NOT parallel. |
| 158 | */ |
| 159 | if ((val & FLASH_TYPE_MASK) != FLASH_TYPE_PARALLEL) { |
| 160 | dev_err(dev, "flash is not parallel\n"); |
| 161 | return -ENODEV; |
| 162 | } |
| 163 | |
| 164 | /* |
| 165 | * Complain if DT data and hardware definition is different. |
| 166 | */ |
| 167 | if (val & FLASH_WIDTH_16BIT) { |
| 168 | if (map->bankwidth != 2) |
| 169 | dev_warn(dev, "flash hardware say flash is 16 bit wide but DT says it is %d bits wide\n", |
| 170 | map->bankwidth * 8); |
| 171 | } else { |
| 172 | if (map->bankwidth != 1) |
| 173 | dev_warn(dev, "flash hardware say flash is 8 bit wide but DT says it is %d bits wide\n", |
| 174 | map->bankwidth * 8); |
| 175 | } |
| 176 | |
Linus Walleij | 9d3b508 | 2018-11-27 21:53:58 +0100 | [diff] [blame] | 177 | gf->p = devm_pinctrl_get(dev); |
| 178 | if (IS_ERR(gf->p)) { |
| 179 | dev_err(dev, "no pinctrl handle\n"); |
| 180 | ret = PTR_ERR(gf->p); |
| 181 | return ret; |
| 182 | } |
| 183 | |
| 184 | gf->enabled_state = pinctrl_lookup_state(gf->p, "enabled"); |
| 185 | if (IS_ERR(gf->enabled_state)) |
| 186 | dev_err(dev, "no enabled pin control state\n"); |
| 187 | |
| 188 | gf->disabled_state = pinctrl_lookup_state(gf->p, "disabled"); |
| 189 | if (IS_ERR(gf->enabled_state)) { |
| 190 | dev_err(dev, "no disabled pin control state\n"); |
| 191 | } else { |
| 192 | ret = pinctrl_select_state(gf->p, gf->disabled_state); |
| 193 | if (ret) |
| 194 | dev_err(gf->dev, "failed to disable pins\n"); |
| 195 | } |
| 196 | |
| 197 | map->read = gemini_flash_map_read; |
| 198 | map->write = gemini_flash_map_write; |
| 199 | map->copy_from = gemini_flash_map_copy_from; |
| 200 | map->copy_to = gemini_flash_map_copy_to; |
| 201 | |
| 202 | dev_info(dev, "initialized Gemini-specific physmap control\n"); |
Linus Walleij | 56ff337 | 2017-01-28 22:50:48 +0100 | [diff] [blame] | 203 | |
| 204 | return 0; |
| 205 | } |