Jean Delvare | bfcd415 | 2011-03-21 17:59:35 +0100 | [diff] [blame] | 1 | Kernel driver w83795 |
| 2 | ==================== |
| 3 | |
| 4 | Supported chips: |
Mauro Carvalho Chehab | b04f2f7 | 2019-04-17 06:46:28 -0300 | [diff] [blame] | 5 | |
Jean Delvare | bfcd415 | 2011-03-21 17:59:35 +0100 | [diff] [blame] | 6 | * Winbond/Nuvoton W83795G |
Mauro Carvalho Chehab | b04f2f7 | 2019-04-17 06:46:28 -0300 | [diff] [blame] | 7 | |
Jean Delvare | bfcd415 | 2011-03-21 17:59:35 +0100 | [diff] [blame] | 8 | Prefix: 'w83795g' |
Mauro Carvalho Chehab | b04f2f7 | 2019-04-17 06:46:28 -0300 | [diff] [blame] | 9 | |
Jean Delvare | bfcd415 | 2011-03-21 17:59:35 +0100 | [diff] [blame] | 10 | Addresses scanned: I2C 0x2c - 0x2f |
Mauro Carvalho Chehab | b04f2f7 | 2019-04-17 06:46:28 -0300 | [diff] [blame] | 11 | |
Jean Delvare | bfcd415 | 2011-03-21 17:59:35 +0100 | [diff] [blame] | 12 | Datasheet: Available for download on nuvoton.com |
Mauro Carvalho Chehab | b04f2f7 | 2019-04-17 06:46:28 -0300 | [diff] [blame] | 13 | |
Jean Delvare | bfcd415 | 2011-03-21 17:59:35 +0100 | [diff] [blame] | 14 | * Winbond/Nuvoton W83795ADG |
Mauro Carvalho Chehab | b04f2f7 | 2019-04-17 06:46:28 -0300 | [diff] [blame] | 15 | |
Jean Delvare | bfcd415 | 2011-03-21 17:59:35 +0100 | [diff] [blame] | 16 | Prefix: 'w83795adg' |
Mauro Carvalho Chehab | b04f2f7 | 2019-04-17 06:46:28 -0300 | [diff] [blame] | 17 | |
Jean Delvare | bfcd415 | 2011-03-21 17:59:35 +0100 | [diff] [blame] | 18 | Addresses scanned: I2C 0x2c - 0x2f |
Mauro Carvalho Chehab | b04f2f7 | 2019-04-17 06:46:28 -0300 | [diff] [blame] | 19 | |
Jean Delvare | bfcd415 | 2011-03-21 17:59:35 +0100 | [diff] [blame] | 20 | Datasheet: Available for download on nuvoton.com |
| 21 | |
| 22 | Authors: |
Mauro Carvalho Chehab | b04f2f7 | 2019-04-17 06:46:28 -0300 | [diff] [blame] | 23 | - Wei Song (Nuvoton) |
| 24 | - Jean Delvare <jdelvare@suse.de> |
Jean Delvare | bfcd415 | 2011-03-21 17:59:35 +0100 | [diff] [blame] | 25 | |
| 26 | |
| 27 | Pin mapping |
| 28 | ----------- |
| 29 | |
| 30 | Here is a summary of the pin mapping for the W83795G and W83795ADG. |
| 31 | This can be useful to convert data provided by board manufacturers |
| 32 | into working libsensors configuration statements. |
| 33 | |
Jean Delvare | bfcd415 | 2011-03-21 17:59:35 +0100 | [diff] [blame] | 34 | |
Mauro Carvalho Chehab | b04f2f7 | 2019-04-17 06:46:28 -0300 | [diff] [blame] | 35 | - W83795G |
| 36 | |
| 37 | ========= ======================= =============== ================ |
| 38 | Pin Name Register Sysfs attribute |
| 39 | ========= ======================= =============== ================ |
| 40 | 13 VSEN1 (VCORE1) 10h in0 |
| 41 | 14 VSEN2 (VCORE2) 11h in1 |
| 42 | 15 VSEN3 (VCORE3) 12h in2 |
| 43 | 16 VSEN4 13h in3 |
| 44 | 17 VSEN5 14h in4 |
| 45 | 18 VSEN6 15h in5 |
| 46 | 19 VSEN7 16h in6 |
| 47 | 20 VSEN8 17h in7 |
| 48 | 21 VSEN9 18h in8 |
| 49 | 22 VSEN10 19h in9 |
| 50 | 23 VSEN11 1Ah in10 |
| 51 | 28 VTT 1Bh in11 |
| 52 | 24 3VDD 1Ch in12 |
| 53 | 25 3VSB 1Dh in13 |
| 54 | 26 VBAT 1Eh in14 |
| 55 | 3 VSEN12/TR5 1Fh in15/temp5 |
| 56 | 4 VSEN13/TR5 20h in16/temp6 |
| 57 | 5/ 6 VDSEN14/TR1/TD1 21h in17/temp1 |
| 58 | 7/ 8 VDSEN15/TR2/TD2 22h in18/temp2 |
| 59 | 9/ 10 VDSEN16/TR3/TD3 23h in19/temp3 |
| 60 | 11/ 12 VDSEN17/TR4/TD4 24h in20/temp4 |
| 61 | 40 FANIN1 2Eh fan1 |
| 62 | 42 FANIN2 2Fh fan2 |
| 63 | 44 FANIN3 30h fan3 |
| 64 | 46 FANIN4 31h fan4 |
| 65 | 48 FANIN5 32h fan5 |
| 66 | 50 FANIN6 33h fan6 |
| 67 | 52 FANIN7 34h fan7 |
| 68 | 54 FANIN8 35h fan8 |
| 69 | 57 FANIN9 36h fan9 |
| 70 | 58 FANIN10 37h fan10 |
| 71 | 59 FANIN11 38h fan11 |
| 72 | 60 FANIN12 39h fan12 |
| 73 | 31 FANIN13 3Ah fan13 |
| 74 | 35 FANIN14 3Bh fan14 |
| 75 | 41 FANCTL1 10h (bank 2) pwm1 |
| 76 | 43 FANCTL2 11h (bank 2) pwm2 |
| 77 | 45 FANCTL3 12h (bank 2) pwm3 |
| 78 | 47 FANCTL4 13h (bank 2) pwm4 |
| 79 | 49 FANCTL5 14h (bank 2) pwm5 |
| 80 | 51 FANCTL6 15h (bank 2) pwm6 |
| 81 | 53 FANCTL7 16h (bank 2) pwm7 |
| 82 | 55 FANCTL8 17h (bank 2) pwm8 |
| 83 | 29/ 30 PECI/TSI (DTS1) 26h temp7 |
| 84 | 29/ 30 PECI/TSI (DTS2) 27h temp8 |
| 85 | 29/ 30 PECI/TSI (DTS3) 28h temp9 |
| 86 | 29/ 30 PECI/TSI (DTS4) 29h temp10 |
| 87 | 29/ 30 PECI/TSI (DTS5) 2Ah temp11 |
| 88 | 29/ 30 PECI/TSI (DTS6) 2Bh temp12 |
| 89 | 29/ 30 PECI/TSI (DTS7) 2Ch temp13 |
| 90 | 29/ 30 PECI/TSI (DTS8) 2Dh temp14 |
| 91 | 27 CASEOPEN# 46h intrusion0 |
| 92 | ========= ======================= =============== ================ |
| 93 | |
| 94 | - W83795ADG |
| 95 | |
| 96 | ========= ======================= =============== ================ |
| 97 | Pin Name Register Sysfs attribute |
| 98 | ========= ======================= =============== ================ |
| 99 | 10 VSEN1 (VCORE1) 10h in0 |
| 100 | 11 VSEN2 (VCORE2) 11h in1 |
| 101 | 12 VSEN3 (VCORE3) 12h in2 |
| 102 | 13 VSEN4 13h in3 |
| 103 | 14 VSEN5 14h in4 |
| 104 | 15 VSEN6 15h in5 |
| 105 | 16 VSEN7 16h in6 |
| 106 | 17 VSEN8 17h in7 |
| 107 | 22 VTT 1Bh in11 |
| 108 | 18 3VDD 1Ch in12 |
| 109 | 19 3VSB 1Dh in13 |
| 110 | 20 VBAT 1Eh in14 |
| 111 | 48 VSEN12/TR5 1Fh in15/temp5 |
| 112 | 1 VSEN13/TR5 20h in16/temp6 |
| 113 | 2/ 3 VDSEN14/TR1/TD1 21h in17/temp1 |
| 114 | 4/ 5 VDSEN15/TR2/TD2 22h in18/temp2 |
| 115 | 6/ 7 VDSEN16/TR3/TD3 23h in19/temp3 |
| 116 | 8/ 9 VDSEN17/TR4/TD4 24h in20/temp4 |
| 117 | 32 FANIN1 2Eh fan1 |
| 118 | 34 FANIN2 2Fh fan2 |
| 119 | 36 FANIN3 30h fan3 |
| 120 | 37 FANIN4 31h fan4 |
| 121 | 38 FANIN5 32h fan5 |
| 122 | 39 FANIN6 33h fan6 |
| 123 | 40 FANIN7 34h fan7 |
| 124 | 41 FANIN8 35h fan8 |
| 125 | 43 FANIN9 36h fan9 |
| 126 | 44 FANIN10 37h fan10 |
| 127 | 45 FANIN11 38h fan11 |
| 128 | 46 FANIN12 39h fan12 |
| 129 | 24 FANIN13 3Ah fan13 |
| 130 | 28 FANIN14 3Bh fan14 |
| 131 | 33 FANCTL1 10h (bank 2) pwm1 |
| 132 | 35 FANCTL2 11h (bank 2) pwm2 |
| 133 | 23 PECI (DTS1) 26h temp7 |
| 134 | 23 PECI (DTS2) 27h temp8 |
| 135 | 23 PECI (DTS3) 28h temp9 |
| 136 | 23 PECI (DTS4) 29h temp10 |
| 137 | 23 PECI (DTS5) 2Ah temp11 |
| 138 | 23 PECI (DTS6) 2Bh temp12 |
| 139 | 23 PECI (DTS7) 2Ch temp13 |
| 140 | 23 PECI (DTS8) 2Dh temp14 |
| 141 | 21 CASEOPEN# 46h intrusion0 |
| 142 | ========= ======================= =============== ================ |