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Greg Kroah-Hartmanb2441312017-11-01 15:07:57 +01001// SPDX-License-Identifier: GPL-2.0
Paul Mundt85b59f52010-02-01 13:01:42 +09002#include <linux/pci.h>
Paul Mundtef407be2010-02-01 16:39:46 +09003#include <linux/interrupt.h>
4#include <linux/timer.h>
Paul Mundt85b59f52010-02-01 13:01:42 +09005#include <linux/kernel.h>
6
Paul Mundt9ad62ec2010-02-03 16:46:20 +09007/*
8 * These functions are used early on before PCI scanning is done
9 * and all of the pci_dev and pci_bus structures have been created.
10 */
11static struct pci_dev *fake_pci_dev(struct pci_channel *hose,
12 int top_bus, int busnr, int devfn)
Paul Mundt85b59f52010-02-01 13:01:42 +090013{
Paul Mundt9ad62ec2010-02-03 16:46:20 +090014 static struct pci_dev dev;
15 static struct pci_bus bus;
Paul Mundt85b59f52010-02-01 13:01:42 +090016
Paul Mundt9ad62ec2010-02-03 16:46:20 +090017 dev.bus = &bus;
18 dev.sysdata = hose;
19 dev.devfn = devfn;
20 bus.number = busnr;
21 bus.sysdata = hose;
22 bus.ops = hose->pci_ops;
Paul Mundt85b59f52010-02-01 13:01:42 +090023
Paul Mundt9ad62ec2010-02-03 16:46:20 +090024 if(busnr != top_bus)
Paul Mundt85b59f52010-02-01 13:01:42 +090025 /* Fake a parent bus structure. */
Paul Mundt9ad62ec2010-02-03 16:46:20 +090026 bus.parent = &bus;
Paul Mundt85b59f52010-02-01 13:01:42 +090027 else
Paul Mundt9ad62ec2010-02-03 16:46:20 +090028 bus.parent = NULL;
Paul Mundt85b59f52010-02-01 13:01:42 +090029
Paul Mundt9ad62ec2010-02-03 16:46:20 +090030 return &dev;
Paul Mundt85b59f52010-02-01 13:01:42 +090031}
32
Paul Mundt9ad62ec2010-02-03 16:46:20 +090033#define EARLY_PCI_OP(rw, size, type) \
34int __init early_##rw##_config_##size(struct pci_channel *hose, \
35 int top_bus, int bus, int devfn, int offset, type value) \
36{ \
37 return pci_##rw##_config_##size( \
38 fake_pci_dev(hose, top_bus, bus, devfn), \
39 offset, value); \
40}
41
42EARLY_PCI_OP(read, byte, u8 *)
43EARLY_PCI_OP(read, word, u16 *)
44EARLY_PCI_OP(read, dword, u32 *)
45EARLY_PCI_OP(write, byte, u8)
46EARLY_PCI_OP(write, word, u16)
47EARLY_PCI_OP(write, dword, u32)
48
Paul Mundt85b59f52010-02-01 13:01:42 +090049int __init pci_is_66mhz_capable(struct pci_channel *hose,
50 int top_bus, int current_bus)
51{
52 u32 pci_devfn;
53 unsigned short vid;
54 int cap66 = -1;
55 u16 stat;
56
Geert Uytterhoeven601bf182020-06-17 16:36:38 +020057 pr_info("PCI: Checking 66MHz capabilities...\n");
Paul Mundt85b59f52010-02-01 13:01:42 +090058
59 for (pci_devfn = 0; pci_devfn < 0xff; pci_devfn++) {
60 if (PCI_FUNC(pci_devfn))
61 continue;
62 if (early_read_config_word(hose, top_bus, current_bus,
63 pci_devfn, PCI_VENDOR_ID, &vid) !=
64 PCIBIOS_SUCCESSFUL)
65 continue;
66 if (vid == 0xffff)
67 continue;
68
69 /* check 66MHz capability */
70 if (cap66 < 0)
71 cap66 = 1;
72 if (cap66) {
73 early_read_config_word(hose, top_bus, current_bus,
74 pci_devfn, PCI_STATUS, &stat);
75 if (!(stat & PCI_STATUS_66MHZ)) {
76 printk(KERN_DEBUG
77 "PCI: %02x:%02x not 66MHz capable.\n",
78 current_bus, pci_devfn);
79 cap66 = 0;
80 break;
81 }
82 }
83 }
84
85 return cap66 > 0;
86}
Paul Mundtef407be2010-02-01 16:39:46 +090087
Kees Cooke99e88a2017-10-16 14:43:17 -070088static void pcibios_enable_err(struct timer_list *t)
Paul Mundtef407be2010-02-01 16:39:46 +090089{
Kees Cooke99e88a2017-10-16 14:43:17 -070090 struct pci_channel *hose = from_timer(hose, t, err_timer);
Paul Mundtef407be2010-02-01 16:39:46 +090091
92 del_timer(&hose->err_timer);
93 printk(KERN_DEBUG "PCI: re-enabling error IRQ.\n");
94 enable_irq(hose->err_irq);
95}
96
Kees Cooke99e88a2017-10-16 14:43:17 -070097static void pcibios_enable_serr(struct timer_list *t)
Paul Mundtef407be2010-02-01 16:39:46 +090098{
Kees Cooke99e88a2017-10-16 14:43:17 -070099 struct pci_channel *hose = from_timer(hose, t, serr_timer);
Paul Mundtef407be2010-02-01 16:39:46 +0900100
101 del_timer(&hose->serr_timer);
102 printk(KERN_DEBUG "PCI: re-enabling system error IRQ.\n");
103 enable_irq(hose->serr_irq);
104}
105
106void pcibios_enable_timers(struct pci_channel *hose)
107{
108 if (hose->err_irq) {
Kees Cooke99e88a2017-10-16 14:43:17 -0700109 timer_setup(&hose->err_timer, pcibios_enable_err, 0);
Paul Mundtef407be2010-02-01 16:39:46 +0900110 }
111
112 if (hose->serr_irq) {
Kees Cooke99e88a2017-10-16 14:43:17 -0700113 timer_setup(&hose->serr_timer, pcibios_enable_serr, 0);
Paul Mundtef407be2010-02-01 16:39:46 +0900114 }
115}
116
117/*
118 * A simple handler for the regular PCI status errors, called from IRQ
119 * context.
120 */
121unsigned int pcibios_handle_status_errors(unsigned long addr,
122 unsigned int status,
123 struct pci_channel *hose)
124{
125 unsigned int cmd = 0;
126
127 if (status & PCI_STATUS_REC_MASTER_ABORT) {
128 printk(KERN_DEBUG "PCI: master abort, pc=0x%08lx\n", addr);
129 cmd |= PCI_STATUS_REC_MASTER_ABORT;
130 }
131
132 if (status & PCI_STATUS_REC_TARGET_ABORT) {
133 printk(KERN_DEBUG "PCI: target abort: ");
134 pcibios_report_status(PCI_STATUS_REC_TARGET_ABORT |
135 PCI_STATUS_SIG_TARGET_ABORT |
136 PCI_STATUS_REC_MASTER_ABORT, 1);
Geert Uytterhoeven601bf182020-06-17 16:36:38 +0200137 pr_cont("\n");
Paul Mundtef407be2010-02-01 16:39:46 +0900138
139 cmd |= PCI_STATUS_REC_TARGET_ABORT;
140 }
141
142 if (status & (PCI_STATUS_PARITY | PCI_STATUS_DETECTED_PARITY)) {
143 printk(KERN_DEBUG "PCI: parity error detected: ");
144 pcibios_report_status(PCI_STATUS_PARITY |
145 PCI_STATUS_DETECTED_PARITY, 1);
Geert Uytterhoeven601bf182020-06-17 16:36:38 +0200146 pr_cont("\n");
Paul Mundtef407be2010-02-01 16:39:46 +0900147
148 cmd |= PCI_STATUS_PARITY | PCI_STATUS_DETECTED_PARITY;
149
150 /* Now back off of the IRQ for awhile */
151 if (hose->err_irq) {
Paul Mundt9ad62ec2010-02-03 16:46:20 +0900152 disable_irq_nosync(hose->err_irq);
Paul Mundtef407be2010-02-01 16:39:46 +0900153 hose->err_timer.expires = jiffies + HZ;
154 add_timer(&hose->err_timer);
155 }
156 }
157
158 return cmd;
159}