blob: 678432f6ef74807e36876c1706dd697029350b2c [file] [log] [blame]
Greg Kroah-Hartman5fd54ac2017-11-03 11:28:30 +01001// SPDX-License-Identifier: GPL-2.0
Chunfeng Yundf2069a2016-10-19 10:28:23 +08002/*
3 * mtu3_gadget_ep0.c - MediaTek USB3 DRD peripheral driver ep0 handling
4 *
5 * Copyright (c) 2016 MediaTek Inc.
6 *
7 * Author: Chunfeng.Yun <chunfeng.yun@mediatek.com>
8 *
9 * This software is licensed under the terms of the GNU General Public
10 * License version 2, as published by the Free Software Foundation, and
11 * may be copied, distributed, and modified under those terms.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 */
19
Chunfeng Yunfe7c9942017-07-25 16:10:22 +080020#include <linux/usb/composite.h>
21
Chunfeng Yundf2069a2016-10-19 10:28:23 +080022#include "mtu3.h"
23
24/* ep0 is always mtu3->in_eps[0] */
25#define next_ep0_request(mtu) next_request((mtu)->ep0)
26
27/* for high speed test mode; see USB 2.0 spec 7.1.20 */
28static const u8 mtu3_test_packet[53] = {
29 /* implicit SYNC then DATA0 to start */
30
31 /* JKJKJKJK x9 */
32 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
33 /* JJKKJJKK x8 */
34 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
35 /* JJJJKKKK x8 */
36 0xee, 0xee, 0xee, 0xee, 0xee, 0xee, 0xee, 0xee,
37 /* JJJJJJJKKKKKKK x8 */
38 0xfe, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
39 /* JJJJJJJK x8 */
40 0x7f, 0xbf, 0xdf, 0xef, 0xf7, 0xfb, 0xfd,
41 /* JKKKKKKK x10, JK */
42 0xfc, 0x7e, 0xbf, 0xdf, 0xef, 0xf7, 0xfb, 0xfd, 0x7e,
43 /* implicit CRC16 then EOP to end */
44};
45
46static char *decode_ep0_state(struct mtu3 *mtu)
47{
48 switch (mtu->ep0_state) {
49 case MU3D_EP0_STATE_SETUP:
50 return "SETUP";
51 case MU3D_EP0_STATE_TX:
52 return "IN";
53 case MU3D_EP0_STATE_RX:
54 return "OUT";
55 case MU3D_EP0_STATE_TX_END:
56 return "TX-END";
57 case MU3D_EP0_STATE_STALL:
58 return "STALL";
59 default:
60 return "??";
61 }
62}
63
64static void ep0_req_giveback(struct mtu3 *mtu, struct usb_request *req)
65{
66 mtu3_req_complete(mtu->ep0, req, 0);
67}
68
69static int
70forward_to_driver(struct mtu3 *mtu, const struct usb_ctrlrequest *setup)
71__releases(mtu->lock)
72__acquires(mtu->lock)
73{
74 int ret;
75
76 if (!mtu->gadget_driver)
77 return -EOPNOTSUPP;
78
79 spin_unlock(&mtu->lock);
80 ret = mtu->gadget_driver->setup(&mtu->g, setup);
81 spin_lock(&mtu->lock);
82
83 dev_dbg(mtu->dev, "%s ret %d\n", __func__, ret);
84 return ret;
85}
86
87static void ep0_write_fifo(struct mtu3_ep *mep, const u8 *src, u16 len)
88{
89 void __iomem *fifo = mep->mtu->mac_base + U3D_FIFO0;
90 u16 index = 0;
91
92 dev_dbg(mep->mtu->dev, "%s: ep%din, len=%d, buf=%p\n",
93 __func__, mep->epnum, len, src);
94
95 if (len >= 4) {
96 iowrite32_rep(fifo, src, len >> 2);
97 index = len & ~0x03;
98 }
99 if (len & 0x02) {
100 writew(*(u16 *)&src[index], fifo);
101 index += 2;
102 }
103 if (len & 0x01)
104 writeb(src[index], fifo);
105}
106
107static void ep0_read_fifo(struct mtu3_ep *mep, u8 *dst, u16 len)
108{
109 void __iomem *fifo = mep->mtu->mac_base + U3D_FIFO0;
110 u32 value;
111 u16 index = 0;
112
113 dev_dbg(mep->mtu->dev, "%s: ep%dout len=%d buf=%p\n",
114 __func__, mep->epnum, len, dst);
115
116 if (len >= 4) {
117 ioread32_rep(fifo, dst, len >> 2);
118 index = len & ~0x03;
119 }
120 if (len & 0x3) {
121 value = readl(fifo);
122 memcpy(&dst[index], &value, len & 0x3);
123 }
124
125}
126
127static void ep0_load_test_packet(struct mtu3 *mtu)
128{
129 /*
130 * because the length of test packet is less than max packet of HS ep0,
131 * write it into fifo directly.
132 */
133 ep0_write_fifo(mtu->ep0, mtu3_test_packet, sizeof(mtu3_test_packet));
134}
135
136/*
137 * A. send STALL for setup transfer without data stage:
138 * set SENDSTALL and SETUPPKTRDY at the same time;
139 * B. send STALL for other cases:
140 * set SENDSTALL only.
141 */
142static void ep0_stall_set(struct mtu3_ep *mep0, bool set, u32 pktrdy)
143{
144 struct mtu3 *mtu = mep0->mtu;
145 void __iomem *mbase = mtu->mac_base;
146 u32 csr;
147
148 /* EP0_SENTSTALL is W1C */
149 csr = mtu3_readl(mbase, U3D_EP0CSR) & EP0_W1C_BITS;
150 if (set)
151 csr |= EP0_SENDSTALL | pktrdy;
152 else
153 csr = (csr & ~EP0_SENDSTALL) | EP0_SENTSTALL;
154 mtu3_writel(mtu->mac_base, U3D_EP0CSR, csr);
155
Chunfeng Yunfe7c9942017-07-25 16:10:22 +0800156 mtu->delayed_status = false;
Chunfeng Yundf2069a2016-10-19 10:28:23 +0800157 mtu->ep0_state = MU3D_EP0_STATE_SETUP;
158
159 dev_dbg(mtu->dev, "ep0: %s STALL, ep0_state: %s\n",
160 set ? "SEND" : "CLEAR", decode_ep0_state(mtu));
161}
162
163static int ep0_queue(struct mtu3_ep *mep0, struct mtu3_request *mreq);
164
165static void ep0_dummy_complete(struct usb_ep *ep, struct usb_request *req)
166{}
167
Chunfeng Yuna29de312016-10-19 10:28:24 +0800168static void ep0_set_sel_complete(struct usb_ep *ep, struct usb_request *req)
169{
170 struct mtu3_request *mreq;
171 struct mtu3 *mtu;
172 struct usb_set_sel_req sel;
173
174 memcpy(&sel, req->buf, sizeof(sel));
175
176 mreq = to_mtu3_request(req);
177 mtu = mreq->mtu;
178 dev_dbg(mtu->dev, "u1sel:%d, u1pel:%d, u2sel:%d, u2pel:%d\n",
179 sel.u1_sel, sel.u1_pel, sel.u2_sel, sel.u2_pel);
180}
181
182/* queue data stage to handle 6 byte SET_SEL request */
183static int ep0_set_sel(struct mtu3 *mtu, struct usb_ctrlrequest *setup)
184{
185 int ret;
186 u16 length = le16_to_cpu(setup->wLength);
187
188 if (unlikely(length != 6)) {
189 dev_err(mtu->dev, "%s wrong wLength:%d\n",
190 __func__, length);
191 return -EINVAL;
192 }
193
194 mtu->ep0_req.mep = mtu->ep0;
195 mtu->ep0_req.request.length = 6;
196 mtu->ep0_req.request.buf = mtu->setup_buf;
197 mtu->ep0_req.request.complete = ep0_set_sel_complete;
198 ret = ep0_queue(mtu->ep0, &mtu->ep0_req);
199
200 return ret < 0 ? ret : 1;
201}
202
Chunfeng Yundf2069a2016-10-19 10:28:23 +0800203static int
204ep0_get_status(struct mtu3 *mtu, const struct usb_ctrlrequest *setup)
205{
206 struct mtu3_ep *mep = NULL;
207 int handled = 1;
208 u8 result[2] = {0, 0};
209 u8 epnum = 0;
210 int is_in;
211
212 switch (setup->bRequestType & USB_RECIP_MASK) {
213 case USB_RECIP_DEVICE:
214 result[0] = mtu->is_self_powered << USB_DEVICE_SELF_POWERED;
215 result[0] |= mtu->may_wakeup << USB_DEVICE_REMOTE_WAKEUP;
Chunfeng Yun4d79e042017-10-13 17:10:43 +0800216
217 if (mtu->g.speed >= USB_SPEED_SUPER) {
Chunfeng Yuna29de312016-10-19 10:28:24 +0800218 result[0] |= mtu->u1_enable << USB_DEV_STAT_U1_ENABLED;
219 result[0] |= mtu->u2_enable << USB_DEV_STAT_U2_ENABLED;
220 }
221
222 dev_dbg(mtu->dev, "%s result=%x, U1=%x, U2=%x\n", __func__,
223 result[0], mtu->u1_enable, mtu->u2_enable);
224
Chunfeng Yundf2069a2016-10-19 10:28:23 +0800225 break;
226 case USB_RECIP_INTERFACE:
227 break;
228 case USB_RECIP_ENDPOINT:
229 epnum = (u8) le16_to_cpu(setup->wIndex);
230 is_in = epnum & USB_DIR_IN;
231 epnum &= USB_ENDPOINT_NUMBER_MASK;
232
233 if (epnum >= mtu->num_eps) {
234 handled = -EINVAL;
235 break;
236 }
237 if (!epnum)
238 break;
239
240 mep = (is_in ? mtu->in_eps : mtu->out_eps) + epnum;
241 if (!mep->desc) {
242 handled = -EINVAL;
243 break;
244 }
245 if (mep->flags & MTU3_EP_STALL)
246 result[0] |= 1 << USB_ENDPOINT_HALT;
247
248 break;
249 default:
250 /* class, vendor, etc ... delegate */
251 handled = 0;
252 break;
253 }
254
255 if (handled > 0) {
256 int ret;
257
258 /* prepare a data stage for GET_STATUS */
259 dev_dbg(mtu->dev, "get_status=%x\n", *(u16 *)result);
260 memcpy(mtu->setup_buf, result, sizeof(result));
261 mtu->ep0_req.mep = mtu->ep0;
262 mtu->ep0_req.request.length = 2;
263 mtu->ep0_req.request.buf = &mtu->setup_buf;
264 mtu->ep0_req.request.complete = ep0_dummy_complete;
265 ret = ep0_queue(mtu->ep0, &mtu->ep0_req);
266 if (ret < 0)
267 handled = ret;
268 }
269 return handled;
270}
271
272static int handle_test_mode(struct mtu3 *mtu, struct usb_ctrlrequest *setup)
273{
274 void __iomem *mbase = mtu->mac_base;
275 int handled = 1;
276
277 switch (le16_to_cpu(setup->wIndex) >> 8) {
278 case TEST_J:
279 dev_dbg(mtu->dev, "TEST_J\n");
280 mtu->test_mode_nr = TEST_J_MODE;
281 break;
282 case TEST_K:
283 dev_dbg(mtu->dev, "TEST_K\n");
284 mtu->test_mode_nr = TEST_K_MODE;
285 break;
286 case TEST_SE0_NAK:
287 dev_dbg(mtu->dev, "TEST_SE0_NAK\n");
288 mtu->test_mode_nr = TEST_SE0_NAK_MODE;
289 break;
290 case TEST_PACKET:
291 dev_dbg(mtu->dev, "TEST_PACKET\n");
292 mtu->test_mode_nr = TEST_PACKET_MODE;
293 break;
294 default:
295 handled = -EINVAL;
296 goto out;
297 }
298
299 mtu->test_mode = true;
300
301 /* no TX completion interrupt, and need restart platform after test */
302 if (mtu->test_mode_nr == TEST_PACKET_MODE)
303 ep0_load_test_packet(mtu);
304
305 mtu3_writel(mbase, U3D_USB2_TEST_MODE, mtu->test_mode_nr);
306
307 mtu->ep0_state = MU3D_EP0_STATE_SETUP;
308
309out:
310 return handled;
311}
312
313static int ep0_handle_feature_dev(struct mtu3 *mtu,
314 struct usb_ctrlrequest *setup, bool set)
315{
Chunfeng Yuna29de312016-10-19 10:28:24 +0800316 void __iomem *mbase = mtu->mac_base;
Chunfeng Yundf2069a2016-10-19 10:28:23 +0800317 int handled = -EINVAL;
Chunfeng Yuna29de312016-10-19 10:28:24 +0800318 u32 lpc;
Chunfeng Yundf2069a2016-10-19 10:28:23 +0800319
320 switch (le16_to_cpu(setup->wValue)) {
321 case USB_DEVICE_REMOTE_WAKEUP:
322 mtu->may_wakeup = !!set;
323 handled = 1;
324 break;
325 case USB_DEVICE_TEST_MODE:
326 if (!set || (mtu->g.speed != USB_SPEED_HIGH) ||
327 (le16_to_cpu(setup->wIndex) & 0xff))
328 break;
329
330 handled = handle_test_mode(mtu, setup);
331 break;
Chunfeng Yuna29de312016-10-19 10:28:24 +0800332 case USB_DEVICE_U1_ENABLE:
Chunfeng Yun4d79e042017-10-13 17:10:43 +0800333 if (mtu->g.speed < USB_SPEED_SUPER ||
334 mtu->g.state != USB_STATE_CONFIGURED)
Chunfeng Yuna29de312016-10-19 10:28:24 +0800335 break;
336
337 lpc = mtu3_readl(mbase, U3D_LINK_POWER_CONTROL);
338 if (set)
339 lpc |= SW_U1_ACCEPT_ENABLE;
340 else
341 lpc &= ~SW_U1_ACCEPT_ENABLE;
342 mtu3_writel(mbase, U3D_LINK_POWER_CONTROL, lpc);
343
344 mtu->u1_enable = !!set;
345 handled = 1;
346 break;
347 case USB_DEVICE_U2_ENABLE:
Chunfeng Yun4d79e042017-10-13 17:10:43 +0800348 if (mtu->g.speed < USB_SPEED_SUPER ||
349 mtu->g.state != USB_STATE_CONFIGURED)
Chunfeng Yuna29de312016-10-19 10:28:24 +0800350 break;
351
352 lpc = mtu3_readl(mbase, U3D_LINK_POWER_CONTROL);
353 if (set)
354 lpc |= SW_U2_ACCEPT_ENABLE;
355 else
356 lpc &= ~SW_U2_ACCEPT_ENABLE;
357 mtu3_writel(mbase, U3D_LINK_POWER_CONTROL, lpc);
358
359 mtu->u2_enable = !!set;
360 handled = 1;
361 break;
Chunfeng Yundf2069a2016-10-19 10:28:23 +0800362 default:
363 handled = -EINVAL;
364 break;
365 }
366 return handled;
367}
368
369static int ep0_handle_feature(struct mtu3 *mtu,
370 struct usb_ctrlrequest *setup, bool set)
371{
372 struct mtu3_ep *mep;
373 int handled = -EINVAL;
374 int is_in;
375 u16 value;
376 u16 index;
377 u8 epnum;
378
379 value = le16_to_cpu(setup->wValue);
380 index = le16_to_cpu(setup->wIndex);
381
382 switch (setup->bRequestType & USB_RECIP_MASK) {
383 case USB_RECIP_DEVICE:
384 handled = ep0_handle_feature_dev(mtu, setup, set);
385 break;
Chunfeng Yuna29de312016-10-19 10:28:24 +0800386 case USB_RECIP_INTERFACE:
387 /* superspeed only */
Chunfeng Yun4d79e042017-10-13 17:10:43 +0800388 if (value == USB_INTRF_FUNC_SUSPEND &&
389 mtu->g.speed >= USB_SPEED_SUPER) {
Chunfeng Yuna29de312016-10-19 10:28:24 +0800390 /*
391 * forward the request because function drivers
392 * should handle it
393 */
394 handled = 0;
395 }
396 break;
Chunfeng Yundf2069a2016-10-19 10:28:23 +0800397 case USB_RECIP_ENDPOINT:
398 epnum = index & USB_ENDPOINT_NUMBER_MASK;
399 if (epnum == 0 || epnum >= mtu->num_eps ||
400 value != USB_ENDPOINT_HALT)
401 break;
402
403 is_in = index & USB_DIR_IN;
404 mep = (is_in ? mtu->in_eps : mtu->out_eps) + epnum;
405 if (!mep->desc)
406 break;
407
408 handled = 1;
409 /* ignore request if endpoint is wedged */
410 if (mep->wedged)
411 break;
412
413 mtu3_ep_stall_set(mep, set);
414 break;
415 default:
416 /* class, vendor, etc ... delegate */
417 handled = 0;
418 break;
419 }
420 return handled;
421}
422
423/*
424 * handle all control requests can be handled
425 * returns:
426 * negative errno - error happened
427 * zero - need delegate SETUP to gadget driver
428 * positive - already handled
429 */
430static int handle_standard_request(struct mtu3 *mtu,
431 struct usb_ctrlrequest *setup)
432{
433 void __iomem *mbase = mtu->mac_base;
434 enum usb_device_state state = mtu->g.state;
435 int handled = -EINVAL;
436 u32 dev_conf;
437 u16 value;
438
439 value = le16_to_cpu(setup->wValue);
440
441 /* the gadget driver handles everything except what we must handle */
442 switch (setup->bRequest) {
443 case USB_REQ_SET_ADDRESS:
444 /* change it after the status stage */
445 mtu->address = (u8) (value & 0x7f);
446 dev_dbg(mtu->dev, "set address to 0x%x\n", mtu->address);
447
448 dev_conf = mtu3_readl(mbase, U3D_DEVICE_CONF);
449 dev_conf &= ~DEV_ADDR_MSK;
450 dev_conf |= DEV_ADDR(mtu->address);
451 mtu3_writel(mbase, U3D_DEVICE_CONF, dev_conf);
452
453 if (mtu->address)
454 usb_gadget_set_state(&mtu->g, USB_STATE_ADDRESS);
455 else
456 usb_gadget_set_state(&mtu->g, USB_STATE_DEFAULT);
457
458 handled = 1;
459 break;
460 case USB_REQ_SET_CONFIGURATION:
461 if (state == USB_STATE_ADDRESS) {
462 usb_gadget_set_state(&mtu->g,
463 USB_STATE_CONFIGURED);
464 } else if (state == USB_STATE_CONFIGURED) {
465 /*
466 * USB2 spec sec 9.4.7, if wValue is 0 then dev
467 * is moved to addressed state
468 */
469 if (!value)
470 usb_gadget_set_state(&mtu->g,
471 USB_STATE_ADDRESS);
472 }
473 handled = 0;
474 break;
475 case USB_REQ_CLEAR_FEATURE:
476 handled = ep0_handle_feature(mtu, setup, 0);
477 break;
478 case USB_REQ_SET_FEATURE:
479 handled = ep0_handle_feature(mtu, setup, 1);
480 break;
481 case USB_REQ_GET_STATUS:
482 handled = ep0_get_status(mtu, setup);
483 break;
Chunfeng Yuna29de312016-10-19 10:28:24 +0800484 case USB_REQ_SET_SEL:
485 handled = ep0_set_sel(mtu, setup);
486 break;
Chunfeng Yundf2069a2016-10-19 10:28:23 +0800487 case USB_REQ_SET_ISOCH_DELAY:
488 handled = 1;
489 break;
490 default:
491 /* delegate SET_CONFIGURATION, etc */
492 handled = 0;
493 }
494
495 return handled;
496}
497
498/* receive an data packet (OUT) */
499static void ep0_rx_state(struct mtu3 *mtu)
500{
501 struct mtu3_request *mreq;
502 struct usb_request *req;
503 void __iomem *mbase = mtu->mac_base;
504 u32 maxp;
505 u32 csr;
506 u16 count = 0;
507
508 dev_dbg(mtu->dev, "%s\n", __func__);
509
510 csr = mtu3_readl(mbase, U3D_EP0CSR) & EP0_W1C_BITS;
511 mreq = next_ep0_request(mtu);
512 req = &mreq->request;
513
514 /* read packet and ack; or stall because of gadget driver bug */
515 if (req) {
516 void *buf = req->buf + req->actual;
517 unsigned int len = req->length - req->actual;
518
519 /* read the buffer */
520 count = mtu3_readl(mbase, U3D_RXCOUNT0);
521 if (count > len) {
522 req->status = -EOVERFLOW;
523 count = len;
524 }
525 ep0_read_fifo(mtu->ep0, buf, count);
526 req->actual += count;
527 csr |= EP0_RXPKTRDY;
528
529 maxp = mtu->g.ep0->maxpacket;
530 if (count < maxp || req->actual == req->length) {
531 mtu->ep0_state = MU3D_EP0_STATE_SETUP;
532 dev_dbg(mtu->dev, "ep0 state: %s\n",
533 decode_ep0_state(mtu));
534
535 csr |= EP0_DATAEND;
536 } else {
537 req = NULL;
538 }
539 } else {
540 csr |= EP0_RXPKTRDY | EP0_SENDSTALL;
541 dev_dbg(mtu->dev, "%s: SENDSTALL\n", __func__);
542 }
543
544 mtu3_writel(mbase, U3D_EP0CSR, csr);
545
546 /* give back the request if have received all data */
547 if (req)
548 ep0_req_giveback(mtu, req);
549
550}
551
552/* transmitting to the host (IN) */
553static void ep0_tx_state(struct mtu3 *mtu)
554{
555 struct mtu3_request *mreq = next_ep0_request(mtu);
556 struct usb_request *req;
557 u32 csr;
558 u8 *src;
559 u8 count;
560 u32 maxp;
561
562 dev_dbg(mtu->dev, "%s\n", __func__);
563
564 if (!mreq)
565 return;
566
567 maxp = mtu->g.ep0->maxpacket;
568 req = &mreq->request;
569
570 /* load the data */
571 src = (u8 *)req->buf + req->actual;
572 count = min(maxp, req->length - req->actual);
573 if (count)
574 ep0_write_fifo(mtu->ep0, src, count);
575
576 dev_dbg(mtu->dev, "%s act=%d, len=%d, cnt=%d, maxp=%d zero=%d\n",
577 __func__, req->actual, req->length, count, maxp, req->zero);
578
579 req->actual += count;
580
581 if ((count < maxp)
582 || ((req->actual == req->length) && !req->zero))
583 mtu->ep0_state = MU3D_EP0_STATE_TX_END;
584
585 /* send it out, triggering a "txpktrdy cleared" irq */
586 csr = mtu3_readl(mtu->mac_base, U3D_EP0CSR) & EP0_W1C_BITS;
587 mtu3_writel(mtu->mac_base, U3D_EP0CSR, csr | EP0_TXPKTRDY);
588
589 dev_dbg(mtu->dev, "%s ep0csr=0x%x\n", __func__,
590 mtu3_readl(mtu->mac_base, U3D_EP0CSR));
591}
592
593static void ep0_read_setup(struct mtu3 *mtu, struct usb_ctrlrequest *setup)
594{
595 struct mtu3_request *mreq;
596 u32 count;
597 u32 csr;
598
599 csr = mtu3_readl(mtu->mac_base, U3D_EP0CSR) & EP0_W1C_BITS;
600 count = mtu3_readl(mtu->mac_base, U3D_RXCOUNT0);
601
602 ep0_read_fifo(mtu->ep0, (u8 *)setup, count);
603
604 dev_dbg(mtu->dev, "SETUP req%02x.%02x v%04x i%04x l%04x\n",
605 setup->bRequestType, setup->bRequest,
606 le16_to_cpu(setup->wValue), le16_to_cpu(setup->wIndex),
607 le16_to_cpu(setup->wLength));
608
609 /* clean up any leftover transfers */
610 mreq = next_ep0_request(mtu);
611 if (mreq)
612 ep0_req_giveback(mtu, &mreq->request);
613
614 if (le16_to_cpu(setup->wLength) == 0) {
615 ; /* no data stage, nothing to do */
616 } else if (setup->bRequestType & USB_DIR_IN) {
617 mtu3_writel(mtu->mac_base, U3D_EP0CSR,
618 csr | EP0_SETUPPKTRDY | EP0_DPHTX);
619 mtu->ep0_state = MU3D_EP0_STATE_TX;
620 } else {
621 mtu3_writel(mtu->mac_base, U3D_EP0CSR,
622 (csr | EP0_SETUPPKTRDY) & (~EP0_DPHTX));
623 mtu->ep0_state = MU3D_EP0_STATE_RX;
624 }
625}
626
627static int ep0_handle_setup(struct mtu3 *mtu)
628__releases(mtu->lock)
629__acquires(mtu->lock)
630{
631 struct usb_ctrlrequest setup;
632 struct mtu3_request *mreq;
633 void __iomem *mbase = mtu->mac_base;
634 int handled = 0;
635
636 ep0_read_setup(mtu, &setup);
637
638 if ((setup.bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD)
639 handled = handle_standard_request(mtu, &setup);
640
641 dev_dbg(mtu->dev, "handled %d, ep0_state: %s\n",
642 handled, decode_ep0_state(mtu));
643
644 if (handled < 0)
645 goto stall;
646 else if (handled > 0)
647 goto finish;
648
649 handled = forward_to_driver(mtu, &setup);
650 if (handled < 0) {
651stall:
652 dev_dbg(mtu->dev, "%s stall (%d)\n", __func__, handled);
653
654 ep0_stall_set(mtu->ep0, true,
655 le16_to_cpu(setup.wLength) ? 0 : EP0_SETUPPKTRDY);
656
657 return 0;
658 }
659
660finish:
661 if (mtu->test_mode) {
662 ; /* nothing to do */
Chunfeng Yunfe7c9942017-07-25 16:10:22 +0800663 } else if (handled == USB_GADGET_DELAYED_STATUS) {
664 /* handle the delay STATUS phase till receive ep_queue on ep0 */
665 mtu->delayed_status = true;
Chunfeng Yundf2069a2016-10-19 10:28:23 +0800666 } else if (le16_to_cpu(setup.wLength) == 0) { /* no data stage */
667
668 mtu3_writel(mbase, U3D_EP0CSR,
669 (mtu3_readl(mbase, U3D_EP0CSR) & EP0_W1C_BITS)
670 | EP0_SETUPPKTRDY | EP0_DATAEND);
671
672 /* complete zlp request directly */
673 mreq = next_ep0_request(mtu);
674 if (mreq && !mreq->request.length)
675 ep0_req_giveback(mtu, &mreq->request);
676 }
677
678 return 0;
679}
680
681irqreturn_t mtu3_ep0_isr(struct mtu3 *mtu)
682{
683 void __iomem *mbase = mtu->mac_base;
684 struct mtu3_request *mreq;
685 u32 int_status;
686 irqreturn_t ret = IRQ_NONE;
687 u32 csr;
688 u32 len;
689
690 int_status = mtu3_readl(mbase, U3D_EPISR);
691 int_status &= mtu3_readl(mbase, U3D_EPIER);
692 mtu3_writel(mbase, U3D_EPISR, int_status); /* W1C */
693
694 /* only handle ep0's */
695 if (!(int_status & EP0ISR))
696 return IRQ_NONE;
697
698 csr = mtu3_readl(mbase, U3D_EP0CSR);
699
700 dev_dbg(mtu->dev, "%s csr=0x%x\n", __func__, csr);
701
702 /* we sent a stall.. need to clear it now.. */
703 if (csr & EP0_SENTSTALL) {
704 ep0_stall_set(mtu->ep0, false, 0);
705 csr = mtu3_readl(mbase, U3D_EP0CSR);
706 ret = IRQ_HANDLED;
707 }
708 dev_dbg(mtu->dev, "ep0_state: %s\n", decode_ep0_state(mtu));
709
710 switch (mtu->ep0_state) {
711 case MU3D_EP0_STATE_TX:
712 /* irq on clearing txpktrdy */
713 if ((csr & EP0_FIFOFULL) == 0) {
714 ep0_tx_state(mtu);
715 ret = IRQ_HANDLED;
716 }
717 break;
718 case MU3D_EP0_STATE_RX:
719 /* irq on set rxpktrdy */
720 if (csr & EP0_RXPKTRDY) {
721 ep0_rx_state(mtu);
722 ret = IRQ_HANDLED;
723 }
724 break;
725 case MU3D_EP0_STATE_TX_END:
726 mtu3_writel(mbase, U3D_EP0CSR,
727 (csr & EP0_W1C_BITS) | EP0_DATAEND);
728
729 mreq = next_ep0_request(mtu);
730 if (mreq)
731 ep0_req_giveback(mtu, &mreq->request);
732
733 mtu->ep0_state = MU3D_EP0_STATE_SETUP;
734 ret = IRQ_HANDLED;
735 dev_dbg(mtu->dev, "ep0_state: %s\n", decode_ep0_state(mtu));
736 break;
737 case MU3D_EP0_STATE_SETUP:
738 if (!(csr & EP0_SETUPPKTRDY))
739 break;
740
741 len = mtu3_readl(mbase, U3D_RXCOUNT0);
742 if (len != 8) {
743 dev_err(mtu->dev, "SETUP packet len %d != 8 ?\n", len);
744 break;
745 }
746
747 ep0_handle_setup(mtu);
748 ret = IRQ_HANDLED;
749 break;
750 default:
751 /* can't happen */
752 ep0_stall_set(mtu->ep0, true, 0);
753 WARN_ON(1);
754 break;
755 }
756
757 return ret;
758}
759
760
761static int mtu3_ep0_enable(struct usb_ep *ep,
762 const struct usb_endpoint_descriptor *desc)
763{
764 /* always enabled */
765 return -EINVAL;
766}
767
768static int mtu3_ep0_disable(struct usb_ep *ep)
769{
770 /* always enabled */
771 return -EINVAL;
772}
773
774static int ep0_queue(struct mtu3_ep *mep, struct mtu3_request *mreq)
775{
776 struct mtu3 *mtu = mep->mtu;
777
778 mreq->mtu = mtu;
779 mreq->request.actual = 0;
780 mreq->request.status = -EINPROGRESS;
781
782 dev_dbg(mtu->dev, "%s %s (ep0_state: %s), len#%d\n", __func__,
783 mep->name, decode_ep0_state(mtu), mreq->request.length);
784
Chunfeng Yundf2069a2016-10-19 10:28:23 +0800785 switch (mtu->ep0_state) {
786 case MU3D_EP0_STATE_SETUP:
787 case MU3D_EP0_STATE_RX: /* control-OUT data */
788 case MU3D_EP0_STATE_TX: /* control-IN data */
789 break;
790 default:
791 dev_err(mtu->dev, "%s, error in ep0 state %s\n", __func__,
792 decode_ep0_state(mtu));
793 return -EINVAL;
794 }
795
Chunfeng Yunfe7c9942017-07-25 16:10:22 +0800796 if (mtu->delayed_status) {
797 u32 csr;
798
799 mtu->delayed_status = false;
800 csr = mtu3_readl(mtu->mac_base, U3D_EP0CSR) & EP0_W1C_BITS;
801 csr |= EP0_SETUPPKTRDY | EP0_DATAEND;
802 mtu3_writel(mtu->mac_base, U3D_EP0CSR, csr);
803 /* needn't giveback the request for handling delay STATUS */
804 return 0;
805 }
806
807 if (!list_empty(&mep->req_list))
808 return -EBUSY;
809
Chunfeng Yundf2069a2016-10-19 10:28:23 +0800810 list_add_tail(&mreq->list, &mep->req_list);
811
812 /* sequence #1, IN ... start writing the data */
813 if (mtu->ep0_state == MU3D_EP0_STATE_TX)
814 ep0_tx_state(mtu);
815
816 return 0;
817}
818
819static int mtu3_ep0_queue(struct usb_ep *ep,
820 struct usb_request *req, gfp_t gfp)
821{
822 struct mtu3_ep *mep;
823 struct mtu3_request *mreq;
824 struct mtu3 *mtu;
825 unsigned long flags;
826 int ret = 0;
827
828 if (!ep || !req)
829 return -EINVAL;
830
831 mep = to_mtu3_ep(ep);
832 mtu = mep->mtu;
833 mreq = to_mtu3_request(req);
834
835 spin_lock_irqsave(&mtu->lock, flags);
836 ret = ep0_queue(mep, mreq);
837 spin_unlock_irqrestore(&mtu->lock, flags);
838 return ret;
839}
840
841static int mtu3_ep0_dequeue(struct usb_ep *ep, struct usb_request *req)
842{
843 /* we just won't support this */
844 return -EINVAL;
845}
846
847static int mtu3_ep0_halt(struct usb_ep *ep, int value)
848{
849 struct mtu3_ep *mep;
850 struct mtu3 *mtu;
851 unsigned long flags;
852 int ret = 0;
853
854 if (!ep || !value)
855 return -EINVAL;
856
857 mep = to_mtu3_ep(ep);
858 mtu = mep->mtu;
859
860 dev_dbg(mtu->dev, "%s\n", __func__);
861
862 spin_lock_irqsave(&mtu->lock, flags);
863
864 if (!list_empty(&mep->req_list)) {
865 ret = -EBUSY;
866 goto cleanup;
867 }
868
869 switch (mtu->ep0_state) {
870 /*
871 * stalls are usually issued after parsing SETUP packet, either
872 * directly in irq context from setup() or else later.
873 */
874 case MU3D_EP0_STATE_TX:
875 case MU3D_EP0_STATE_TX_END:
876 case MU3D_EP0_STATE_RX:
877 case MU3D_EP0_STATE_SETUP:
878 ep0_stall_set(mtu->ep0, true, 0);
879 break;
880 default:
881 dev_dbg(mtu->dev, "ep0 can't halt in state %s\n",
882 decode_ep0_state(mtu));
883 ret = -EINVAL;
884 }
885
886cleanup:
887 spin_unlock_irqrestore(&mtu->lock, flags);
888 return ret;
889}
890
891const struct usb_ep_ops mtu3_ep0_ops = {
892 .enable = mtu3_ep0_enable,
893 .disable = mtu3_ep0_disable,
894 .alloc_request = mtu3_alloc_request,
895 .free_request = mtu3_free_request,
896 .queue = mtu3_ep0_queue,
897 .dequeue = mtu3_ep0_dequeue,
898 .set_halt = mtu3_ep0_halt,
899};