Thomas Gleixner | caab277 | 2019-06-03 07:44:50 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0-only |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 2 | /* |
| 3 | * Based on arch/arm/mm/mmu.c |
| 4 | * |
| 5 | * Copyright (C) 1995-2005 Russell King |
| 6 | * Copyright (C) 2012 ARM Ltd. |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 7 | */ |
| 8 | |
Jisheng Zhang | 5a9e3e1 | 2016-08-15 14:45:46 +0800 | [diff] [blame] | 9 | #include <linux/cache.h> |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 10 | #include <linux/export.h> |
| 11 | #include <linux/kernel.h> |
| 12 | #include <linux/errno.h> |
| 13 | #include <linux/init.h> |
Takahiro Akashi | 98d2e15 | 2017-04-03 11:24:34 +0900 | [diff] [blame] | 14 | #include <linux/ioport.h> |
| 15 | #include <linux/kexec.h> |
Ard Biesheuvel | 61bd93c | 2015-06-01 13:40:32 +0200 | [diff] [blame] | 16 | #include <linux/libfdt.h> |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 17 | #include <linux/mman.h> |
| 18 | #include <linux/nodemask.h> |
| 19 | #include <linux/memblock.h> |
| 20 | #include <linux/fs.h> |
Catalin Marinas | 2475ff9 | 2012-10-23 14:55:08 +0100 | [diff] [blame] | 21 | #include <linux/io.h> |
Laura Abbott | 2077be6 | 2017-01-10 13:35:49 -0800 | [diff] [blame] | 22 | #include <linux/mm.h> |
Tobias Klauser | 6efd849 | 2017-05-15 13:40:20 +0200 | [diff] [blame] | 23 | #include <linux/vmalloc.h> |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 24 | |
Mark Rutland | 21ab99c | 2016-01-25 11:44:56 +0000 | [diff] [blame] | 25 | #include <asm/barrier.h> |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 26 | #include <asm/cputype.h> |
Laura Abbott | af86e59 | 2014-11-21 21:50:42 +0000 | [diff] [blame] | 27 | #include <asm/fixmap.h> |
Mark Rutland | 068a17a | 2016-01-25 11:45:12 +0000 | [diff] [blame] | 28 | #include <asm/kasan.h> |
Suzuki K. Poulose | b433dce | 2015-10-19 14:19:28 +0100 | [diff] [blame] | 29 | #include <asm/kernel-pgtable.h> |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 30 | #include <asm/sections.h> |
| 31 | #include <asm/setup.h> |
Masahiro Yamada | 87dfb31 | 2019-05-14 15:46:51 -0700 | [diff] [blame] | 32 | #include <linux/sizes.h> |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 33 | #include <asm/tlb.h> |
| 34 | #include <asm/mmu_context.h> |
Laura Abbott | 1404d6f | 2016-10-27 09:27:34 -0700 | [diff] [blame] | 35 | #include <asm/ptdump.h> |
Chintan Pandya | ec28bb9 | 2018-06-06 12:31:21 +0530 | [diff] [blame] | 36 | #include <asm/tlbflush.h> |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 37 | |
Ard Biesheuvel | c095136 | 2017-03-09 21:52:07 +0100 | [diff] [blame] | 38 | #define NO_BLOCK_MAPPINGS BIT(0) |
Ard Biesheuvel | d27cfa1 | 2017-03-09 21:52:09 +0100 | [diff] [blame] | 39 | #define NO_CONT_MAPPINGS BIT(1) |
Ard Biesheuvel | c095136 | 2017-03-09 21:52:07 +0100 | [diff] [blame] | 40 | |
Ard Biesheuvel | dd006da | 2015-03-19 16:42:27 +0000 | [diff] [blame] | 41 | u64 idmap_t0sz = TCR_T0SZ(VA_BITS); |
Kristina Martsenko | fa2a844 | 2017-12-13 17:07:24 +0000 | [diff] [blame] | 42 | u64 idmap_ptrs_per_pgd = PTRS_PER_PGD; |
Ard Biesheuvel | dd006da | 2015-03-19 16:42:27 +0000 | [diff] [blame] | 43 | |
Steve Capper | 5383cc6 | 2019-08-07 16:55:18 +0100 | [diff] [blame] | 44 | u64 __section(".mmuoff.data.write") vabits_actual; |
| 45 | EXPORT_SYMBOL(vabits_actual); |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 46 | |
Jisheng Zhang | 5a9e3e1 | 2016-08-15 14:45:46 +0800 | [diff] [blame] | 47 | u64 kimage_voffset __ro_after_init; |
Ard Biesheuvel | a7f8de1 | 2016-02-16 13:52:42 +0100 | [diff] [blame] | 48 | EXPORT_SYMBOL(kimage_voffset); |
| 49 | |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 50 | /* |
| 51 | * Empty_zero_page is a special page that is used for zero-initialized data |
| 52 | * and COW. |
| 53 | */ |
Mark Rutland | 5227cfa | 2016-01-25 11:44:57 +0000 | [diff] [blame] | 54 | unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)] __page_aligned_bss; |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 55 | EXPORT_SYMBOL(empty_zero_page); |
| 56 | |
Ard Biesheuvel | f904077 | 2016-02-16 13:52:40 +0100 | [diff] [blame] | 57 | static pte_t bm_pte[PTRS_PER_PTE] __page_aligned_bss; |
| 58 | static pmd_t bm_pmd[PTRS_PER_PMD] __page_aligned_bss __maybe_unused; |
| 59 | static pud_t bm_pud[PTRS_PER_PUD] __page_aligned_bss __maybe_unused; |
| 60 | |
Jun Yao | 2330b7c | 2018-09-24 17:15:02 +0100 | [diff] [blame] | 61 | static DEFINE_SPINLOCK(swapper_pgdir_lock); |
| 62 | |
| 63 | void set_swapper_pgd(pgd_t *pgdp, pgd_t pgd) |
| 64 | { |
| 65 | pgd_t *fixmap_pgdp; |
| 66 | |
| 67 | spin_lock(&swapper_pgdir_lock); |
James Morse | 26a6f87 | 2018-10-10 15:43:22 +0100 | [diff] [blame] | 68 | fixmap_pgdp = pgd_set_fixmap(__pa_symbol(pgdp)); |
Jun Yao | 2330b7c | 2018-09-24 17:15:02 +0100 | [diff] [blame] | 69 | WRITE_ONCE(*fixmap_pgdp, pgd); |
| 70 | /* |
| 71 | * We need dsb(ishst) here to ensure the page-table-walker sees |
| 72 | * our new entry before set_p?d() returns. The fixmap's |
| 73 | * flush_tlb_kernel_range() via clear_fixmap() does this for us. |
| 74 | */ |
| 75 | pgd_clear_fixmap(); |
| 76 | spin_unlock(&swapper_pgdir_lock); |
| 77 | } |
| 78 | |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 79 | pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn, |
| 80 | unsigned long size, pgprot_t vma_prot) |
| 81 | { |
| 82 | if (!pfn_valid(pfn)) |
| 83 | return pgprot_noncached(vma_prot); |
| 84 | else if (file->f_flags & O_SYNC) |
| 85 | return pgprot_writecombine(vma_prot); |
| 86 | return vma_prot; |
| 87 | } |
| 88 | EXPORT_SYMBOL(phys_mem_access_prot); |
| 89 | |
Yu Zhao | 90292ac | 2019-03-11 18:57:46 -0600 | [diff] [blame] | 90 | static phys_addr_t __init early_pgtable_alloc(int shift) |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 91 | { |
Suzuki K. Poulose | 7142392 | 2015-11-20 17:45:40 +0000 | [diff] [blame] | 92 | phys_addr_t phys; |
| 93 | void *ptr; |
| 94 | |
Mike Rapoport | 9a8dd70 | 2018-10-30 15:07:59 -0700 | [diff] [blame] | 95 | phys = memblock_phys_alloc(PAGE_SIZE, PAGE_SIZE); |
Mike Rapoport | ecc3e77 | 2019-03-11 23:29:26 -0700 | [diff] [blame] | 96 | if (!phys) |
| 97 | panic("Failed to allocate page table page\n"); |
Mark Rutland | f471044 | 2016-01-25 11:45:08 +0000 | [diff] [blame] | 98 | |
| 99 | /* |
| 100 | * The FIX_{PGD,PUD,PMD} slots may be in active use, but the FIX_PTE |
| 101 | * slot will be free, so we can (ab)use the FIX_PTE slot to initialise |
| 102 | * any level of table. |
| 103 | */ |
| 104 | ptr = pte_set_fixmap(phys); |
| 105 | |
Mark Rutland | 21ab99c | 2016-01-25 11:44:56 +0000 | [diff] [blame] | 106 | memset(ptr, 0, PAGE_SIZE); |
| 107 | |
Mark Rutland | f471044 | 2016-01-25 11:45:08 +0000 | [diff] [blame] | 108 | /* |
| 109 | * Implicit barriers also ensure the zeroed page is visible to the page |
| 110 | * table walker |
| 111 | */ |
| 112 | pte_clear_fixmap(); |
| 113 | |
| 114 | return phys; |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 115 | } |
| 116 | |
Ard Biesheuvel | e98216b | 2016-10-21 12:22:56 +0100 | [diff] [blame] | 117 | static bool pgattr_change_is_safe(u64 old, u64 new) |
| 118 | { |
| 119 | /* |
| 120 | * The following mapping attributes may be updated in live |
| 121 | * kernel mappings without the need for break-before-make. |
| 122 | */ |
Ard Biesheuvel | 753e8ab | 2018-02-23 18:04:48 +0000 | [diff] [blame] | 123 | static const pteval_t mask = PTE_PXN | PTE_RDONLY | PTE_WRITE | PTE_NG; |
Ard Biesheuvel | e98216b | 2016-10-21 12:22:56 +0100 | [diff] [blame] | 124 | |
Ard Biesheuvel | 141d149 | 2017-03-09 21:52:06 +0100 | [diff] [blame] | 125 | /* creating or taking down mappings is always safe */ |
| 126 | if (old == 0 || new == 0) |
| 127 | return true; |
| 128 | |
| 129 | /* live contiguous mappings may not be manipulated at all */ |
| 130 | if ((old | new) & PTE_CONT) |
| 131 | return false; |
| 132 | |
Ard Biesheuvel | 753e8ab | 2018-02-23 18:04:48 +0000 | [diff] [blame] | 133 | /* Transitioning from Non-Global to Global is unsafe */ |
| 134 | if (old & ~new & PTE_NG) |
| 135 | return false; |
Will Deacon | 4e60205 | 2018-01-29 11:59:54 +0000 | [diff] [blame] | 136 | |
Ard Biesheuvel | 141d149 | 2017-03-09 21:52:06 +0100 | [diff] [blame] | 137 | return ((old ^ new) & ~mask) == 0; |
Ard Biesheuvel | e98216b | 2016-10-21 12:22:56 +0100 | [diff] [blame] | 138 | } |
| 139 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 140 | static void init_pte(pmd_t *pmdp, unsigned long addr, unsigned long end, |
Ard Biesheuvel | d27cfa1 | 2017-03-09 21:52:09 +0100 | [diff] [blame] | 141 | phys_addr_t phys, pgprot_t prot) |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 142 | { |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 143 | pte_t *ptep; |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 144 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 145 | ptep = pte_set_fixmap_offset(pmdp, addr); |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 146 | do { |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 147 | pte_t old_pte = READ_ONCE(*ptep); |
Ard Biesheuvel | e98216b | 2016-10-21 12:22:56 +0100 | [diff] [blame] | 148 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 149 | set_pte(ptep, pfn_pte(__phys_to_pfn(phys), prot)); |
Ard Biesheuvel | e98216b | 2016-10-21 12:22:56 +0100 | [diff] [blame] | 150 | |
| 151 | /* |
| 152 | * After the PTE entry has been populated once, we |
| 153 | * only allow updates to the permission attributes. |
| 154 | */ |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 155 | BUG_ON(!pgattr_change_is_safe(pte_val(old_pte), |
| 156 | READ_ONCE(pte_val(*ptep)))); |
Ard Biesheuvel | e98216b | 2016-10-21 12:22:56 +0100 | [diff] [blame] | 157 | |
Ard Biesheuvel | e393cf4 | 2017-03-09 21:52:04 +0100 | [diff] [blame] | 158 | phys += PAGE_SIZE; |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 159 | } while (ptep++, addr += PAGE_SIZE, addr != end); |
Mark Rutland | f471044 | 2016-01-25 11:45:08 +0000 | [diff] [blame] | 160 | |
| 161 | pte_clear_fixmap(); |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 162 | } |
| 163 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 164 | static void alloc_init_cont_pte(pmd_t *pmdp, unsigned long addr, |
Ard Biesheuvel | d27cfa1 | 2017-03-09 21:52:09 +0100 | [diff] [blame] | 165 | unsigned long end, phys_addr_t phys, |
| 166 | pgprot_t prot, |
Yu Zhao | 90292ac | 2019-03-11 18:57:46 -0600 | [diff] [blame] | 167 | phys_addr_t (*pgtable_alloc)(int), |
Ard Biesheuvel | d27cfa1 | 2017-03-09 21:52:09 +0100 | [diff] [blame] | 168 | int flags) |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 169 | { |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 170 | unsigned long next; |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 171 | pmd_t pmd = READ_ONCE(*pmdp); |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 172 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 173 | BUG_ON(pmd_sect(pmd)); |
| 174 | if (pmd_none(pmd)) { |
Ard Biesheuvel | d27cfa1 | 2017-03-09 21:52:09 +0100 | [diff] [blame] | 175 | phys_addr_t pte_phys; |
Laura Abbott | 132233a | 2016-02-05 16:24:46 -0800 | [diff] [blame] | 176 | BUG_ON(!pgtable_alloc); |
Yu Zhao | 90292ac | 2019-03-11 18:57:46 -0600 | [diff] [blame] | 177 | pte_phys = pgtable_alloc(PAGE_SHIFT); |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 178 | __pmd_populate(pmdp, pte_phys, PMD_TYPE_TABLE); |
| 179 | pmd = READ_ONCE(*pmdp); |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 180 | } |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 181 | BUG_ON(pmd_bad(pmd)); |
Ard Biesheuvel | d27cfa1 | 2017-03-09 21:52:09 +0100 | [diff] [blame] | 182 | |
| 183 | do { |
| 184 | pgprot_t __prot = prot; |
| 185 | |
| 186 | next = pte_cont_addr_end(addr, end); |
| 187 | |
| 188 | /* use a contiguous mapping if the range is suitably aligned */ |
| 189 | if ((((addr | next | phys) & ~CONT_PTE_MASK) == 0) && |
| 190 | (flags & NO_CONT_MAPPINGS) == 0) |
| 191 | __prot = __pgprot(pgprot_val(prot) | PTE_CONT); |
| 192 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 193 | init_pte(pmdp, addr, next, phys, __prot); |
Ard Biesheuvel | d27cfa1 | 2017-03-09 21:52:09 +0100 | [diff] [blame] | 194 | |
| 195 | phys += next - addr; |
| 196 | } while (addr = next, addr != end); |
| 197 | } |
| 198 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 199 | static void init_pmd(pud_t *pudp, unsigned long addr, unsigned long end, |
Ard Biesheuvel | d27cfa1 | 2017-03-09 21:52:09 +0100 | [diff] [blame] | 200 | phys_addr_t phys, pgprot_t prot, |
Yu Zhao | 90292ac | 2019-03-11 18:57:46 -0600 | [diff] [blame] | 201 | phys_addr_t (*pgtable_alloc)(int), int flags) |
Ard Biesheuvel | d27cfa1 | 2017-03-09 21:52:09 +0100 | [diff] [blame] | 202 | { |
| 203 | unsigned long next; |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 204 | pmd_t *pmdp; |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 205 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 206 | pmdp = pmd_set_fixmap_offset(pudp, addr); |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 207 | do { |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 208 | pmd_t old_pmd = READ_ONCE(*pmdp); |
Ard Biesheuvel | e98216b | 2016-10-21 12:22:56 +0100 | [diff] [blame] | 209 | |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 210 | next = pmd_addr_end(addr, end); |
Ard Biesheuvel | e98216b | 2016-10-21 12:22:56 +0100 | [diff] [blame] | 211 | |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 212 | /* try section mapping first */ |
Laura Abbott | 83863f2 | 2016-02-05 16:24:47 -0800 | [diff] [blame] | 213 | if (((addr | next | phys) & ~SECTION_MASK) == 0 && |
Ard Biesheuvel | c095136 | 2017-03-09 21:52:07 +0100 | [diff] [blame] | 214 | (flags & NO_BLOCK_MAPPINGS) == 0) { |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 215 | pmd_set_huge(pmdp, phys, prot); |
Ard Biesheuvel | e98216b | 2016-10-21 12:22:56 +0100 | [diff] [blame] | 216 | |
Catalin Marinas | a55f992 | 2014-02-04 16:01:31 +0000 | [diff] [blame] | 217 | /* |
Ard Biesheuvel | e98216b | 2016-10-21 12:22:56 +0100 | [diff] [blame] | 218 | * After the PMD entry has been populated once, we |
| 219 | * only allow updates to the permission attributes. |
Catalin Marinas | a55f992 | 2014-02-04 16:01:31 +0000 | [diff] [blame] | 220 | */ |
Ard Biesheuvel | e98216b | 2016-10-21 12:22:56 +0100 | [diff] [blame] | 221 | BUG_ON(!pgattr_change_is_safe(pmd_val(old_pmd), |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 222 | READ_ONCE(pmd_val(*pmdp)))); |
Catalin Marinas | a55f992 | 2014-02-04 16:01:31 +0000 | [diff] [blame] | 223 | } else { |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 224 | alloc_init_cont_pte(pmdp, addr, next, phys, prot, |
Ard Biesheuvel | d27cfa1 | 2017-03-09 21:52:09 +0100 | [diff] [blame] | 225 | pgtable_alloc, flags); |
Ard Biesheuvel | e98216b | 2016-10-21 12:22:56 +0100 | [diff] [blame] | 226 | |
| 227 | BUG_ON(pmd_val(old_pmd) != 0 && |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 228 | pmd_val(old_pmd) != READ_ONCE(pmd_val(*pmdp))); |
Catalin Marinas | a55f992 | 2014-02-04 16:01:31 +0000 | [diff] [blame] | 229 | } |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 230 | phys += next - addr; |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 231 | } while (pmdp++, addr = next, addr != end); |
Mark Rutland | f471044 | 2016-01-25 11:45:08 +0000 | [diff] [blame] | 232 | |
| 233 | pmd_clear_fixmap(); |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 234 | } |
| 235 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 236 | static void alloc_init_cont_pmd(pud_t *pudp, unsigned long addr, |
Ard Biesheuvel | d27cfa1 | 2017-03-09 21:52:09 +0100 | [diff] [blame] | 237 | unsigned long end, phys_addr_t phys, |
| 238 | pgprot_t prot, |
Yu Zhao | 90292ac | 2019-03-11 18:57:46 -0600 | [diff] [blame] | 239 | phys_addr_t (*pgtable_alloc)(int), int flags) |
Ard Biesheuvel | d27cfa1 | 2017-03-09 21:52:09 +0100 | [diff] [blame] | 240 | { |
| 241 | unsigned long next; |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 242 | pud_t pud = READ_ONCE(*pudp); |
Ard Biesheuvel | d27cfa1 | 2017-03-09 21:52:09 +0100 | [diff] [blame] | 243 | |
| 244 | /* |
| 245 | * Check for initial section mappings in the pgd/pud. |
| 246 | */ |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 247 | BUG_ON(pud_sect(pud)); |
| 248 | if (pud_none(pud)) { |
Ard Biesheuvel | d27cfa1 | 2017-03-09 21:52:09 +0100 | [diff] [blame] | 249 | phys_addr_t pmd_phys; |
| 250 | BUG_ON(!pgtable_alloc); |
Yu Zhao | 90292ac | 2019-03-11 18:57:46 -0600 | [diff] [blame] | 251 | pmd_phys = pgtable_alloc(PMD_SHIFT); |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 252 | __pud_populate(pudp, pmd_phys, PUD_TYPE_TABLE); |
| 253 | pud = READ_ONCE(*pudp); |
Ard Biesheuvel | d27cfa1 | 2017-03-09 21:52:09 +0100 | [diff] [blame] | 254 | } |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 255 | BUG_ON(pud_bad(pud)); |
Ard Biesheuvel | d27cfa1 | 2017-03-09 21:52:09 +0100 | [diff] [blame] | 256 | |
| 257 | do { |
| 258 | pgprot_t __prot = prot; |
| 259 | |
| 260 | next = pmd_cont_addr_end(addr, end); |
| 261 | |
| 262 | /* use a contiguous mapping if the range is suitably aligned */ |
| 263 | if ((((addr | next | phys) & ~CONT_PMD_MASK) == 0) && |
| 264 | (flags & NO_CONT_MAPPINGS) == 0) |
| 265 | __prot = __pgprot(pgprot_val(prot) | PTE_CONT); |
| 266 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 267 | init_pmd(pudp, addr, next, phys, __prot, pgtable_alloc, flags); |
Ard Biesheuvel | d27cfa1 | 2017-03-09 21:52:09 +0100 | [diff] [blame] | 268 | |
| 269 | phys += next - addr; |
| 270 | } while (addr = next, addr != end); |
| 271 | } |
| 272 | |
Laura Abbott | da14170 | 2015-01-21 17:36:06 -0800 | [diff] [blame] | 273 | static inline bool use_1G_block(unsigned long addr, unsigned long next, |
| 274 | unsigned long phys) |
| 275 | { |
| 276 | if (PAGE_SHIFT != 12) |
| 277 | return false; |
| 278 | |
| 279 | if (((addr | next | phys) & ~PUD_MASK) != 0) |
| 280 | return false; |
| 281 | |
| 282 | return true; |
| 283 | } |
| 284 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 285 | static void alloc_init_pud(pgd_t *pgdp, unsigned long addr, unsigned long end, |
| 286 | phys_addr_t phys, pgprot_t prot, |
Yu Zhao | 90292ac | 2019-03-11 18:57:46 -0600 | [diff] [blame] | 287 | phys_addr_t (*pgtable_alloc)(int), |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 288 | int flags) |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 289 | { |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 290 | unsigned long next; |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 291 | pud_t *pudp; |
| 292 | pgd_t pgd = READ_ONCE(*pgdp); |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 293 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 294 | if (pgd_none(pgd)) { |
Laura Abbott | 132233a | 2016-02-05 16:24:46 -0800 | [diff] [blame] | 295 | phys_addr_t pud_phys; |
| 296 | BUG_ON(!pgtable_alloc); |
Yu Zhao | 90292ac | 2019-03-11 18:57:46 -0600 | [diff] [blame] | 297 | pud_phys = pgtable_alloc(PUD_SHIFT); |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 298 | __pgd_populate(pgdp, pud_phys, PUD_TYPE_TABLE); |
| 299 | pgd = READ_ONCE(*pgdp); |
Jungseok Lee | c79b954b | 2014-05-12 18:40:51 +0900 | [diff] [blame] | 300 | } |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 301 | BUG_ON(pgd_bad(pgd)); |
Jungseok Lee | c79b954b | 2014-05-12 18:40:51 +0900 | [diff] [blame] | 302 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 303 | pudp = pud_set_fixmap_offset(pgdp, addr); |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 304 | do { |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 305 | pud_t old_pud = READ_ONCE(*pudp); |
Ard Biesheuvel | e98216b | 2016-10-21 12:22:56 +0100 | [diff] [blame] | 306 | |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 307 | next = pud_addr_end(addr, end); |
Steve Capper | 206a2a7 | 2014-05-06 14:02:27 +0100 | [diff] [blame] | 308 | |
| 309 | /* |
| 310 | * For 4K granule only, attempt to put down a 1GB block |
| 311 | */ |
Ard Biesheuvel | c095136 | 2017-03-09 21:52:07 +0100 | [diff] [blame] | 312 | if (use_1G_block(addr, next, phys) && |
| 313 | (flags & NO_BLOCK_MAPPINGS) == 0) { |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 314 | pud_set_huge(pudp, phys, prot); |
Steve Capper | 206a2a7 | 2014-05-06 14:02:27 +0100 | [diff] [blame] | 315 | |
| 316 | /* |
Ard Biesheuvel | e98216b | 2016-10-21 12:22:56 +0100 | [diff] [blame] | 317 | * After the PUD entry has been populated once, we |
| 318 | * only allow updates to the permission attributes. |
Steve Capper | 206a2a7 | 2014-05-06 14:02:27 +0100 | [diff] [blame] | 319 | */ |
Ard Biesheuvel | e98216b | 2016-10-21 12:22:56 +0100 | [diff] [blame] | 320 | BUG_ON(!pgattr_change_is_safe(pud_val(old_pud), |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 321 | READ_ONCE(pud_val(*pudp)))); |
Steve Capper | 206a2a7 | 2014-05-06 14:02:27 +0100 | [diff] [blame] | 322 | } else { |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 323 | alloc_init_cont_pmd(pudp, addr, next, phys, prot, |
Ard Biesheuvel | d27cfa1 | 2017-03-09 21:52:09 +0100 | [diff] [blame] | 324 | pgtable_alloc, flags); |
Ard Biesheuvel | e98216b | 2016-10-21 12:22:56 +0100 | [diff] [blame] | 325 | |
| 326 | BUG_ON(pud_val(old_pud) != 0 && |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 327 | pud_val(old_pud) != READ_ONCE(pud_val(*pudp))); |
Steve Capper | 206a2a7 | 2014-05-06 14:02:27 +0100 | [diff] [blame] | 328 | } |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 329 | phys += next - addr; |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 330 | } while (pudp++, addr = next, addr != end); |
Mark Rutland | f471044 | 2016-01-25 11:45:08 +0000 | [diff] [blame] | 331 | |
| 332 | pud_clear_fixmap(); |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 333 | } |
| 334 | |
Ard Biesheuvel | 40f87d3 | 2016-06-29 14:51:30 +0200 | [diff] [blame] | 335 | static void __create_pgd_mapping(pgd_t *pgdir, phys_addr_t phys, |
| 336 | unsigned long virt, phys_addr_t size, |
| 337 | pgprot_t prot, |
Yu Zhao | 90292ac | 2019-03-11 18:57:46 -0600 | [diff] [blame] | 338 | phys_addr_t (*pgtable_alloc)(int), |
Ard Biesheuvel | c095136 | 2017-03-09 21:52:07 +0100 | [diff] [blame] | 339 | int flags) |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 340 | { |
Masahiro Yamada | 32d1870 | 2019-11-03 21:35:58 +0900 | [diff] [blame] | 341 | unsigned long addr, end, next; |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 342 | pgd_t *pgdp = pgd_offset_raw(pgdir, virt); |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 343 | |
Mark Rutland | cc5d2b3 | 2015-11-23 13:26:19 +0000 | [diff] [blame] | 344 | /* |
| 345 | * If the virtual and physical address don't have the same offset |
| 346 | * within a page, we cannot map the region as the caller expects. |
| 347 | */ |
| 348 | if (WARN_ON((phys ^ virt) & ~PAGE_MASK)) |
| 349 | return; |
| 350 | |
Mark Rutland | 9c4e08a | 2015-11-23 13:26:20 +0000 | [diff] [blame] | 351 | phys &= PAGE_MASK; |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 352 | addr = virt & PAGE_MASK; |
Masahiro Yamada | 32d1870 | 2019-11-03 21:35:58 +0900 | [diff] [blame] | 353 | end = PAGE_ALIGN(virt + size); |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 354 | |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 355 | do { |
| 356 | next = pgd_addr_end(addr, end); |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 357 | alloc_init_pud(pgdp, addr, next, phys, prot, pgtable_alloc, |
Ard Biesheuvel | c095136 | 2017-03-09 21:52:07 +0100 | [diff] [blame] | 358 | flags); |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 359 | phys += next - addr; |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 360 | } while (pgdp++, addr = next, addr != end); |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 361 | } |
| 362 | |
Will Deacon | 475ba3f | 2019-04-08 11:23:48 +0100 | [diff] [blame] | 363 | static phys_addr_t __pgd_pgtable_alloc(int shift) |
Yu Zhao | 369aaab | 2019-03-11 18:57:47 -0600 | [diff] [blame] | 364 | { |
Mike Rapoport | 50f11a8 | 2019-07-11 20:58:02 -0700 | [diff] [blame] | 365 | void *ptr = (void *)__get_free_page(GFP_PGTABLE_KERNEL); |
Yu Zhao | 369aaab | 2019-03-11 18:57:47 -0600 | [diff] [blame] | 366 | BUG_ON(!ptr); |
| 367 | |
| 368 | /* Ensure the zeroed page is visible to the page table walker */ |
| 369 | dsb(ishst); |
| 370 | return __pa(ptr); |
| 371 | } |
| 372 | |
Yu Zhao | 90292ac | 2019-03-11 18:57:46 -0600 | [diff] [blame] | 373 | static phys_addr_t pgd_pgtable_alloc(int shift) |
Laura Abbott | da14170 | 2015-01-21 17:36:06 -0800 | [diff] [blame] | 374 | { |
Will Deacon | 475ba3f | 2019-04-08 11:23:48 +0100 | [diff] [blame] | 375 | phys_addr_t pa = __pgd_pgtable_alloc(shift); |
Yu Zhao | 90292ac | 2019-03-11 18:57:46 -0600 | [diff] [blame] | 376 | |
| 377 | /* |
| 378 | * Call proper page table ctor in case later we need to |
| 379 | * call core mm functions like apply_to_page_range() on |
| 380 | * this pre-allocated page table. |
| 381 | * |
| 382 | * We don't select ARCH_ENABLE_SPLIT_PMD_PTLOCK if pmd is |
| 383 | * folded, and if so pgtable_pmd_page_ctor() becomes nop. |
| 384 | */ |
| 385 | if (shift == PAGE_SHIFT) |
Mark Rutland | b4ed71f | 2019-09-25 16:49:46 -0700 | [diff] [blame] | 386 | BUG_ON(!pgtable_pte_page_ctor(phys_to_page(pa))); |
Yu Zhao | 90292ac | 2019-03-11 18:57:46 -0600 | [diff] [blame] | 387 | else if (shift == PMD_SHIFT) |
Will Deacon | 475ba3f | 2019-04-08 11:23:48 +0100 | [diff] [blame] | 388 | BUG_ON(!pgtable_pmd_page_ctor(phys_to_page(pa))); |
Mark Rutland | 21ab99c | 2016-01-25 11:44:56 +0000 | [diff] [blame] | 389 | |
Will Deacon | 475ba3f | 2019-04-08 11:23:48 +0100 | [diff] [blame] | 390 | return pa; |
Laura Abbott | da14170 | 2015-01-21 17:36:06 -0800 | [diff] [blame] | 391 | } |
| 392 | |
Laura Abbott | 132233a | 2016-02-05 16:24:46 -0800 | [diff] [blame] | 393 | /* |
| 394 | * This function can only be used to modify existing table entries, |
| 395 | * without allocating new levels of table. Note that this permits the |
| 396 | * creation of new section or page entries. |
| 397 | */ |
| 398 | static void __init create_mapping_noalloc(phys_addr_t phys, unsigned long virt, |
Laura Abbott | da14170 | 2015-01-21 17:36:06 -0800 | [diff] [blame] | 399 | phys_addr_t size, pgprot_t prot) |
Mark Salter | d7ecbdd | 2014-03-12 12:28:06 -0400 | [diff] [blame] | 400 | { |
Mark Rutland | 77ad4ce | 2019-08-14 14:28:48 +0100 | [diff] [blame] | 401 | if ((virt >= PAGE_END) && (virt < VMALLOC_START)) { |
Mark Salter | d7ecbdd | 2014-03-12 12:28:06 -0400 | [diff] [blame] | 402 | pr_warn("BUG: not creating mapping for %pa at 0x%016lx - outside kernel range\n", |
| 403 | &phys, virt); |
| 404 | return; |
| 405 | } |
Ard Biesheuvel | d27cfa1 | 2017-03-09 21:52:09 +0100 | [diff] [blame] | 406 | __create_pgd_mapping(init_mm.pgd, phys, virt, size, prot, NULL, |
| 407 | NO_CONT_MAPPINGS); |
Mark Salter | d7ecbdd | 2014-03-12 12:28:06 -0400 | [diff] [blame] | 408 | } |
| 409 | |
Ard Biesheuvel | 8ce837c | 2014-10-20 15:42:07 +0200 | [diff] [blame] | 410 | void __init create_pgd_mapping(struct mm_struct *mm, phys_addr_t phys, |
| 411 | unsigned long virt, phys_addr_t size, |
Ard Biesheuvel | f14c66c | 2016-10-21 12:22:57 +0100 | [diff] [blame] | 412 | pgprot_t prot, bool page_mappings_only) |
Ard Biesheuvel | 8ce837c | 2014-10-20 15:42:07 +0200 | [diff] [blame] | 413 | { |
Ard Biesheuvel | c095136 | 2017-03-09 21:52:07 +0100 | [diff] [blame] | 414 | int flags = 0; |
| 415 | |
Ard Biesheuvel | 1378dc3 | 2016-07-22 19:32:25 +0200 | [diff] [blame] | 416 | BUG_ON(mm == &init_mm); |
| 417 | |
Ard Biesheuvel | c095136 | 2017-03-09 21:52:07 +0100 | [diff] [blame] | 418 | if (page_mappings_only) |
Ard Biesheuvel | d27cfa1 | 2017-03-09 21:52:09 +0100 | [diff] [blame] | 419 | flags = NO_BLOCK_MAPPINGS | NO_CONT_MAPPINGS; |
Ard Biesheuvel | c095136 | 2017-03-09 21:52:07 +0100 | [diff] [blame] | 420 | |
Mark Rutland | 11509a3 | 2016-01-25 11:45:10 +0000 | [diff] [blame] | 421 | __create_pgd_mapping(mm->pgd, phys, virt, size, prot, |
Ard Biesheuvel | c095136 | 2017-03-09 21:52:07 +0100 | [diff] [blame] | 422 | pgd_pgtable_alloc, flags); |
Mark Salter | d7ecbdd | 2014-03-12 12:28:06 -0400 | [diff] [blame] | 423 | } |
| 424 | |
Ard Biesheuvel | aa8c09b | 2017-03-09 21:52:00 +0100 | [diff] [blame] | 425 | static void update_mapping_prot(phys_addr_t phys, unsigned long virt, |
| 426 | phys_addr_t size, pgprot_t prot) |
Laura Abbott | da14170 | 2015-01-21 17:36:06 -0800 | [diff] [blame] | 427 | { |
Mark Rutland | 77ad4ce | 2019-08-14 14:28:48 +0100 | [diff] [blame] | 428 | if ((virt >= PAGE_END) && (virt < VMALLOC_START)) { |
Ard Biesheuvel | aa8c09b | 2017-03-09 21:52:00 +0100 | [diff] [blame] | 429 | pr_warn("BUG: not updating mapping for %pa at 0x%016lx - outside kernel range\n", |
Laura Abbott | da14170 | 2015-01-21 17:36:06 -0800 | [diff] [blame] | 430 | &phys, virt); |
| 431 | return; |
| 432 | } |
| 433 | |
Ard Biesheuvel | d27cfa1 | 2017-03-09 21:52:09 +0100 | [diff] [blame] | 434 | __create_pgd_mapping(init_mm.pgd, phys, virt, size, prot, NULL, |
| 435 | NO_CONT_MAPPINGS); |
Ard Biesheuvel | aa8c09b | 2017-03-09 21:52:00 +0100 | [diff] [blame] | 436 | |
| 437 | /* flush the TLBs after updating live kernel mappings */ |
| 438 | flush_tlb_kernel_range(virt, virt + size); |
Laura Abbott | da14170 | 2015-01-21 17:36:06 -0800 | [diff] [blame] | 439 | } |
| 440 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 441 | static void __init __map_memblock(pgd_t *pgdp, phys_addr_t start, |
Takahiro Akashi | 98d2e15 | 2017-04-03 11:24:34 +0900 | [diff] [blame] | 442 | phys_addr_t end, pgprot_t prot, int flags) |
Laura Abbott | da14170 | 2015-01-21 17:36:06 -0800 | [diff] [blame] | 443 | { |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 444 | __create_pgd_mapping(pgdp, start, __phys_to_virt(start), end - start, |
Takahiro Akashi | 98d2e15 | 2017-04-03 11:24:34 +0900 | [diff] [blame] | 445 | prot, early_pgtable_alloc, flags); |
Laura Abbott | da14170 | 2015-01-21 17:36:06 -0800 | [diff] [blame] | 446 | } |
Laura Abbott | da14170 | 2015-01-21 17:36:06 -0800 | [diff] [blame] | 447 | |
Ard Biesheuvel | 5ea5306 | 2017-03-09 21:52:01 +0100 | [diff] [blame] | 448 | void __init mark_linear_text_alias_ro(void) |
| 449 | { |
| 450 | /* |
| 451 | * Remove the write permissions from the linear alias of .text/.rodata |
| 452 | */ |
| 453 | update_mapping_prot(__pa_symbol(_text), (unsigned long)lm_alias(_text), |
| 454 | (unsigned long)__init_begin - (unsigned long)_text, |
| 455 | PAGE_KERNEL_RO); |
| 456 | } |
| 457 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 458 | static void __init map_mem(pgd_t *pgdp) |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 459 | { |
Takahiro Akashi | 98d2e15 | 2017-04-03 11:24:34 +0900 | [diff] [blame] | 460 | phys_addr_t kernel_start = __pa_symbol(_text); |
| 461 | phys_addr_t kernel_end = __pa_symbol(__init_begin); |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 462 | struct memblock_region *reg; |
Takahiro Akashi | 98d2e15 | 2017-04-03 11:24:34 +0900 | [diff] [blame] | 463 | int flags = 0; |
| 464 | |
Ard Biesheuvel | c55191e | 2018-11-07 11:36:20 +0100 | [diff] [blame] | 465 | if (rodata_full || debug_pagealloc_enabled()) |
Takahiro Akashi | 98d2e15 | 2017-04-03 11:24:34 +0900 | [diff] [blame] | 466 | flags = NO_BLOCK_MAPPINGS | NO_CONT_MAPPINGS; |
| 467 | |
| 468 | /* |
| 469 | * Take care not to create a writable alias for the |
| 470 | * read-only text and rodata sections of the kernel image. |
| 471 | * So temporarily mark them as NOMAP to skip mappings in |
| 472 | * the following for-loop |
| 473 | */ |
| 474 | memblock_mark_nomap(kernel_start, kernel_end - kernel_start); |
| 475 | #ifdef CONFIG_KEXEC_CORE |
| 476 | if (crashk_res.end) |
| 477 | memblock_mark_nomap(crashk_res.start, |
| 478 | resource_size(&crashk_res)); |
| 479 | #endif |
Steve Capper | f6bc87c | 2013-04-30 11:00:33 +0100 | [diff] [blame] | 480 | |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 481 | /* map all the memory banks */ |
| 482 | for_each_memblock(memory, reg) { |
| 483 | phys_addr_t start = reg->base; |
| 484 | phys_addr_t end = start + reg->size; |
| 485 | |
| 486 | if (start >= end) |
| 487 | break; |
Ard Biesheuvel | 68709f4 | 2015-11-30 13:28:16 +0100 | [diff] [blame] | 488 | if (memblock_is_nomap(reg)) |
| 489 | continue; |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 490 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 491 | __map_memblock(pgdp, start, end, PAGE_KERNEL, flags); |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 492 | } |
Takahiro Akashi | 98d2e15 | 2017-04-03 11:24:34 +0900 | [diff] [blame] | 493 | |
| 494 | /* |
| 495 | * Map the linear alias of the [_text, __init_begin) interval |
| 496 | * as non-executable now, and remove the write permission in |
| 497 | * mark_linear_text_alias_ro() below (which will be called after |
| 498 | * alternative patching has completed). This makes the contents |
| 499 | * of the region accessible to subsystems such as hibernate, |
| 500 | * but protects it from inadvertent modification or execution. |
| 501 | * Note that contiguous mappings cannot be remapped in this way, |
| 502 | * so we should avoid them here. |
| 503 | */ |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 504 | __map_memblock(pgdp, kernel_start, kernel_end, |
Takahiro Akashi | 98d2e15 | 2017-04-03 11:24:34 +0900 | [diff] [blame] | 505 | PAGE_KERNEL, NO_CONT_MAPPINGS); |
| 506 | memblock_clear_nomap(kernel_start, kernel_end - kernel_start); |
| 507 | |
| 508 | #ifdef CONFIG_KEXEC_CORE |
| 509 | /* |
| 510 | * Use page-level mappings here so that we can shrink the region |
| 511 | * in page granularity and put back unused memory to buddy system |
| 512 | * through /sys/kernel/kexec_crash_size interface. |
| 513 | */ |
| 514 | if (crashk_res.end) { |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 515 | __map_memblock(pgdp, crashk_res.start, crashk_res.end + 1, |
Takahiro Akashi | 98d2e15 | 2017-04-03 11:24:34 +0900 | [diff] [blame] | 516 | PAGE_KERNEL, |
| 517 | NO_BLOCK_MAPPINGS | NO_CONT_MAPPINGS); |
| 518 | memblock_clear_nomap(crashk_res.start, |
| 519 | resource_size(&crashk_res)); |
| 520 | } |
| 521 | #endif |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 522 | } |
| 523 | |
Laura Abbott | da14170 | 2015-01-21 17:36:06 -0800 | [diff] [blame] | 524 | void mark_rodata_ro(void) |
| 525 | { |
Jeremy Linton | 2f39b5f | 2016-02-19 11:50:32 -0600 | [diff] [blame] | 526 | unsigned long section_size; |
Ard Biesheuvel | f904077 | 2016-02-16 13:52:40 +0100 | [diff] [blame] | 527 | |
Jeremy Linton | 2f39b5f | 2016-02-19 11:50:32 -0600 | [diff] [blame] | 528 | /* |
Ard Biesheuvel | 9fdc14c5 | 2016-06-23 15:53:17 +0200 | [diff] [blame] | 529 | * mark .rodata as read only. Use __init_begin rather than __end_rodata |
| 530 | * to cover NOTES and EXCEPTION_TABLE. |
Jeremy Linton | 2f39b5f | 2016-02-19 11:50:32 -0600 | [diff] [blame] | 531 | */ |
Ard Biesheuvel | 9fdc14c5 | 2016-06-23 15:53:17 +0200 | [diff] [blame] | 532 | section_size = (unsigned long)__init_begin - (unsigned long)__start_rodata; |
Ard Biesheuvel | aa8c09b | 2017-03-09 21:52:00 +0100 | [diff] [blame] | 533 | update_mapping_prot(__pa_symbol(__start_rodata), (unsigned long)__start_rodata, |
Jeremy Linton | 2f39b5f | 2016-02-19 11:50:32 -0600 | [diff] [blame] | 534 | section_size, PAGE_KERNEL_RO); |
Ard Biesheuvel | e98216b | 2016-10-21 12:22:56 +0100 | [diff] [blame] | 535 | |
Laura Abbott | 1404d6f | 2016-10-27 09:27:34 -0700 | [diff] [blame] | 536 | debug_checkwx(); |
Laura Abbott | da14170 | 2015-01-21 17:36:06 -0800 | [diff] [blame] | 537 | } |
Laura Abbott | da14170 | 2015-01-21 17:36:06 -0800 | [diff] [blame] | 538 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 539 | static void __init map_kernel_segment(pgd_t *pgdp, void *va_start, void *va_end, |
Ard Biesheuvel | d27cfa1 | 2017-03-09 21:52:09 +0100 | [diff] [blame] | 540 | pgprot_t prot, struct vm_struct *vma, |
Will Deacon | 92bbd16 | 2017-07-24 11:46:09 +0100 | [diff] [blame] | 541 | int flags, unsigned long vm_flags) |
Mark Rutland | 068a17a | 2016-01-25 11:45:12 +0000 | [diff] [blame] | 542 | { |
Laura Abbott | 2077be6 | 2017-01-10 13:35:49 -0800 | [diff] [blame] | 543 | phys_addr_t pa_start = __pa_symbol(va_start); |
Mark Rutland | 068a17a | 2016-01-25 11:45:12 +0000 | [diff] [blame] | 544 | unsigned long size = va_end - va_start; |
| 545 | |
| 546 | BUG_ON(!PAGE_ALIGNED(pa_start)); |
| 547 | BUG_ON(!PAGE_ALIGNED(size)); |
| 548 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 549 | __create_pgd_mapping(pgdp, pa_start, (unsigned long)va_start, size, prot, |
Ard Biesheuvel | d27cfa1 | 2017-03-09 21:52:09 +0100 | [diff] [blame] | 550 | early_pgtable_alloc, flags); |
Ard Biesheuvel | f904077 | 2016-02-16 13:52:40 +0100 | [diff] [blame] | 551 | |
Will Deacon | 92bbd16 | 2017-07-24 11:46:09 +0100 | [diff] [blame] | 552 | if (!(vm_flags & VM_NO_GUARD)) |
| 553 | size += PAGE_SIZE; |
| 554 | |
Ard Biesheuvel | f904077 | 2016-02-16 13:52:40 +0100 | [diff] [blame] | 555 | vma->addr = va_start; |
| 556 | vma->phys_addr = pa_start; |
| 557 | vma->size = size; |
Will Deacon | 92bbd16 | 2017-07-24 11:46:09 +0100 | [diff] [blame] | 558 | vma->flags = VM_MAP | vm_flags; |
Ard Biesheuvel | f904077 | 2016-02-16 13:52:40 +0100 | [diff] [blame] | 559 | vma->caller = __builtin_return_address(0); |
| 560 | |
| 561 | vm_area_add_early(vma); |
Mark Rutland | 068a17a | 2016-01-25 11:45:12 +0000 | [diff] [blame] | 562 | } |
| 563 | |
Ard Biesheuvel | 28b066d | 2017-03-09 21:52:02 +0100 | [diff] [blame] | 564 | static int __init parse_rodata(char *arg) |
| 565 | { |
Ard Biesheuvel | c55191e | 2018-11-07 11:36:20 +0100 | [diff] [blame] | 566 | int ret = strtobool(arg, &rodata_enabled); |
| 567 | if (!ret) { |
| 568 | rodata_full = false; |
| 569 | return 0; |
| 570 | } |
| 571 | |
| 572 | /* permit 'full' in addition to boolean options */ |
| 573 | if (strcmp(arg, "full")) |
| 574 | return -EINVAL; |
| 575 | |
| 576 | rodata_enabled = true; |
| 577 | rodata_full = true; |
| 578 | return 0; |
Ard Biesheuvel | 28b066d | 2017-03-09 21:52:02 +0100 | [diff] [blame] | 579 | } |
| 580 | early_param("rodata", parse_rodata); |
| 581 | |
Will Deacon | 51a0048 | 2017-11-14 14:14:17 +0000 | [diff] [blame] | 582 | #ifdef CONFIG_UNMAP_KERNEL_AT_EL0 |
| 583 | static int __init map_entry_trampoline(void) |
| 584 | { |
Will Deacon | 51a0048 | 2017-11-14 14:14:17 +0000 | [diff] [blame] | 585 | pgprot_t prot = rodata_enabled ? PAGE_KERNEL_ROX : PAGE_KERNEL_EXEC; |
| 586 | phys_addr_t pa_start = __pa_symbol(__entry_tramp_text_start); |
| 587 | |
| 588 | /* The trampoline is always mapped and can therefore be global */ |
| 589 | pgprot_val(prot) &= ~PTE_NG; |
| 590 | |
| 591 | /* Map only the text into the trampoline page table */ |
| 592 | memset(tramp_pg_dir, 0, PGD_SIZE); |
| 593 | __create_pgd_mapping(tramp_pg_dir, pa_start, TRAMP_VALIAS, PAGE_SIZE, |
Will Deacon | 475ba3f | 2019-04-08 11:23:48 +0100 | [diff] [blame] | 594 | prot, __pgd_pgtable_alloc, 0); |
Will Deacon | 51a0048 | 2017-11-14 14:14:17 +0000 | [diff] [blame] | 595 | |
Will Deacon | 6c27c40 | 2017-12-06 11:24:02 +0000 | [diff] [blame] | 596 | /* Map both the text and data into the kernel page table */ |
Will Deacon | 51a0048 | 2017-11-14 14:14:17 +0000 | [diff] [blame] | 597 | __set_fixmap(FIX_ENTRY_TRAMP_TEXT, pa_start, prot); |
Will Deacon | 6c27c40 | 2017-12-06 11:24:02 +0000 | [diff] [blame] | 598 | if (IS_ENABLED(CONFIG_RANDOMIZE_BASE)) { |
| 599 | extern char __entry_tramp_data_start[]; |
| 600 | |
| 601 | __set_fixmap(FIX_ENTRY_TRAMP_DATA, |
| 602 | __pa_symbol(__entry_tramp_data_start), |
| 603 | PAGE_KERNEL_RO); |
| 604 | } |
| 605 | |
Will Deacon | 51a0048 | 2017-11-14 14:14:17 +0000 | [diff] [blame] | 606 | return 0; |
| 607 | } |
| 608 | core_initcall(map_entry_trampoline); |
| 609 | #endif |
| 610 | |
Mark Rutland | 068a17a | 2016-01-25 11:45:12 +0000 | [diff] [blame] | 611 | /* |
| 612 | * Create fine-grained mappings for the kernel. |
| 613 | */ |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 614 | static void __init map_kernel(pgd_t *pgdp) |
Mark Rutland | 068a17a | 2016-01-25 11:45:12 +0000 | [diff] [blame] | 615 | { |
Ard Biesheuvel | 2ebe088b | 2017-03-09 21:52:03 +0100 | [diff] [blame] | 616 | static struct vm_struct vmlinux_text, vmlinux_rodata, vmlinux_inittext, |
| 617 | vmlinux_initdata, vmlinux_data; |
Mark Rutland | 068a17a | 2016-01-25 11:45:12 +0000 | [diff] [blame] | 618 | |
Ard Biesheuvel | 28b066d | 2017-03-09 21:52:02 +0100 | [diff] [blame] | 619 | /* |
| 620 | * External debuggers may need to write directly to the text |
| 621 | * mapping to install SW breakpoints. Allow this (only) when |
| 622 | * explicitly requested with rodata=off. |
| 623 | */ |
| 624 | pgprot_t text_prot = rodata_enabled ? PAGE_KERNEL_ROX : PAGE_KERNEL_EXEC; |
| 625 | |
Ard Biesheuvel | d27cfa1 | 2017-03-09 21:52:09 +0100 | [diff] [blame] | 626 | /* |
| 627 | * Only rodata will be remapped with different permissions later on, |
| 628 | * all other segments are allowed to use contiguous mappings. |
| 629 | */ |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 630 | map_kernel_segment(pgdp, _text, _etext, text_prot, &vmlinux_text, 0, |
Will Deacon | 92bbd16 | 2017-07-24 11:46:09 +0100 | [diff] [blame] | 631 | VM_NO_GUARD); |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 632 | map_kernel_segment(pgdp, __start_rodata, __inittext_begin, PAGE_KERNEL, |
Will Deacon | 92bbd16 | 2017-07-24 11:46:09 +0100 | [diff] [blame] | 633 | &vmlinux_rodata, NO_CONT_MAPPINGS, VM_NO_GUARD); |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 634 | map_kernel_segment(pgdp, __inittext_begin, __inittext_end, text_prot, |
Will Deacon | 92bbd16 | 2017-07-24 11:46:09 +0100 | [diff] [blame] | 635 | &vmlinux_inittext, 0, VM_NO_GUARD); |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 636 | map_kernel_segment(pgdp, __initdata_begin, __initdata_end, PAGE_KERNEL, |
Will Deacon | 92bbd16 | 2017-07-24 11:46:09 +0100 | [diff] [blame] | 637 | &vmlinux_initdata, 0, VM_NO_GUARD); |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 638 | map_kernel_segment(pgdp, _data, _end, PAGE_KERNEL, &vmlinux_data, 0, 0); |
Mark Rutland | 068a17a | 2016-01-25 11:45:12 +0000 | [diff] [blame] | 639 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 640 | if (!READ_ONCE(pgd_val(*pgd_offset_raw(pgdp, FIXADDR_START)))) { |
Ard Biesheuvel | f904077 | 2016-02-16 13:52:40 +0100 | [diff] [blame] | 641 | /* |
| 642 | * The fixmap falls in a separate pgd to the kernel, and doesn't |
| 643 | * live in the carveout for the swapper_pg_dir. We can simply |
| 644 | * re-use the existing dir for the fixmap. |
| 645 | */ |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 646 | set_pgd(pgd_offset_raw(pgdp, FIXADDR_START), |
| 647 | READ_ONCE(*pgd_offset_k(FIXADDR_START))); |
Ard Biesheuvel | f904077 | 2016-02-16 13:52:40 +0100 | [diff] [blame] | 648 | } else if (CONFIG_PGTABLE_LEVELS > 3) { |
Mark Rutland | b333b0b | 2019-08-27 16:57:08 +0100 | [diff] [blame] | 649 | pgd_t *bm_pgdp; |
| 650 | pud_t *bm_pudp; |
Ard Biesheuvel | f904077 | 2016-02-16 13:52:40 +0100 | [diff] [blame] | 651 | /* |
| 652 | * The fixmap shares its top level pgd entry with the kernel |
| 653 | * mapping. This can really only occur when we are running |
| 654 | * with 16k/4 levels, so we can simply reuse the pud level |
| 655 | * entry instead. |
| 656 | */ |
| 657 | BUG_ON(!IS_ENABLED(CONFIG_ARM64_16K_PAGES)); |
Mark Rutland | b333b0b | 2019-08-27 16:57:08 +0100 | [diff] [blame] | 658 | bm_pgdp = pgd_offset_raw(pgdp, FIXADDR_START); |
| 659 | bm_pudp = pud_set_fixmap_offset(bm_pgdp, FIXADDR_START); |
| 660 | pud_populate(&init_mm, bm_pudp, lm_alias(bm_pmd)); |
Ard Biesheuvel | f904077 | 2016-02-16 13:52:40 +0100 | [diff] [blame] | 661 | pud_clear_fixmap(); |
| 662 | } else { |
| 663 | BUG(); |
| 664 | } |
Mark Rutland | 068a17a | 2016-01-25 11:45:12 +0000 | [diff] [blame] | 665 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 666 | kasan_copy_shadow(pgdp); |
Mark Rutland | 068a17a | 2016-01-25 11:45:12 +0000 | [diff] [blame] | 667 | } |
| 668 | |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 669 | void __init paging_init(void) |
| 670 | { |
Jun Yao | 2330b7c | 2018-09-24 17:15:02 +0100 | [diff] [blame] | 671 | pgd_t *pgdp = pgd_set_fixmap(__pa_symbol(swapper_pg_dir)); |
Mark Rutland | 068a17a | 2016-01-25 11:45:12 +0000 | [diff] [blame] | 672 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 673 | map_kernel(pgdp); |
| 674 | map_mem(pgdp); |
Mark Rutland | 068a17a | 2016-01-25 11:45:12 +0000 | [diff] [blame] | 675 | |
Mark Rutland | 068a17a | 2016-01-25 11:45:12 +0000 | [diff] [blame] | 676 | pgd_clear_fixmap(); |
Mark Rutland | 068a17a | 2016-01-25 11:45:12 +0000 | [diff] [blame] | 677 | |
Mark Rutland | 068a17a | 2016-01-25 11:45:12 +0000 | [diff] [blame] | 678 | cpu_replace_ttbr1(lm_alias(swapper_pg_dir)); |
Jun Yao | 2b5548b | 2018-09-24 15:47:49 +0100 | [diff] [blame] | 679 | init_mm.pgd = swapper_pg_dir; |
Mark Rutland | 068a17a | 2016-01-25 11:45:12 +0000 | [diff] [blame] | 680 | |
Jun Yao | 2b5548b | 2018-09-24 15:47:49 +0100 | [diff] [blame] | 681 | memblock_free(__pa_symbol(init_pg_dir), |
| 682 | __pa_symbol(init_pg_end) - __pa_symbol(init_pg_dir)); |
Ard Biesheuvel | 24cc61d | 2018-11-07 15:16:06 +0100 | [diff] [blame] | 683 | |
| 684 | memblock_allow_resize(); |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 685 | } |
| 686 | |
| 687 | /* |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 688 | * Check whether a kernel address is valid (derived from arch/x86/). |
| 689 | */ |
| 690 | int kern_addr_valid(unsigned long addr) |
| 691 | { |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 692 | pgd_t *pgdp; |
| 693 | pud_t *pudp, pud; |
| 694 | pmd_t *pmdp, pmd; |
| 695 | pte_t *ptep, pte; |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 696 | |
| 697 | if ((((long)addr) >> VA_BITS) != -1UL) |
| 698 | return 0; |
| 699 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 700 | pgdp = pgd_offset_k(addr); |
| 701 | if (pgd_none(READ_ONCE(*pgdp))) |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 702 | return 0; |
| 703 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 704 | pudp = pud_offset(pgdp, addr); |
| 705 | pud = READ_ONCE(*pudp); |
| 706 | if (pud_none(pud)) |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 707 | return 0; |
| 708 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 709 | if (pud_sect(pud)) |
| 710 | return pfn_valid(pud_pfn(pud)); |
Steve Capper | 206a2a7 | 2014-05-06 14:02:27 +0100 | [diff] [blame] | 711 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 712 | pmdp = pmd_offset(pudp, addr); |
| 713 | pmd = READ_ONCE(*pmdp); |
| 714 | if (pmd_none(pmd)) |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 715 | return 0; |
| 716 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 717 | if (pmd_sect(pmd)) |
| 718 | return pfn_valid(pmd_pfn(pmd)); |
Dave Anderson | da6e4cb | 2014-04-15 18:53:24 +0100 | [diff] [blame] | 719 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 720 | ptep = pte_offset_kernel(pmdp, addr); |
| 721 | pte = READ_ONCE(*ptep); |
| 722 | if (pte_none(pte)) |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 723 | return 0; |
| 724 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 725 | return pfn_valid(pte_pfn(pte)); |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 726 | } |
| 727 | #ifdef CONFIG_SPARSEMEM_VMEMMAP |
Suzuki K. Poulose | b433dce | 2015-10-19 14:19:28 +0100 | [diff] [blame] | 728 | #if !ARM64_SWAPPER_USES_SECTION_MAPS |
Christoph Hellwig | 7b73d97 | 2017-12-29 08:53:54 +0100 | [diff] [blame] | 729 | int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node, |
| 730 | struct vmem_altmap *altmap) |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 731 | { |
Johannes Weiner | 0aad818 | 2013-04-29 15:07:50 -0700 | [diff] [blame] | 732 | return vmemmap_populate_basepages(start, end, node); |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 733 | } |
Suzuki K. Poulose | b433dce | 2015-10-19 14:19:28 +0100 | [diff] [blame] | 734 | #else /* !ARM64_SWAPPER_USES_SECTION_MAPS */ |
Christoph Hellwig | 7b73d97 | 2017-12-29 08:53:54 +0100 | [diff] [blame] | 735 | int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node, |
| 736 | struct vmem_altmap *altmap) |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 737 | { |
Johannes Weiner | 0aad818 | 2013-04-29 15:07:50 -0700 | [diff] [blame] | 738 | unsigned long addr = start; |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 739 | unsigned long next; |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 740 | pgd_t *pgdp; |
| 741 | pud_t *pudp; |
| 742 | pmd_t *pmdp; |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 743 | |
| 744 | do { |
| 745 | next = pmd_addr_end(addr, end); |
| 746 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 747 | pgdp = vmemmap_pgd_populate(addr, node); |
| 748 | if (!pgdp) |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 749 | return -ENOMEM; |
| 750 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 751 | pudp = vmemmap_pud_populate(pgdp, addr, node); |
| 752 | if (!pudp) |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 753 | return -ENOMEM; |
| 754 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 755 | pmdp = pmd_offset(pudp, addr); |
| 756 | if (pmd_none(READ_ONCE(*pmdp))) { |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 757 | void *p = NULL; |
| 758 | |
| 759 | p = vmemmap_alloc_block_buf(PMD_SIZE, node); |
| 760 | if (!p) |
| 761 | return -ENOMEM; |
| 762 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 763 | pmd_set_huge(pmdp, __pa(p), __pgprot(PROT_SECT_NORMAL)); |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 764 | } else |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 765 | vmemmap_verify((pte_t *)pmdp, node, addr, next); |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 766 | } while (addr = next, addr != end); |
| 767 | |
| 768 | return 0; |
| 769 | } |
Odin Ugedal | 8e01076 | 2019-06-07 01:49:10 +0200 | [diff] [blame] | 770 | #endif /* !ARM64_SWAPPER_USES_SECTION_MAPS */ |
Christoph Hellwig | 24b6d41 | 2017-12-29 08:53:56 +0100 | [diff] [blame] | 771 | void vmemmap_free(unsigned long start, unsigned long end, |
| 772 | struct vmem_altmap *altmap) |
Tang Chen | 0197518 | 2013-02-22 16:33:08 -0800 | [diff] [blame] | 773 | { |
| 774 | } |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 775 | #endif /* CONFIG_SPARSEMEM_VMEMMAP */ |
Laura Abbott | af86e59 | 2014-11-21 21:50:42 +0000 | [diff] [blame] | 776 | |
Laura Abbott | af86e59 | 2014-11-21 21:50:42 +0000 | [diff] [blame] | 777 | static inline pud_t * fixmap_pud(unsigned long addr) |
| 778 | { |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 779 | pgd_t *pgdp = pgd_offset_k(addr); |
| 780 | pgd_t pgd = READ_ONCE(*pgdp); |
Laura Abbott | af86e59 | 2014-11-21 21:50:42 +0000 | [diff] [blame] | 781 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 782 | BUG_ON(pgd_none(pgd) || pgd_bad(pgd)); |
Laura Abbott | af86e59 | 2014-11-21 21:50:42 +0000 | [diff] [blame] | 783 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 784 | return pud_offset_kimg(pgdp, addr); |
Laura Abbott | af86e59 | 2014-11-21 21:50:42 +0000 | [diff] [blame] | 785 | } |
| 786 | |
| 787 | static inline pmd_t * fixmap_pmd(unsigned long addr) |
| 788 | { |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 789 | pud_t *pudp = fixmap_pud(addr); |
| 790 | pud_t pud = READ_ONCE(*pudp); |
Laura Abbott | af86e59 | 2014-11-21 21:50:42 +0000 | [diff] [blame] | 791 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 792 | BUG_ON(pud_none(pud) || pud_bad(pud)); |
Laura Abbott | af86e59 | 2014-11-21 21:50:42 +0000 | [diff] [blame] | 793 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 794 | return pmd_offset_kimg(pudp, addr); |
Laura Abbott | af86e59 | 2014-11-21 21:50:42 +0000 | [diff] [blame] | 795 | } |
| 796 | |
| 797 | static inline pte_t * fixmap_pte(unsigned long addr) |
| 798 | { |
Ard Biesheuvel | 157962f | 2016-02-16 13:52:38 +0100 | [diff] [blame] | 799 | return &bm_pte[pte_index(addr)]; |
Laura Abbott | af86e59 | 2014-11-21 21:50:42 +0000 | [diff] [blame] | 800 | } |
| 801 | |
Laura Abbott | 2077be6 | 2017-01-10 13:35:49 -0800 | [diff] [blame] | 802 | /* |
| 803 | * The p*d_populate functions call virt_to_phys implicitly so they can't be used |
| 804 | * directly on kernel symbols (bm_p*d). This function is called too early to use |
| 805 | * lm_alias so __p*d_populate functions must be used to populate with the |
| 806 | * physical address from __pa_symbol. |
| 807 | */ |
Laura Abbott | af86e59 | 2014-11-21 21:50:42 +0000 | [diff] [blame] | 808 | void __init early_fixmap_init(void) |
| 809 | { |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 810 | pgd_t *pgdp, pgd; |
| 811 | pud_t *pudp; |
| 812 | pmd_t *pmdp; |
Laura Abbott | af86e59 | 2014-11-21 21:50:42 +0000 | [diff] [blame] | 813 | unsigned long addr = FIXADDR_START; |
| 814 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 815 | pgdp = pgd_offset_k(addr); |
| 816 | pgd = READ_ONCE(*pgdp); |
Ard Biesheuvel | f80fb3a | 2016-01-26 14:12:01 +0100 | [diff] [blame] | 817 | if (CONFIG_PGTABLE_LEVELS > 3 && |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 818 | !(pgd_none(pgd) || pgd_page_paddr(pgd) == __pa_symbol(bm_pud))) { |
Ard Biesheuvel | f904077 | 2016-02-16 13:52:40 +0100 | [diff] [blame] | 819 | /* |
| 820 | * We only end up here if the kernel mapping and the fixmap |
| 821 | * share the top level pgd entry, which should only happen on |
| 822 | * 16k/4 levels configurations. |
| 823 | */ |
| 824 | BUG_ON(!IS_ENABLED(CONFIG_ARM64_16K_PAGES)); |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 825 | pudp = pud_offset_kimg(pgdp, addr); |
Ard Biesheuvel | f904077 | 2016-02-16 13:52:40 +0100 | [diff] [blame] | 826 | } else { |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 827 | if (pgd_none(pgd)) |
| 828 | __pgd_populate(pgdp, __pa_symbol(bm_pud), PUD_TYPE_TABLE); |
| 829 | pudp = fixmap_pud(addr); |
Ard Biesheuvel | f904077 | 2016-02-16 13:52:40 +0100 | [diff] [blame] | 830 | } |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 831 | if (pud_none(READ_ONCE(*pudp))) |
| 832 | __pud_populate(pudp, __pa_symbol(bm_pmd), PMD_TYPE_TABLE); |
| 833 | pmdp = fixmap_pmd(addr); |
| 834 | __pmd_populate(pmdp, __pa_symbol(bm_pte), PMD_TYPE_TABLE); |
Laura Abbott | af86e59 | 2014-11-21 21:50:42 +0000 | [diff] [blame] | 835 | |
| 836 | /* |
| 837 | * The boot-ioremap range spans multiple pmds, for which |
Ard Biesheuvel | 157962f | 2016-02-16 13:52:38 +0100 | [diff] [blame] | 838 | * we are not prepared: |
Laura Abbott | af86e59 | 2014-11-21 21:50:42 +0000 | [diff] [blame] | 839 | */ |
| 840 | BUILD_BUG_ON((__fix_to_virt(FIX_BTMAP_BEGIN) >> PMD_SHIFT) |
| 841 | != (__fix_to_virt(FIX_BTMAP_END) >> PMD_SHIFT)); |
| 842 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 843 | if ((pmdp != fixmap_pmd(fix_to_virt(FIX_BTMAP_BEGIN))) |
| 844 | || pmdp != fixmap_pmd(fix_to_virt(FIX_BTMAP_END))) { |
Laura Abbott | af86e59 | 2014-11-21 21:50:42 +0000 | [diff] [blame] | 845 | WARN_ON(1); |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 846 | pr_warn("pmdp %p != %p, %p\n", |
| 847 | pmdp, fixmap_pmd(fix_to_virt(FIX_BTMAP_BEGIN)), |
Laura Abbott | af86e59 | 2014-11-21 21:50:42 +0000 | [diff] [blame] | 848 | fixmap_pmd(fix_to_virt(FIX_BTMAP_END))); |
| 849 | pr_warn("fix_to_virt(FIX_BTMAP_BEGIN): %08lx\n", |
| 850 | fix_to_virt(FIX_BTMAP_BEGIN)); |
| 851 | pr_warn("fix_to_virt(FIX_BTMAP_END): %08lx\n", |
| 852 | fix_to_virt(FIX_BTMAP_END)); |
| 853 | |
| 854 | pr_warn("FIX_BTMAP_END: %d\n", FIX_BTMAP_END); |
| 855 | pr_warn("FIX_BTMAP_BEGIN: %d\n", FIX_BTMAP_BEGIN); |
| 856 | } |
| 857 | } |
| 858 | |
James Morse | 18b4b27 | 2017-11-06 18:44:26 +0000 | [diff] [blame] | 859 | /* |
| 860 | * Unusually, this is also called in IRQ context (ghes_iounmap_irq) so if we |
| 861 | * ever need to use IPIs for TLB broadcasting, then we're in trouble here. |
| 862 | */ |
Laura Abbott | af86e59 | 2014-11-21 21:50:42 +0000 | [diff] [blame] | 863 | void __set_fixmap(enum fixed_addresses idx, |
| 864 | phys_addr_t phys, pgprot_t flags) |
| 865 | { |
| 866 | unsigned long addr = __fix_to_virt(idx); |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 867 | pte_t *ptep; |
Laura Abbott | af86e59 | 2014-11-21 21:50:42 +0000 | [diff] [blame] | 868 | |
Mark Rutland | b63dbef | 2015-03-04 13:27:35 +0000 | [diff] [blame] | 869 | BUG_ON(idx <= FIX_HOLE || idx >= __end_of_fixed_addresses); |
Laura Abbott | af86e59 | 2014-11-21 21:50:42 +0000 | [diff] [blame] | 870 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 871 | ptep = fixmap_pte(addr); |
Laura Abbott | af86e59 | 2014-11-21 21:50:42 +0000 | [diff] [blame] | 872 | |
| 873 | if (pgprot_val(flags)) { |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 874 | set_pte(ptep, pfn_pte(phys >> PAGE_SHIFT, flags)); |
Laura Abbott | af86e59 | 2014-11-21 21:50:42 +0000 | [diff] [blame] | 875 | } else { |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 876 | pte_clear(&init_mm, addr, ptep); |
Laura Abbott | af86e59 | 2014-11-21 21:50:42 +0000 | [diff] [blame] | 877 | flush_tlb_kernel_range(addr, addr+PAGE_SIZE); |
| 878 | } |
| 879 | } |
Ard Biesheuvel | 61bd93c | 2015-06-01 13:40:32 +0200 | [diff] [blame] | 880 | |
Hsin-Yi Wang | e112b03 | 2019-08-23 14:24:50 +0800 | [diff] [blame] | 881 | void *__init fixmap_remap_fdt(phys_addr_t dt_phys, int *size, pgprot_t prot) |
Ard Biesheuvel | 61bd93c | 2015-06-01 13:40:32 +0200 | [diff] [blame] | 882 | { |
| 883 | const u64 dt_virt_base = __fix_to_virt(FIX_FDT); |
Ard Biesheuvel | f80fb3a | 2016-01-26 14:12:01 +0100 | [diff] [blame] | 884 | int offset; |
Ard Biesheuvel | 61bd93c | 2015-06-01 13:40:32 +0200 | [diff] [blame] | 885 | void *dt_virt; |
| 886 | |
| 887 | /* |
| 888 | * Check whether the physical FDT address is set and meets the minimum |
| 889 | * alignment requirement. Since we are relying on MIN_FDT_ALIGN to be |
Ard Biesheuvel | 04a8481 | 2016-08-01 13:29:31 +0200 | [diff] [blame] | 890 | * at least 8 bytes so that we can always access the magic and size |
| 891 | * fields of the FDT header after mapping the first chunk, double check |
| 892 | * here if that is indeed the case. |
Ard Biesheuvel | 61bd93c | 2015-06-01 13:40:32 +0200 | [diff] [blame] | 893 | */ |
| 894 | BUILD_BUG_ON(MIN_FDT_ALIGN < 8); |
| 895 | if (!dt_phys || dt_phys % MIN_FDT_ALIGN) |
| 896 | return NULL; |
| 897 | |
| 898 | /* |
| 899 | * Make sure that the FDT region can be mapped without the need to |
| 900 | * allocate additional translation table pages, so that it is safe |
Laura Abbott | 132233a | 2016-02-05 16:24:46 -0800 | [diff] [blame] | 901 | * to call create_mapping_noalloc() this early. |
Ard Biesheuvel | 61bd93c | 2015-06-01 13:40:32 +0200 | [diff] [blame] | 902 | * |
| 903 | * On 64k pages, the FDT will be mapped using PTEs, so we need to |
| 904 | * be in the same PMD as the rest of the fixmap. |
| 905 | * On 4k pages, we'll use section mappings for the FDT so we only |
| 906 | * have to be in the same PUD. |
| 907 | */ |
| 908 | BUILD_BUG_ON(dt_virt_base % SZ_2M); |
| 909 | |
Suzuki K. Poulose | b433dce | 2015-10-19 14:19:28 +0100 | [diff] [blame] | 910 | BUILD_BUG_ON(__fix_to_virt(FIX_FDT_END) >> SWAPPER_TABLE_SHIFT != |
| 911 | __fix_to_virt(FIX_BTMAP_BEGIN) >> SWAPPER_TABLE_SHIFT); |
Ard Biesheuvel | 61bd93c | 2015-06-01 13:40:32 +0200 | [diff] [blame] | 912 | |
Suzuki K. Poulose | b433dce | 2015-10-19 14:19:28 +0100 | [diff] [blame] | 913 | offset = dt_phys % SWAPPER_BLOCK_SIZE; |
Ard Biesheuvel | 61bd93c | 2015-06-01 13:40:32 +0200 | [diff] [blame] | 914 | dt_virt = (void *)dt_virt_base + offset; |
| 915 | |
| 916 | /* map the first chunk so we can read the size from the header */ |
Laura Abbott | 132233a | 2016-02-05 16:24:46 -0800 | [diff] [blame] | 917 | create_mapping_noalloc(round_down(dt_phys, SWAPPER_BLOCK_SIZE), |
| 918 | dt_virt_base, SWAPPER_BLOCK_SIZE, prot); |
Ard Biesheuvel | 61bd93c | 2015-06-01 13:40:32 +0200 | [diff] [blame] | 919 | |
Ard Biesheuvel | 04a8481 | 2016-08-01 13:29:31 +0200 | [diff] [blame] | 920 | if (fdt_magic(dt_virt) != FDT_MAGIC) |
Ard Biesheuvel | 61bd93c | 2015-06-01 13:40:32 +0200 | [diff] [blame] | 921 | return NULL; |
| 922 | |
Ard Biesheuvel | f80fb3a | 2016-01-26 14:12:01 +0100 | [diff] [blame] | 923 | *size = fdt_totalsize(dt_virt); |
| 924 | if (*size > MAX_FDT_SIZE) |
Ard Biesheuvel | 61bd93c | 2015-06-01 13:40:32 +0200 | [diff] [blame] | 925 | return NULL; |
| 926 | |
Ard Biesheuvel | f80fb3a | 2016-01-26 14:12:01 +0100 | [diff] [blame] | 927 | if (offset + *size > SWAPPER_BLOCK_SIZE) |
Laura Abbott | 132233a | 2016-02-05 16:24:46 -0800 | [diff] [blame] | 928 | create_mapping_noalloc(round_down(dt_phys, SWAPPER_BLOCK_SIZE), dt_virt_base, |
Ard Biesheuvel | f80fb3a | 2016-01-26 14:12:01 +0100 | [diff] [blame] | 929 | round_up(offset + *size, SWAPPER_BLOCK_SIZE), prot); |
| 930 | |
| 931 | return dt_virt; |
| 932 | } |
| 933 | |
Anshuman Khandual | 0f472d0 | 2019-07-16 16:27:33 -0700 | [diff] [blame] | 934 | int __init arch_ioremap_p4d_supported(void) |
| 935 | { |
| 936 | return 0; |
| 937 | } |
| 938 | |
Ard Biesheuvel | 324420b | 2016-02-16 13:52:35 +0100 | [diff] [blame] | 939 | int __init arch_ioremap_pud_supported(void) |
| 940 | { |
Mark Rutland | 7ba36ec | 2019-05-14 14:30:06 +0530 | [diff] [blame] | 941 | /* |
| 942 | * Only 4k granule supports level 1 block mappings. |
| 943 | * SW table walks can't handle removal of intermediate entries. |
| 944 | */ |
| 945 | return IS_ENABLED(CONFIG_ARM64_4K_PAGES) && |
| 946 | !IS_ENABLED(CONFIG_ARM64_PTDUMP_DEBUGFS); |
Ard Biesheuvel | 324420b | 2016-02-16 13:52:35 +0100 | [diff] [blame] | 947 | } |
| 948 | |
| 949 | int __init arch_ioremap_pmd_supported(void) |
| 950 | { |
Mark Rutland | 7ba36ec | 2019-05-14 14:30:06 +0530 | [diff] [blame] | 951 | /* See arch_ioremap_pud_supported() */ |
| 952 | return !IS_ENABLED(CONFIG_ARM64_PTDUMP_DEBUGFS); |
Ard Biesheuvel | 324420b | 2016-02-16 13:52:35 +0100 | [diff] [blame] | 953 | } |
| 954 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 955 | int pud_set_huge(pud_t *pudp, phys_addr_t phys, pgprot_t prot) |
Ard Biesheuvel | 324420b | 2016-02-16 13:52:35 +0100 | [diff] [blame] | 956 | { |
Anshuman Khandual | f7f0097 | 2019-05-27 09:28:15 +0530 | [diff] [blame] | 957 | pud_t new_pud = pfn_pud(__phys_to_pfn(phys), mk_pud_sect_prot(prot)); |
Will Deacon | 15122ee | 2018-02-21 12:59:27 +0000 | [diff] [blame] | 958 | |
Laura Abbott | 82034c2 | 2018-05-23 11:43:46 -0700 | [diff] [blame] | 959 | /* Only allow permission changes for now */ |
| 960 | if (!pgattr_change_is_safe(READ_ONCE(pud_val(*pudp)), |
| 961 | pud_val(new_pud))) |
Will Deacon | 15122ee | 2018-02-21 12:59:27 +0000 | [diff] [blame] | 962 | return 0; |
| 963 | |
Anshuman Khandual | 87dedf7 | 2019-05-27 12:33:29 +0530 | [diff] [blame] | 964 | VM_BUG_ON(phys & ~PUD_MASK); |
Laura Abbott | 82034c2 | 2018-05-23 11:43:46 -0700 | [diff] [blame] | 965 | set_pud(pudp, new_pud); |
Ard Biesheuvel | 324420b | 2016-02-16 13:52:35 +0100 | [diff] [blame] | 966 | return 1; |
| 967 | } |
| 968 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 969 | int pmd_set_huge(pmd_t *pmdp, phys_addr_t phys, pgprot_t prot) |
Ard Biesheuvel | 324420b | 2016-02-16 13:52:35 +0100 | [diff] [blame] | 970 | { |
Anshuman Khandual | f7f0097 | 2019-05-27 09:28:15 +0530 | [diff] [blame] | 971 | pmd_t new_pmd = pfn_pmd(__phys_to_pfn(phys), mk_pmd_sect_prot(prot)); |
Will Deacon | 15122ee | 2018-02-21 12:59:27 +0000 | [diff] [blame] | 972 | |
Laura Abbott | 82034c2 | 2018-05-23 11:43:46 -0700 | [diff] [blame] | 973 | /* Only allow permission changes for now */ |
| 974 | if (!pgattr_change_is_safe(READ_ONCE(pmd_val(*pmdp)), |
| 975 | pmd_val(new_pmd))) |
Will Deacon | 15122ee | 2018-02-21 12:59:27 +0000 | [diff] [blame] | 976 | return 0; |
| 977 | |
Anshuman Khandual | 87dedf7 | 2019-05-27 12:33:29 +0530 | [diff] [blame] | 978 | VM_BUG_ON(phys & ~PMD_MASK); |
Laura Abbott | 82034c2 | 2018-05-23 11:43:46 -0700 | [diff] [blame] | 979 | set_pmd(pmdp, new_pmd); |
Ard Biesheuvel | 324420b | 2016-02-16 13:52:35 +0100 | [diff] [blame] | 980 | return 1; |
| 981 | } |
| 982 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 983 | int pud_clear_huge(pud_t *pudp) |
Ard Biesheuvel | 324420b | 2016-02-16 13:52:35 +0100 | [diff] [blame] | 984 | { |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 985 | if (!pud_sect(READ_ONCE(*pudp))) |
Ard Biesheuvel | 324420b | 2016-02-16 13:52:35 +0100 | [diff] [blame] | 986 | return 0; |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 987 | pud_clear(pudp); |
Ard Biesheuvel | 324420b | 2016-02-16 13:52:35 +0100 | [diff] [blame] | 988 | return 1; |
| 989 | } |
| 990 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 991 | int pmd_clear_huge(pmd_t *pmdp) |
Ard Biesheuvel | 324420b | 2016-02-16 13:52:35 +0100 | [diff] [blame] | 992 | { |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 993 | if (!pmd_sect(READ_ONCE(*pmdp))) |
Ard Biesheuvel | 324420b | 2016-02-16 13:52:35 +0100 | [diff] [blame] | 994 | return 0; |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 995 | pmd_clear(pmdp); |
Ard Biesheuvel | 324420b | 2016-02-16 13:52:35 +0100 | [diff] [blame] | 996 | return 1; |
| 997 | } |
Toshi Kani | b6bdb75 | 2018-03-22 16:17:20 -0700 | [diff] [blame] | 998 | |
Chintan Pandya | ec28bb9 | 2018-06-06 12:31:21 +0530 | [diff] [blame] | 999 | int pmd_free_pte_page(pmd_t *pmdp, unsigned long addr) |
Toshi Kani | b6bdb75 | 2018-03-22 16:17:20 -0700 | [diff] [blame] | 1000 | { |
Chintan Pandya | ec28bb9 | 2018-06-06 12:31:21 +0530 | [diff] [blame] | 1001 | pte_t *table; |
| 1002 | pmd_t pmd; |
| 1003 | |
| 1004 | pmd = READ_ONCE(*pmdp); |
| 1005 | |
Mark Rutland | fac880c | 2018-09-05 17:38:57 +0100 | [diff] [blame] | 1006 | if (!pmd_table(pmd)) { |
Will Deacon | 9c00697 | 2018-12-28 00:37:42 -0800 | [diff] [blame] | 1007 | VM_WARN_ON(1); |
Chintan Pandya | ec28bb9 | 2018-06-06 12:31:21 +0530 | [diff] [blame] | 1008 | return 1; |
| 1009 | } |
| 1010 | |
| 1011 | table = pte_offset_kernel(pmdp, addr); |
| 1012 | pmd_clear(pmdp); |
| 1013 | __flush_tlb_kernel_pgtable(addr); |
| 1014 | pte_free_kernel(NULL, table); |
| 1015 | return 1; |
Toshi Kani | b6bdb75 | 2018-03-22 16:17:20 -0700 | [diff] [blame] | 1016 | } |
| 1017 | |
Chintan Pandya | ec28bb9 | 2018-06-06 12:31:21 +0530 | [diff] [blame] | 1018 | int pud_free_pmd_page(pud_t *pudp, unsigned long addr) |
Toshi Kani | b6bdb75 | 2018-03-22 16:17:20 -0700 | [diff] [blame] | 1019 | { |
Chintan Pandya | ec28bb9 | 2018-06-06 12:31:21 +0530 | [diff] [blame] | 1020 | pmd_t *table; |
| 1021 | pmd_t *pmdp; |
| 1022 | pud_t pud; |
| 1023 | unsigned long next, end; |
| 1024 | |
| 1025 | pud = READ_ONCE(*pudp); |
| 1026 | |
Mark Rutland | fac880c | 2018-09-05 17:38:57 +0100 | [diff] [blame] | 1027 | if (!pud_table(pud)) { |
Will Deacon | 9c00697 | 2018-12-28 00:37:42 -0800 | [diff] [blame] | 1028 | VM_WARN_ON(1); |
Chintan Pandya | ec28bb9 | 2018-06-06 12:31:21 +0530 | [diff] [blame] | 1029 | return 1; |
| 1030 | } |
| 1031 | |
| 1032 | table = pmd_offset(pudp, addr); |
| 1033 | pmdp = table; |
| 1034 | next = addr; |
| 1035 | end = addr + PUD_SIZE; |
| 1036 | do { |
| 1037 | pmd_free_pte_page(pmdp, next); |
| 1038 | } while (pmdp++, next += PMD_SIZE, next != end); |
| 1039 | |
| 1040 | pud_clear(pudp); |
| 1041 | __flush_tlb_kernel_pgtable(addr); |
| 1042 | pmd_free(NULL, table); |
| 1043 | return 1; |
Toshi Kani | b6bdb75 | 2018-03-22 16:17:20 -0700 | [diff] [blame] | 1044 | } |
Robin Murphy | 4ab2150 | 2018-12-11 18:48:48 +0000 | [diff] [blame] | 1045 | |
Will Deacon | 8e2d434 | 2018-12-28 00:37:53 -0800 | [diff] [blame] | 1046 | int p4d_free_pud_page(p4d_t *p4d, unsigned long addr) |
| 1047 | { |
| 1048 | return 0; /* Don't attempt a block mapping */ |
| 1049 | } |
| 1050 | |
Robin Murphy | 4ab2150 | 2018-12-11 18:48:48 +0000 | [diff] [blame] | 1051 | #ifdef CONFIG_MEMORY_HOTPLUG |
Michal Hocko | 940519f | 2019-05-13 17:21:26 -0700 | [diff] [blame] | 1052 | int arch_add_memory(int nid, u64 start, u64 size, |
| 1053 | struct mhp_restrictions *restrictions) |
Robin Murphy | 4ab2150 | 2018-12-11 18:48:48 +0000 | [diff] [blame] | 1054 | { |
| 1055 | int flags = 0; |
| 1056 | |
| 1057 | if (rodata_full || debug_pagealloc_enabled()) |
| 1058 | flags = NO_BLOCK_MAPPINGS | NO_CONT_MAPPINGS; |
| 1059 | |
| 1060 | __create_pgd_mapping(swapper_pg_dir, start, __phys_to_virt(start), |
Will Deacon | 475ba3f | 2019-04-08 11:23:48 +0100 | [diff] [blame] | 1061 | size, PAGE_KERNEL, __pgd_pgtable_alloc, flags); |
Robin Murphy | 4ab2150 | 2018-12-11 18:48:48 +0000 | [diff] [blame] | 1062 | |
Dan Williams | 16993c0 | 2019-11-06 17:43:21 -0800 | [diff] [blame] | 1063 | memblock_clear_nomap(start, size); |
| 1064 | |
Robin Murphy | 4ab2150 | 2018-12-11 18:48:48 +0000 | [diff] [blame] | 1065 | return __add_pages(nid, start >> PAGE_SHIFT, size >> PAGE_SHIFT, |
Michal Hocko | 940519f | 2019-05-13 17:21:26 -0700 | [diff] [blame] | 1066 | restrictions); |
Robin Murphy | 4ab2150 | 2018-12-11 18:48:48 +0000 | [diff] [blame] | 1067 | } |
David Hildenbrand | 22eb634 | 2019-07-18 15:56:41 -0700 | [diff] [blame] | 1068 | void arch_remove_memory(int nid, u64 start, u64 size, |
| 1069 | struct vmem_altmap *altmap) |
| 1070 | { |
| 1071 | unsigned long start_pfn = start >> PAGE_SHIFT; |
| 1072 | unsigned long nr_pages = size >> PAGE_SHIFT; |
David Hildenbrand | 22eb634 | 2019-07-18 15:56:41 -0700 | [diff] [blame] | 1073 | |
| 1074 | /* |
| 1075 | * FIXME: Cleanup page tables (also in arch_add_memory() in case |
| 1076 | * adding fails). Until then, this function should only be used |
| 1077 | * during memory hotplug (adding memory), not for memory |
| 1078 | * unplug. ARCH_ENABLE_MEMORY_HOTREMOVE must not be |
| 1079 | * unlocked yet. |
| 1080 | */ |
David Hildenbrand | feee6b2 | 2020-01-04 12:59:33 -0800 | [diff] [blame] | 1081 | __remove_pages(start_pfn, nr_pages, altmap); |
David Hildenbrand | 22eb634 | 2019-07-18 15:56:41 -0700 | [diff] [blame] | 1082 | } |
| 1083 | #endif |