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review.shift-gmbh.com / SHIFTPHONES / kernel / common / 53521d8c90d366191b6c134f88a8ebe83de60614 / . / drivers / ssb / embedded.c
blob: d3ade821555c671f63420f3424d5ff388db11646 [file] [log] [blame]
Michael Buesch42bfad42008-02-19 12:41:30 +0100[diff] [blame]1/*
2 * Sonics Silicon Backplane
3 * Embedded systems support code
4 *
5 * Copyright 2005-2008, Broadcom Corporation
6 * Copyright 2006-2008, Michael Buesch <mb@bu3sch.de>
7 *
8 * Licensed under the GNU/GPL. See COPYING for details.
9 */
10
11#include <linux/ssb/ssb.h>
12#include <linux/ssb/ssb_embedded.h>
13
Michael Buesch53521d82008-02-19 16:22:50 +0100[diff] [blame^]14#include "ssb_private.h"
15
Michael Buesch42bfad42008-02-19 12:41:30 +0100[diff] [blame]16
17int ssb_watchdog_timer_set(struct ssb_bus *bus, u32 ticks)
18{
19 if (ssb_chipco_available(&bus->chipco)) {
20 ssb_chipco_watchdog_timer_set(&bus->chipco, ticks);
21 return 0;
22 }
23 if (ssb_extif_available(&bus->extif)) {
24 ssb_extif_watchdog_timer_set(&bus->extif, ticks);
25 return 0;
26 }
27 return -ENODEV;
28}
Michael Buesch53521d82008-02-19 16:22:50 +0100[diff] [blame^]29
30u32 ssb_gpio_in(struct ssb_bus *bus, u32 mask)
31{
32 unsigned long flags;
33 u32 res = 0;
34
35 spin_lock_irqsave(&bus->gpio_lock, flags);
36 if (ssb_chipco_available(&bus->chipco))
37 res = ssb_chipco_gpio_in(&bus->chipco, mask);
38 else if (ssb_extif_available(&bus->extif))
39 res = ssb_extif_gpio_in(&bus->extif, mask);
40 else
41 SSB_WARN_ON(1);
42 spin_unlock_irqrestore(&bus->gpio_lock, flags);
43
44 return res;
45}
46EXPORT_SYMBOL(ssb_gpio_in);
47
48u32 ssb_gpio_out(struct ssb_bus *bus, u32 mask, u32 value)
49{
50 unsigned long flags;
51 u32 res = 0;
52
53 spin_lock_irqsave(&bus->gpio_lock, flags);
54 if (ssb_chipco_available(&bus->chipco))
55 res = ssb_chipco_gpio_out(&bus->chipco, mask, value);
56 else if (ssb_extif_available(&bus->extif))
57 res = ssb_extif_gpio_out(&bus->extif, mask, value);
58 else
59 SSB_WARN_ON(1);
60 spin_unlock_irqrestore(&bus->gpio_lock, flags);
61
62 return res;
63}
64EXPORT_SYMBOL(ssb_gpio_out);
65
66u32 ssb_gpio_outen(struct ssb_bus *bus, u32 mask, u32 value)
67{
68 unsigned long flags;
69 u32 res = 0;
70
71 spin_lock_irqsave(&bus->gpio_lock, flags);
72 if (ssb_chipco_available(&bus->chipco))
73 res = ssb_chipco_gpio_outen(&bus->chipco, mask, value);
74 else if (ssb_extif_available(&bus->extif))
75 res = ssb_extif_gpio_outen(&bus->extif, mask, value);
76 else
77 SSB_WARN_ON(1);
78 spin_unlock_irqrestore(&bus->gpio_lock, flags);
79
80 return res;
81}
82EXPORT_SYMBOL(ssb_gpio_outen);
83
84u32 ssb_gpio_control(struct ssb_bus *bus, u32 mask, u32 value)
85{
86 unsigned long flags;
87 u32 res = 0;
88
89 spin_lock_irqsave(&bus->gpio_lock, flags);
90 if (ssb_chipco_available(&bus->chipco))
91 res = ssb_chipco_gpio_control(&bus->chipco, mask, value);
92 spin_unlock_irqrestore(&bus->gpio_lock, flags);
93
94 return res;
95}
96EXPORT_SYMBOL(ssb_gpio_control);
97
98u32 ssb_gpio_intmask(struct ssb_bus *bus, u32 mask, u32 value)
99{
100 unsigned long flags;
101 u32 res = 0;
102
103 spin_lock_irqsave(&bus->gpio_lock, flags);
104 if (ssb_chipco_available(&bus->chipco))
105 res = ssb_chipco_gpio_intmask(&bus->chipco, mask, value);
106 else if (ssb_extif_available(&bus->extif))
107 res = ssb_extif_gpio_intmask(&bus->extif, mask, value);
108 else
109 SSB_WARN_ON(1);
110 spin_unlock_irqrestore(&bus->gpio_lock, flags);
111
112 return res;
113}
114EXPORT_SYMBOL(ssb_gpio_intmask);
115
116u32 ssb_gpio_polarity(struct ssb_bus *bus, u32 mask, u32 value)
117{
118 unsigned long flags;
119 u32 res = 0;
120
121 spin_lock_irqsave(&bus->gpio_lock, flags);
122 if (ssb_chipco_available(&bus->chipco))
123 res = ssb_chipco_gpio_polarity(&bus->chipco, mask, value);
124 else if (ssb_extif_available(&bus->extif))
125 res = ssb_extif_gpio_polarity(&bus->extif, mask, value);
126 else
127 SSB_WARN_ON(1);
128 spin_unlock_irqrestore(&bus->gpio_lock, flags);
129
130 return res;
131}
132EXPORT_SYMBOL(ssb_gpio_polarity);