blob: 709a8d061be30a838090f3ed42386d6987575ade [file] [log] [blame]
Daniel Thompsonc6a97c42015-10-12 09:21:29 +01001/*
2 * Copyright (c) 2015, Daniel Thompson
3 *
4 * This file is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version 2
7 * of the License, or (at your option) any later version.
8 *
9 * This file is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 */
14
15#include <linux/clk.h>
16#include <linux/delay.h>
17#include <linux/hw_random.h>
18#include <linux/io.h>
19#include <linux/kernel.h>
20#include <linux/module.h>
21#include <linux/of_address.h>
22#include <linux/of_platform.h>
23#include <linux/pm_runtime.h>
lionel.debieve@st.com326ed382018-02-15 14:03:08 +010024#include <linux/reset.h>
Daniel Thompsonc6a97c42015-10-12 09:21:29 +010025#include <linux/slab.h>
26
27#define RNG_CR 0x00
28#define RNG_CR_RNGEN BIT(2)
lionel.debieve@st.com529571e2018-02-15 14:03:10 +010029#define RNG_CR_CED BIT(5)
Daniel Thompsonc6a97c42015-10-12 09:21:29 +010030
31#define RNG_SR 0x04
32#define RNG_SR_SEIS BIT(6)
33#define RNG_SR_CEIS BIT(5)
34#define RNG_SR_DRDY BIT(0)
35
36#define RNG_DR 0x08
37
38/*
39 * It takes 40 cycles @ 48MHz to generate each random number (e.g. <1us).
40 * At the time of writing STM32 parts max out at ~200MHz meaning a timeout
41 * of 500 leaves us a very comfortable margin for error. The loop to which
42 * the timeout applies takes at least 4 instructions per iteration so the
43 * timeout is enough to take us up to multi-GHz parts!
44 */
45#define RNG_TIMEOUT 500
46
47struct stm32_rng_private {
48 struct hwrng rng;
49 void __iomem *base;
50 struct clk *clk;
lionel.debieve@st.com326ed382018-02-15 14:03:08 +010051 struct reset_control *rst;
lionel.debieve@st.com529571e2018-02-15 14:03:10 +010052 bool ced;
Daniel Thompsonc6a97c42015-10-12 09:21:29 +010053};
54
55static int stm32_rng_read(struct hwrng *rng, void *data, size_t max, bool wait)
56{
57 struct stm32_rng_private *priv =
58 container_of(rng, struct stm32_rng_private, rng);
59 u32 sr;
60 int retval = 0;
61
62 pm_runtime_get_sync((struct device *) priv->rng.priv);
63
64 while (max > sizeof(u32)) {
65 sr = readl_relaxed(priv->base + RNG_SR);
66 if (!sr && wait) {
67 unsigned int timeout = RNG_TIMEOUT;
68
69 do {
70 cpu_relax();
71 sr = readl_relaxed(priv->base + RNG_SR);
72 } while (!sr && --timeout);
73 }
74
75 /* If error detected or data not ready... */
Maxime Coquelin1ff69ad2016-05-26 11:34:57 +020076 if (sr != RNG_SR_DRDY) {
77 if (WARN_ONCE(sr & (RNG_SR_SEIS | RNG_SR_CEIS),
78 "bad RNG status - %x\n", sr))
79 writel_relaxed(0, priv->base + RNG_SR);
Daniel Thompsonc6a97c42015-10-12 09:21:29 +010080 break;
Maxime Coquelin1ff69ad2016-05-26 11:34:57 +020081 }
Daniel Thompsonc6a97c42015-10-12 09:21:29 +010082
83 *(u32 *)data = readl_relaxed(priv->base + RNG_DR);
84
85 retval += sizeof(u32);
86 data += sizeof(u32);
87 max -= sizeof(u32);
88 }
89
Daniel Thompsonc6a97c42015-10-12 09:21:29 +010090 pm_runtime_mark_last_busy((struct device *) priv->rng.priv);
91 pm_runtime_put_sync_autosuspend((struct device *) priv->rng.priv);
92
93 return retval || !wait ? retval : -EIO;
94}
95
96static int stm32_rng_init(struct hwrng *rng)
97{
98 struct stm32_rng_private *priv =
99 container_of(rng, struct stm32_rng_private, rng);
100 int err;
101
102 err = clk_prepare_enable(priv->clk);
103 if (err)
104 return err;
105
lionel.debieve@st.com529571e2018-02-15 14:03:10 +0100106 if (priv->ced)
107 writel_relaxed(RNG_CR_RNGEN, priv->base + RNG_CR);
108 else
109 writel_relaxed(RNG_CR_RNGEN | RNG_CR_CED,
110 priv->base + RNG_CR);
Daniel Thompsonc6a97c42015-10-12 09:21:29 +0100111
112 /* clear error indicators */
113 writel_relaxed(0, priv->base + RNG_SR);
114
115 return 0;
116}
117
118static void stm32_rng_cleanup(struct hwrng *rng)
119{
120 struct stm32_rng_private *priv =
121 container_of(rng, struct stm32_rng_private, rng);
122
123 writel_relaxed(0, priv->base + RNG_CR);
124 clk_disable_unprepare(priv->clk);
125}
126
127static int stm32_rng_probe(struct platform_device *ofdev)
128{
129 struct device *dev = &ofdev->dev;
130 struct device_node *np = ofdev->dev.of_node;
131 struct stm32_rng_private *priv;
132 struct resource res;
133 int err;
134
135 priv = devm_kzalloc(dev, sizeof(struct stm32_rng_private), GFP_KERNEL);
136 if (!priv)
137 return -ENOMEM;
138
139 err = of_address_to_resource(np, 0, &res);
140 if (err)
141 return err;
142
143 priv->base = devm_ioremap_resource(dev, &res);
144 if (IS_ERR(priv->base))
145 return PTR_ERR(priv->base);
146
147 priv->clk = devm_clk_get(&ofdev->dev, NULL);
148 if (IS_ERR(priv->clk))
149 return PTR_ERR(priv->clk);
150
lionel.debieve@st.com326ed382018-02-15 14:03:08 +0100151 priv->rst = devm_reset_control_get(&ofdev->dev, NULL);
152 if (!IS_ERR(priv->rst)) {
153 reset_control_assert(priv->rst);
154 udelay(2);
155 reset_control_deassert(priv->rst);
156 }
157
lionel.debieve@st.com529571e2018-02-15 14:03:10 +0100158 priv->ced = of_property_read_bool(np, "clock-error-detect");
159
Daniel Thompsonc6a97c42015-10-12 09:21:29 +0100160 dev_set_drvdata(dev, priv);
161
162 priv->rng.name = dev_driver_string(dev),
163#ifndef CONFIG_PM
164 priv->rng.init = stm32_rng_init,
165 priv->rng.cleanup = stm32_rng_cleanup,
166#endif
167 priv->rng.read = stm32_rng_read,
168 priv->rng.priv = (unsigned long) dev;
169
170 pm_runtime_set_autosuspend_delay(dev, 100);
171 pm_runtime_use_autosuspend(dev);
172 pm_runtime_enable(dev);
173
174 return devm_hwrng_register(dev, &priv->rng);
175}
176
177#ifdef CONFIG_PM
178static int stm32_rng_runtime_suspend(struct device *dev)
179{
Daniel Thompsond6ba06b2015-10-14 17:04:55 +0100180 struct stm32_rng_private *priv = dev_get_drvdata(dev);
Daniel Thompsonc6a97c42015-10-12 09:21:29 +0100181
182 stm32_rng_cleanup(&priv->rng);
183
184 return 0;
185}
186
187static int stm32_rng_runtime_resume(struct device *dev)
188{
Daniel Thompsond6ba06b2015-10-14 17:04:55 +0100189 struct stm32_rng_private *priv = dev_get_drvdata(dev);
Daniel Thompsonc6a97c42015-10-12 09:21:29 +0100190
191 return stm32_rng_init(&priv->rng);
192}
193#endif
194
195static UNIVERSAL_DEV_PM_OPS(stm32_rng_pm_ops, stm32_rng_runtime_suspend,
196 stm32_rng_runtime_resume, NULL);
197
198static const struct of_device_id stm32_rng_match[] = {
199 {
200 .compatible = "st,stm32-rng",
201 },
202 {},
203};
204MODULE_DEVICE_TABLE(of, stm32_rng_match);
205
206static struct platform_driver stm32_rng_driver = {
207 .driver = {
208 .name = "stm32-rng",
209 .pm = &stm32_rng_pm_ops,
210 .of_match_table = stm32_rng_match,
211 },
212 .probe = stm32_rng_probe,
213};
214
215module_platform_driver(stm32_rng_driver);
216
217MODULE_LICENSE("GPL");
218MODULE_AUTHOR("Daniel Thompson <daniel.thompson@linaro.org>");
219MODULE_DESCRIPTION("STMicroelectronics STM32 RNG device driver");