Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2008 Advanced Micro Devices, Inc. |
| 3 | * Copyright 2008 Red Hat Inc. |
| 4 | * Copyright 2009 Jerome Glisse. |
| 5 | * |
| 6 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 7 | * copy of this software and associated documentation files (the "Software"), |
| 8 | * to deal in the Software without restriction, including without limitation |
| 9 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 10 | * and/or sell copies of the Software, and to permit persons to whom the |
| 11 | * Software is furnished to do so, subject to the following conditions: |
| 12 | * |
| 13 | * The above copyright notice and this permission notice shall be included in |
| 14 | * all copies or substantial portions of the Software. |
| 15 | * |
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 19 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
| 20 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
| 21 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
| 22 | * OTHER DEALINGS IN THE SOFTWARE. |
| 23 | * |
| 24 | * Authors: Dave Airlie |
| 25 | * Alex Deucher |
| 26 | * Jerome Glisse |
| 27 | */ |
| 28 | #include "drmP.h" |
| 29 | #include "drm.h" |
| 30 | #include "radeon_drm.h" |
| 31 | #include "radeon.h" |
| 32 | |
| 33 | int radeon_gem_object_init(struct drm_gem_object *obj) |
| 34 | { |
| 35 | /* we do nothings here */ |
| 36 | return 0; |
| 37 | } |
| 38 | |
| 39 | void radeon_gem_object_free(struct drm_gem_object *gobj) |
| 40 | { |
Jerome Glisse | 4c78867 | 2009-11-20 14:29:23 +0100 | [diff] [blame] | 41 | struct radeon_bo *robj = gobj->driver_private; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 42 | |
| 43 | gobj->driver_private = NULL; |
| 44 | if (robj) { |
Jerome Glisse | 4c78867 | 2009-11-20 14:29:23 +0100 | [diff] [blame] | 45 | radeon_bo_unref(&robj); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 46 | } |
| 47 | } |
| 48 | |
| 49 | int radeon_gem_object_create(struct radeon_device *rdev, int size, |
Jerome Glisse | 4c78867 | 2009-11-20 14:29:23 +0100 | [diff] [blame] | 50 | int alignment, int initial_domain, |
| 51 | bool discardable, bool kernel, |
| 52 | struct drm_gem_object **obj) |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 53 | { |
| 54 | struct drm_gem_object *gobj; |
Jerome Glisse | 4c78867 | 2009-11-20 14:29:23 +0100 | [diff] [blame] | 55 | struct radeon_bo *robj; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 56 | int r; |
| 57 | |
| 58 | *obj = NULL; |
| 59 | gobj = drm_gem_object_alloc(rdev->ddev, size); |
| 60 | if (!gobj) { |
| 61 | return -ENOMEM; |
| 62 | } |
| 63 | /* At least align on page size */ |
| 64 | if (alignment < PAGE_SIZE) { |
| 65 | alignment = PAGE_SIZE; |
| 66 | } |
Jerome Glisse | 4c78867 | 2009-11-20 14:29:23 +0100 | [diff] [blame] | 67 | r = radeon_bo_create(rdev, gobj, size, kernel, initial_domain, &robj); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 68 | if (r) { |
Dave Airlie | ecabd32 | 2009-12-15 10:39:48 +1000 | [diff] [blame] | 69 | if (r != -ERESTARTSYS) |
| 70 | DRM_ERROR("Failed to allocate GEM object (%d, %d, %u, %d)\n", |
| 71 | size, initial_domain, alignment, r); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 72 | mutex_lock(&rdev->ddev->struct_mutex); |
| 73 | drm_gem_object_unreference(gobj); |
| 74 | mutex_unlock(&rdev->ddev->struct_mutex); |
| 75 | return r; |
| 76 | } |
| 77 | gobj->driver_private = robj; |
| 78 | *obj = gobj; |
| 79 | return 0; |
| 80 | } |
| 81 | |
| 82 | int radeon_gem_object_pin(struct drm_gem_object *obj, uint32_t pin_domain, |
| 83 | uint64_t *gpu_addr) |
| 84 | { |
Jerome Glisse | 4c78867 | 2009-11-20 14:29:23 +0100 | [diff] [blame] | 85 | struct radeon_bo *robj = obj->driver_private; |
| 86 | int r; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 87 | |
Jerome Glisse | 4c78867 | 2009-11-20 14:29:23 +0100 | [diff] [blame] | 88 | r = radeon_bo_reserve(robj, false); |
| 89 | if (unlikely(r != 0)) |
| 90 | return r; |
| 91 | r = radeon_bo_pin(robj, pin_domain, gpu_addr); |
| 92 | radeon_bo_unreserve(robj); |
| 93 | return r; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 94 | } |
| 95 | |
| 96 | void radeon_gem_object_unpin(struct drm_gem_object *obj) |
| 97 | { |
Jerome Glisse | 4c78867 | 2009-11-20 14:29:23 +0100 | [diff] [blame] | 98 | struct radeon_bo *robj = obj->driver_private; |
| 99 | int r; |
| 100 | |
| 101 | r = radeon_bo_reserve(robj, false); |
| 102 | if (likely(r == 0)) { |
| 103 | radeon_bo_unpin(robj); |
| 104 | radeon_bo_unreserve(robj); |
| 105 | } |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 106 | } |
| 107 | |
| 108 | int radeon_gem_set_domain(struct drm_gem_object *gobj, |
| 109 | uint32_t rdomain, uint32_t wdomain) |
| 110 | { |
Jerome Glisse | 4c78867 | 2009-11-20 14:29:23 +0100 | [diff] [blame] | 111 | struct radeon_bo *robj; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 112 | uint32_t domain; |
| 113 | int r; |
| 114 | |
| 115 | /* FIXME: reeimplement */ |
| 116 | robj = gobj->driver_private; |
| 117 | /* work out where to validate the buffer to */ |
| 118 | domain = wdomain; |
| 119 | if (!domain) { |
| 120 | domain = rdomain; |
| 121 | } |
| 122 | if (!domain) { |
| 123 | /* Do nothings */ |
| 124 | printk(KERN_WARNING "Set domain withou domain !\n"); |
| 125 | return 0; |
| 126 | } |
| 127 | if (domain == RADEON_GEM_DOMAIN_CPU) { |
| 128 | /* Asking for cpu access wait for object idle */ |
Jerome Glisse | 4c78867 | 2009-11-20 14:29:23 +0100 | [diff] [blame] | 129 | r = radeon_bo_wait(robj, NULL, false); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 130 | if (r) { |
| 131 | printk(KERN_ERR "Failed to wait for object !\n"); |
| 132 | return r; |
| 133 | } |
Jerome Glisse | 4c78867 | 2009-11-20 14:29:23 +0100 | [diff] [blame] | 134 | radeon_hdp_flush(robj->rdev); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 135 | } |
| 136 | return 0; |
| 137 | } |
| 138 | |
| 139 | int radeon_gem_init(struct radeon_device *rdev) |
| 140 | { |
| 141 | INIT_LIST_HEAD(&rdev->gem.objects); |
| 142 | return 0; |
| 143 | } |
| 144 | |
| 145 | void radeon_gem_fini(struct radeon_device *rdev) |
| 146 | { |
Jerome Glisse | 4c78867 | 2009-11-20 14:29:23 +0100 | [diff] [blame] | 147 | radeon_bo_force_delete(rdev); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 148 | } |
| 149 | |
| 150 | |
| 151 | /* |
| 152 | * GEM ioctls. |
| 153 | */ |
| 154 | int radeon_gem_info_ioctl(struct drm_device *dev, void *data, |
| 155 | struct drm_file *filp) |
| 156 | { |
| 157 | struct radeon_device *rdev = dev->dev_private; |
| 158 | struct drm_radeon_gem_info *args = data; |
| 159 | |
Dave Airlie | 7a50f01 | 2009-07-21 20:39:30 +1000 | [diff] [blame] | 160 | args->vram_size = rdev->mc.real_vram_size; |
Michel Dänzer | 38e1492 | 2009-08-05 00:19:51 +0200 | [diff] [blame] | 161 | args->vram_visible = rdev->mc.real_vram_size; |
| 162 | if (rdev->stollen_vga_memory) |
Jerome Glisse | 4c78867 | 2009-11-20 14:29:23 +0100 | [diff] [blame] | 163 | args->vram_visible -= radeon_bo_size(rdev->stollen_vga_memory); |
| 164 | if (rdev->fbdev_rbo) |
| 165 | args->vram_visible -= radeon_bo_size(rdev->fbdev_rbo); |
Michel Dänzer | 38e1492 | 2009-08-05 00:19:51 +0200 | [diff] [blame] | 166 | args->gart_size = rdev->mc.gtt_size - rdev->cp.ring_size - 4096 - |
| 167 | RADEON_IB_POOL_SIZE*64*1024; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 168 | return 0; |
| 169 | } |
| 170 | |
| 171 | int radeon_gem_pread_ioctl(struct drm_device *dev, void *data, |
| 172 | struct drm_file *filp) |
| 173 | { |
| 174 | /* TODO: implement */ |
| 175 | DRM_ERROR("unimplemented %s\n", __func__); |
| 176 | return -ENOSYS; |
| 177 | } |
| 178 | |
| 179 | int radeon_gem_pwrite_ioctl(struct drm_device *dev, void *data, |
| 180 | struct drm_file *filp) |
| 181 | { |
| 182 | /* TODO: implement */ |
| 183 | DRM_ERROR("unimplemented %s\n", __func__); |
| 184 | return -ENOSYS; |
| 185 | } |
| 186 | |
| 187 | int radeon_gem_create_ioctl(struct drm_device *dev, void *data, |
| 188 | struct drm_file *filp) |
| 189 | { |
| 190 | struct radeon_device *rdev = dev->dev_private; |
| 191 | struct drm_radeon_gem_create *args = data; |
| 192 | struct drm_gem_object *gobj; |
| 193 | uint32_t handle; |
| 194 | int r; |
| 195 | |
| 196 | /* create a gem object to contain this object in */ |
| 197 | args->size = roundup(args->size, PAGE_SIZE); |
| 198 | r = radeon_gem_object_create(rdev, args->size, args->alignment, |
Jerome Glisse | 4c78867 | 2009-11-20 14:29:23 +0100 | [diff] [blame] | 199 | args->initial_domain, false, |
| 200 | false, &gobj); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 201 | if (r) { |
| 202 | return r; |
| 203 | } |
| 204 | r = drm_gem_handle_create(filp, gobj, &handle); |
| 205 | if (r) { |
| 206 | mutex_lock(&dev->struct_mutex); |
| 207 | drm_gem_object_unreference(gobj); |
| 208 | mutex_unlock(&dev->struct_mutex); |
| 209 | return r; |
| 210 | } |
| 211 | mutex_lock(&dev->struct_mutex); |
| 212 | drm_gem_object_handle_unreference(gobj); |
| 213 | mutex_unlock(&dev->struct_mutex); |
| 214 | args->handle = handle; |
| 215 | return 0; |
| 216 | } |
| 217 | |
| 218 | int radeon_gem_set_domain_ioctl(struct drm_device *dev, void *data, |
| 219 | struct drm_file *filp) |
| 220 | { |
| 221 | /* transition the BO to a domain - |
| 222 | * just validate the BO into a certain domain */ |
| 223 | struct drm_radeon_gem_set_domain *args = data; |
| 224 | struct drm_gem_object *gobj; |
Jerome Glisse | 4c78867 | 2009-11-20 14:29:23 +0100 | [diff] [blame] | 225 | struct radeon_bo *robj; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 226 | int r; |
| 227 | |
| 228 | /* for now if someone requests domain CPU - |
| 229 | * just make sure the buffer is finished with */ |
| 230 | |
| 231 | /* just do a BO wait for now */ |
| 232 | gobj = drm_gem_object_lookup(dev, filp, args->handle); |
| 233 | if (gobj == NULL) { |
| 234 | return -EINVAL; |
| 235 | } |
| 236 | robj = gobj->driver_private; |
| 237 | |
| 238 | r = radeon_gem_set_domain(gobj, args->read_domains, args->write_domain); |
| 239 | |
| 240 | mutex_lock(&dev->struct_mutex); |
| 241 | drm_gem_object_unreference(gobj); |
| 242 | mutex_unlock(&dev->struct_mutex); |
| 243 | return r; |
| 244 | } |
| 245 | |
| 246 | int radeon_gem_mmap_ioctl(struct drm_device *dev, void *data, |
| 247 | struct drm_file *filp) |
| 248 | { |
| 249 | struct drm_radeon_gem_mmap *args = data; |
| 250 | struct drm_gem_object *gobj; |
Jerome Glisse | 4c78867 | 2009-11-20 14:29:23 +0100 | [diff] [blame] | 251 | struct radeon_bo *robj; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 252 | |
| 253 | gobj = drm_gem_object_lookup(dev, filp, args->handle); |
| 254 | if (gobj == NULL) { |
| 255 | return -EINVAL; |
| 256 | } |
| 257 | robj = gobj->driver_private; |
Jerome Glisse | 4c78867 | 2009-11-20 14:29:23 +0100 | [diff] [blame] | 258 | args->addr_ptr = radeon_bo_mmap_offset(robj); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 259 | mutex_lock(&dev->struct_mutex); |
| 260 | drm_gem_object_unreference(gobj); |
| 261 | mutex_unlock(&dev->struct_mutex); |
Jerome Glisse | 4c78867 | 2009-11-20 14:29:23 +0100 | [diff] [blame] | 262 | return 0; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 263 | } |
| 264 | |
| 265 | int radeon_gem_busy_ioctl(struct drm_device *dev, void *data, |
| 266 | struct drm_file *filp) |
| 267 | { |
Dave Airlie | cefb87e | 2009-08-16 21:05:45 +1000 | [diff] [blame] | 268 | struct drm_radeon_gem_busy *args = data; |
| 269 | struct drm_gem_object *gobj; |
Jerome Glisse | 4c78867 | 2009-11-20 14:29:23 +0100 | [diff] [blame] | 270 | struct radeon_bo *robj; |
Dave Airlie | cefb87e | 2009-08-16 21:05:45 +1000 | [diff] [blame] | 271 | int r; |
Dave Airlie | 4361e52 | 2009-12-10 15:59:32 +1000 | [diff] [blame] | 272 | uint32_t cur_placement = 0; |
Dave Airlie | cefb87e | 2009-08-16 21:05:45 +1000 | [diff] [blame] | 273 | |
| 274 | gobj = drm_gem_object_lookup(dev, filp, args->handle); |
| 275 | if (gobj == NULL) { |
| 276 | return -EINVAL; |
| 277 | } |
| 278 | robj = gobj->driver_private; |
Jerome Glisse | 4c78867 | 2009-11-20 14:29:23 +0100 | [diff] [blame] | 279 | r = radeon_bo_wait(robj, &cur_placement, true); |
Michel Dänzer | 9f844e5 | 2009-08-22 17:38:23 +0200 | [diff] [blame] | 280 | switch (cur_placement) { |
| 281 | case TTM_PL_VRAM: |
Dave Airlie | cefb87e | 2009-08-16 21:05:45 +1000 | [diff] [blame] | 282 | args->domain = RADEON_GEM_DOMAIN_VRAM; |
Michel Dänzer | 9f844e5 | 2009-08-22 17:38:23 +0200 | [diff] [blame] | 283 | break; |
| 284 | case TTM_PL_TT: |
Dave Airlie | cefb87e | 2009-08-16 21:05:45 +1000 | [diff] [blame] | 285 | args->domain = RADEON_GEM_DOMAIN_GTT; |
Michel Dänzer | 9f844e5 | 2009-08-22 17:38:23 +0200 | [diff] [blame] | 286 | break; |
| 287 | case TTM_PL_SYSTEM: |
Dave Airlie | cefb87e | 2009-08-16 21:05:45 +1000 | [diff] [blame] | 288 | args->domain = RADEON_GEM_DOMAIN_CPU; |
Michel Dänzer | 9f844e5 | 2009-08-22 17:38:23 +0200 | [diff] [blame] | 289 | default: |
| 290 | break; |
| 291 | } |
Dave Airlie | cefb87e | 2009-08-16 21:05:45 +1000 | [diff] [blame] | 292 | mutex_lock(&dev->struct_mutex); |
| 293 | drm_gem_object_unreference(gobj); |
| 294 | mutex_unlock(&dev->struct_mutex); |
Dave Airlie | e3b2415 | 2009-08-21 09:47:45 +1000 | [diff] [blame] | 295 | return r; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 296 | } |
| 297 | |
| 298 | int radeon_gem_wait_idle_ioctl(struct drm_device *dev, void *data, |
| 299 | struct drm_file *filp) |
| 300 | { |
| 301 | struct drm_radeon_gem_wait_idle *args = data; |
| 302 | struct drm_gem_object *gobj; |
Jerome Glisse | 4c78867 | 2009-11-20 14:29:23 +0100 | [diff] [blame] | 303 | struct radeon_bo *robj; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 304 | int r; |
| 305 | |
| 306 | gobj = drm_gem_object_lookup(dev, filp, args->handle); |
| 307 | if (gobj == NULL) { |
| 308 | return -EINVAL; |
| 309 | } |
| 310 | robj = gobj->driver_private; |
Jerome Glisse | 4c78867 | 2009-11-20 14:29:23 +0100 | [diff] [blame] | 311 | r = radeon_bo_wait(robj, NULL, false); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 312 | mutex_lock(&dev->struct_mutex); |
| 313 | drm_gem_object_unreference(gobj); |
| 314 | mutex_unlock(&dev->struct_mutex); |
Jerome Glisse | 4c78867 | 2009-11-20 14:29:23 +0100 | [diff] [blame] | 315 | radeon_hdp_flush(robj->rdev); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 316 | return r; |
| 317 | } |
Dave Airlie | e024e11 | 2009-06-24 09:48:08 +1000 | [diff] [blame] | 318 | |
| 319 | int radeon_gem_set_tiling_ioctl(struct drm_device *dev, void *data, |
| 320 | struct drm_file *filp) |
| 321 | { |
| 322 | struct drm_radeon_gem_set_tiling *args = data; |
| 323 | struct drm_gem_object *gobj; |
Jerome Glisse | 4c78867 | 2009-11-20 14:29:23 +0100 | [diff] [blame] | 324 | struct radeon_bo *robj; |
Dave Airlie | e024e11 | 2009-06-24 09:48:08 +1000 | [diff] [blame] | 325 | int r = 0; |
| 326 | |
| 327 | DRM_DEBUG("%d \n", args->handle); |
| 328 | gobj = drm_gem_object_lookup(dev, filp, args->handle); |
| 329 | if (gobj == NULL) |
| 330 | return -EINVAL; |
| 331 | robj = gobj->driver_private; |
Jerome Glisse | 4c78867 | 2009-11-20 14:29:23 +0100 | [diff] [blame] | 332 | r = radeon_bo_set_tiling_flags(robj, args->tiling_flags, args->pitch); |
Dave Airlie | e024e11 | 2009-06-24 09:48:08 +1000 | [diff] [blame] | 333 | mutex_lock(&dev->struct_mutex); |
| 334 | drm_gem_object_unreference(gobj); |
| 335 | mutex_unlock(&dev->struct_mutex); |
| 336 | return r; |
| 337 | } |
| 338 | |
| 339 | int radeon_gem_get_tiling_ioctl(struct drm_device *dev, void *data, |
| 340 | struct drm_file *filp) |
| 341 | { |
| 342 | struct drm_radeon_gem_get_tiling *args = data; |
| 343 | struct drm_gem_object *gobj; |
Jerome Glisse | 4c78867 | 2009-11-20 14:29:23 +0100 | [diff] [blame] | 344 | struct radeon_bo *rbo; |
Dave Airlie | e024e11 | 2009-06-24 09:48:08 +1000 | [diff] [blame] | 345 | int r = 0; |
| 346 | |
| 347 | DRM_DEBUG("\n"); |
| 348 | gobj = drm_gem_object_lookup(dev, filp, args->handle); |
| 349 | if (gobj == NULL) |
| 350 | return -EINVAL; |
Jerome Glisse | 4c78867 | 2009-11-20 14:29:23 +0100 | [diff] [blame] | 351 | rbo = gobj->driver_private; |
| 352 | r = radeon_bo_reserve(rbo, false); |
| 353 | if (unlikely(r != 0)) |
Dave Airlie | 51f07b7 | 2009-12-16 13:10:43 +1000 | [diff] [blame^] | 354 | goto out; |
Jerome Glisse | 4c78867 | 2009-11-20 14:29:23 +0100 | [diff] [blame] | 355 | radeon_bo_get_tiling_flags(rbo, &args->tiling_flags, &args->pitch); |
| 356 | radeon_bo_unreserve(rbo); |
Dave Airlie | 51f07b7 | 2009-12-16 13:10:43 +1000 | [diff] [blame^] | 357 | out: |
Dave Airlie | e024e11 | 2009-06-24 09:48:08 +1000 | [diff] [blame] | 358 | mutex_lock(&dev->struct_mutex); |
| 359 | drm_gem_object_unreference(gobj); |
| 360 | mutex_unlock(&dev->struct_mutex); |
| 361 | return r; |
| 362 | } |