Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 1 | /* |
Jubin John | 05d6ac1 | 2016-02-14 20:22:17 -0800 | [diff] [blame] | 2 | * Copyright(c) 2015, 2016 Intel Corporation. |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 3 | * |
| 4 | * This file is provided under a dual BSD/GPLv2 license. When using or |
| 5 | * redistributing this file, you may do so under either license. |
| 6 | * |
| 7 | * GPL LICENSE SUMMARY |
| 8 | * |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 9 | * This program is free software; you can redistribute it and/or modify |
| 10 | * it under the terms of version 2 of the GNU General Public License as |
| 11 | * published by the Free Software Foundation. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, but |
| 14 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 16 | * General Public License for more details. |
| 17 | * |
| 18 | * BSD LICENSE |
| 19 | * |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 20 | * Redistribution and use in source and binary forms, with or without |
| 21 | * modification, are permitted provided that the following conditions |
| 22 | * are met: |
| 23 | * |
| 24 | * - Redistributions of source code must retain the above copyright |
| 25 | * notice, this list of conditions and the following disclaimer. |
| 26 | * - Redistributions in binary form must reproduce the above copyright |
| 27 | * notice, this list of conditions and the following disclaimer in |
| 28 | * the documentation and/or other materials provided with the |
| 29 | * distribution. |
| 30 | * - Neither the name of Intel Corporation nor the names of its |
| 31 | * contributors may be used to endorse or promote products derived |
| 32 | * from this software without specific prior written permission. |
| 33 | * |
| 34 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
| 35 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
| 36 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR |
| 37 | * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT |
| 38 | * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, |
| 39 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT |
| 40 | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| 41 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| 42 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 43 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| 44 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 45 | * |
| 46 | */ |
| 47 | |
| 48 | #include "hfi.h" |
Dennis Dalessandro | bb5df5f | 2016-02-14 12:44:43 -0800 | [diff] [blame] | 49 | #include "verbs_txreq.h" |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 50 | #include "qp.h" |
| 51 | |
| 52 | /* cut down ridiculously long IB macro names */ |
| 53 | #define OP(x) IB_OPCODE_UC_##x |
| 54 | |
Mike Marciniszyn | 14553ca | 2016-02-14 12:45:36 -0800 | [diff] [blame] | 55 | /* only opcode mask for adaptive pio */ |
| 56 | const u32 uc_only_opcode = |
| 57 | BIT(OP(SEND_ONLY) & 0x1f) | |
| 58 | BIT(OP(SEND_ONLY_WITH_IMMEDIATE & 0x1f)) | |
| 59 | BIT(OP(RDMA_WRITE_ONLY & 0x1f)) | |
| 60 | BIT(OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE & 0x1f)); |
| 61 | |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 62 | /** |
| 63 | * hfi1_make_uc_req - construct a request packet (SEND, RDMA write) |
| 64 | * @qp: a pointer to the QP |
| 65 | * |
Mike Marciniszyn | 46a80d6 | 2016-02-14 12:10:04 -0800 | [diff] [blame] | 66 | * Assume s_lock is held. |
| 67 | * |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 68 | * Return 1 if constructed; otherwise, return 0. |
| 69 | */ |
Dennis Dalessandro | bb5df5f | 2016-02-14 12:44:43 -0800 | [diff] [blame] | 70 | int hfi1_make_uc_req(struct rvt_qp *qp, struct hfi1_pkt_state *ps) |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 71 | { |
Dennis Dalessandro | 4c6829c | 2016-01-19 14:42:00 -0800 | [diff] [blame] | 72 | struct hfi1_qp_priv *priv = qp->priv; |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 73 | struct hfi1_other_headers *ohdr; |
Dennis Dalessandro | 895420d | 2016-01-19 14:42:28 -0800 | [diff] [blame] | 74 | struct rvt_swqe *wqe; |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 75 | u32 hwords = 5; |
| 76 | u32 bth0 = 0; |
| 77 | u32 len; |
| 78 | u32 pmtu = qp->pmtu; |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 79 | int middle = 0; |
| 80 | |
Dennis Dalessandro | bb5df5f | 2016-02-14 12:44:43 -0800 | [diff] [blame] | 81 | ps->s_txreq = get_txreq(ps->dev, qp); |
| 82 | if (IS_ERR(ps->s_txreq)) |
| 83 | goto bail_no_tx; |
| 84 | |
Dennis Dalessandro | 83693bd | 2016-01-19 14:43:33 -0800 | [diff] [blame] | 85 | if (!(ib_rvt_state_ops[qp->state] & RVT_PROCESS_SEND_OK)) { |
| 86 | if (!(ib_rvt_state_ops[qp->state] & RVT_FLUSH_SEND)) |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 87 | goto bail; |
| 88 | /* We are in the error state, flush the work request. */ |
Mike Marciniszyn | 46a80d6 | 2016-02-14 12:10:04 -0800 | [diff] [blame] | 89 | smp_read_barrier_depends(); /* see post_one_send() */ |
| 90 | if (qp->s_last == ACCESS_ONCE(qp->s_head)) |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 91 | goto bail; |
| 92 | /* If DMAs are in progress, we can't flush immediately. */ |
Mike Marciniszyn | 14553ca | 2016-02-14 12:45:36 -0800 | [diff] [blame] | 93 | if (iowait_sdma_pending(&priv->s_iowait)) { |
Dennis Dalessandro | 54d10c1 | 2016-01-19 14:43:01 -0800 | [diff] [blame] | 94 | qp->s_flags |= RVT_S_WAIT_DMA; |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 95 | goto bail; |
| 96 | } |
| 97 | clear_ahg(qp); |
Dennis Dalessandro | 83693bd | 2016-01-19 14:43:33 -0800 | [diff] [blame] | 98 | wqe = rvt_get_swqe_ptr(qp, qp->s_last); |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 99 | hfi1_send_complete(qp, wqe, IB_WC_WR_FLUSH_ERR); |
Dennis Dalessandro | bb5df5f | 2016-02-14 12:44:43 -0800 | [diff] [blame] | 100 | goto done_free_tx; |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 101 | } |
| 102 | |
Dennis Dalessandro | bb5df5f | 2016-02-14 12:44:43 -0800 | [diff] [blame] | 103 | ohdr = &ps->s_txreq->phdr.hdr.u.oth; |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 104 | if (qp->remote_ah_attr.ah_flags & IB_AH_GRH) |
Dennis Dalessandro | bb5df5f | 2016-02-14 12:44:43 -0800 | [diff] [blame] | 105 | ohdr = &ps->s_txreq->phdr.hdr.u.l.oth; |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 106 | |
| 107 | /* Get the next send request. */ |
Dennis Dalessandro | 83693bd | 2016-01-19 14:43:33 -0800 | [diff] [blame] | 108 | wqe = rvt_get_swqe_ptr(qp, qp->s_cur); |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 109 | qp->s_wqe = NULL; |
| 110 | switch (qp->s_state) { |
| 111 | default: |
Dennis Dalessandro | 83693bd | 2016-01-19 14:43:33 -0800 | [diff] [blame] | 112 | if (!(ib_rvt_state_ops[qp->state] & |
| 113 | RVT_PROCESS_NEXT_SEND_OK)) |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 114 | goto bail; |
| 115 | /* Check if send work queue is empty. */ |
Mike Marciniszyn | 46a80d6 | 2016-02-14 12:10:04 -0800 | [diff] [blame] | 116 | smp_read_barrier_depends(); /* see post_one_send() */ |
| 117 | if (qp->s_cur == ACCESS_ONCE(qp->s_head)) { |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 118 | clear_ahg(qp); |
| 119 | goto bail; |
| 120 | } |
| 121 | /* |
| 122 | * Start a new request. |
| 123 | */ |
Mike Marciniszyn | 46a80d6 | 2016-02-14 12:10:04 -0800 | [diff] [blame] | 124 | qp->s_psn = wqe->psn; |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 125 | qp->s_sge.sge = wqe->sg_list[0]; |
| 126 | qp->s_sge.sg_list = wqe->sg_list + 1; |
| 127 | qp->s_sge.num_sge = wqe->wr.num_sge; |
| 128 | qp->s_sge.total_len = wqe->length; |
| 129 | len = wqe->length; |
| 130 | qp->s_len = len; |
| 131 | switch (wqe->wr.opcode) { |
| 132 | case IB_WR_SEND: |
| 133 | case IB_WR_SEND_WITH_IMM: |
| 134 | if (len > pmtu) { |
| 135 | qp->s_state = OP(SEND_FIRST); |
| 136 | len = pmtu; |
| 137 | break; |
| 138 | } |
Jubin John | e490974 | 2016-02-14 20:22:00 -0800 | [diff] [blame] | 139 | if (wqe->wr.opcode == IB_WR_SEND) { |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 140 | qp->s_state = OP(SEND_ONLY); |
Jubin John | e490974 | 2016-02-14 20:22:00 -0800 | [diff] [blame] | 141 | } else { |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 142 | qp->s_state = |
| 143 | OP(SEND_ONLY_WITH_IMMEDIATE); |
| 144 | /* Immediate data comes after the BTH */ |
| 145 | ohdr->u.imm_data = wqe->wr.ex.imm_data; |
| 146 | hwords += 1; |
| 147 | } |
| 148 | if (wqe->wr.send_flags & IB_SEND_SOLICITED) |
| 149 | bth0 |= IB_BTH_SOLICITED; |
| 150 | qp->s_wqe = wqe; |
| 151 | if (++qp->s_cur >= qp->s_size) |
| 152 | qp->s_cur = 0; |
| 153 | break; |
| 154 | |
| 155 | case IB_WR_RDMA_WRITE: |
| 156 | case IB_WR_RDMA_WRITE_WITH_IMM: |
| 157 | ohdr->u.rc.reth.vaddr = |
Christoph Hellwig | e622f2f | 2015-10-08 09:16:33 +0100 | [diff] [blame] | 158 | cpu_to_be64(wqe->rdma_wr.remote_addr); |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 159 | ohdr->u.rc.reth.rkey = |
Christoph Hellwig | e622f2f | 2015-10-08 09:16:33 +0100 | [diff] [blame] | 160 | cpu_to_be32(wqe->rdma_wr.rkey); |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 161 | ohdr->u.rc.reth.length = cpu_to_be32(len); |
| 162 | hwords += sizeof(struct ib_reth) / 4; |
| 163 | if (len > pmtu) { |
| 164 | qp->s_state = OP(RDMA_WRITE_FIRST); |
| 165 | len = pmtu; |
| 166 | break; |
| 167 | } |
Jubin John | e490974 | 2016-02-14 20:22:00 -0800 | [diff] [blame] | 168 | if (wqe->wr.opcode == IB_WR_RDMA_WRITE) { |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 169 | qp->s_state = OP(RDMA_WRITE_ONLY); |
Jubin John | e490974 | 2016-02-14 20:22:00 -0800 | [diff] [blame] | 170 | } else { |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 171 | qp->s_state = |
| 172 | OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE); |
| 173 | /* Immediate data comes after the RETH */ |
| 174 | ohdr->u.rc.imm_data = wqe->wr.ex.imm_data; |
| 175 | hwords += 1; |
| 176 | if (wqe->wr.send_flags & IB_SEND_SOLICITED) |
| 177 | bth0 |= IB_BTH_SOLICITED; |
| 178 | } |
| 179 | qp->s_wqe = wqe; |
| 180 | if (++qp->s_cur >= qp->s_size) |
| 181 | qp->s_cur = 0; |
| 182 | break; |
| 183 | |
| 184 | default: |
| 185 | goto bail; |
| 186 | } |
| 187 | break; |
| 188 | |
| 189 | case OP(SEND_FIRST): |
| 190 | qp->s_state = OP(SEND_MIDDLE); |
| 191 | /* FALLTHROUGH */ |
| 192 | case OP(SEND_MIDDLE): |
| 193 | len = qp->s_len; |
| 194 | if (len > pmtu) { |
| 195 | len = pmtu; |
| 196 | middle = HFI1_CAP_IS_KSET(SDMA_AHG); |
| 197 | break; |
| 198 | } |
Jubin John | e490974 | 2016-02-14 20:22:00 -0800 | [diff] [blame] | 199 | if (wqe->wr.opcode == IB_WR_SEND) { |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 200 | qp->s_state = OP(SEND_LAST); |
Jubin John | e490974 | 2016-02-14 20:22:00 -0800 | [diff] [blame] | 201 | } else { |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 202 | qp->s_state = OP(SEND_LAST_WITH_IMMEDIATE); |
| 203 | /* Immediate data comes after the BTH */ |
| 204 | ohdr->u.imm_data = wqe->wr.ex.imm_data; |
| 205 | hwords += 1; |
| 206 | } |
| 207 | if (wqe->wr.send_flags & IB_SEND_SOLICITED) |
| 208 | bth0 |= IB_BTH_SOLICITED; |
| 209 | qp->s_wqe = wqe; |
| 210 | if (++qp->s_cur >= qp->s_size) |
| 211 | qp->s_cur = 0; |
| 212 | break; |
| 213 | |
| 214 | case OP(RDMA_WRITE_FIRST): |
| 215 | qp->s_state = OP(RDMA_WRITE_MIDDLE); |
| 216 | /* FALLTHROUGH */ |
| 217 | case OP(RDMA_WRITE_MIDDLE): |
| 218 | len = qp->s_len; |
| 219 | if (len > pmtu) { |
| 220 | len = pmtu; |
| 221 | middle = HFI1_CAP_IS_KSET(SDMA_AHG); |
| 222 | break; |
| 223 | } |
Jubin John | e490974 | 2016-02-14 20:22:00 -0800 | [diff] [blame] | 224 | if (wqe->wr.opcode == IB_WR_RDMA_WRITE) { |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 225 | qp->s_state = OP(RDMA_WRITE_LAST); |
Jubin John | e490974 | 2016-02-14 20:22:00 -0800 | [diff] [blame] | 226 | } else { |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 227 | qp->s_state = |
| 228 | OP(RDMA_WRITE_LAST_WITH_IMMEDIATE); |
| 229 | /* Immediate data comes after the BTH */ |
| 230 | ohdr->u.imm_data = wqe->wr.ex.imm_data; |
| 231 | hwords += 1; |
| 232 | if (wqe->wr.send_flags & IB_SEND_SOLICITED) |
| 233 | bth0 |= IB_BTH_SOLICITED; |
| 234 | } |
| 235 | qp->s_wqe = wqe; |
| 236 | if (++qp->s_cur >= qp->s_size) |
| 237 | qp->s_cur = 0; |
| 238 | break; |
| 239 | } |
| 240 | qp->s_len -= len; |
| 241 | qp->s_hdrwords = hwords; |
Mike Marciniszyn | 14553ca | 2016-02-14 12:45:36 -0800 | [diff] [blame] | 242 | ps->s_txreq->sde = priv->s_sde; |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 243 | qp->s_cur_sge = &qp->s_sge; |
| 244 | qp->s_cur_size = len; |
| 245 | hfi1_make_ruc_header(qp, ohdr, bth0 | (qp->s_state << 24), |
Dennis Dalessandro | bb5df5f | 2016-02-14 12:44:43 -0800 | [diff] [blame] | 246 | mask_psn(qp->s_psn++), middle, ps); |
Jianxin Xiong | aa0ad41 | 2016-02-26 13:33:13 -0800 | [diff] [blame] | 247 | /* pbc */ |
| 248 | ps->s_txreq->hdr_dwords = qp->s_hdrwords + 2; |
Dennis Dalessandro | bb5df5f | 2016-02-14 12:44:43 -0800 | [diff] [blame] | 249 | return 1; |
| 250 | |
| 251 | done_free_tx: |
| 252 | hfi1_put_txreq(ps->s_txreq); |
| 253 | ps->s_txreq = NULL; |
Mike Marciniszyn | 46a80d6 | 2016-02-14 12:10:04 -0800 | [diff] [blame] | 254 | return 1; |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 255 | |
| 256 | bail: |
Dennis Dalessandro | bb5df5f | 2016-02-14 12:44:43 -0800 | [diff] [blame] | 257 | hfi1_put_txreq(ps->s_txreq); |
| 258 | |
| 259 | bail_no_tx: |
| 260 | ps->s_txreq = NULL; |
Dennis Dalessandro | 54d10c1 | 2016-01-19 14:43:01 -0800 | [diff] [blame] | 261 | qp->s_flags &= ~RVT_S_BUSY; |
Dennis Dalessandro | bb5df5f | 2016-02-14 12:44:43 -0800 | [diff] [blame] | 262 | qp->s_hdrwords = 0; |
| 263 | return 0; |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 264 | } |
| 265 | |
| 266 | /** |
| 267 | * hfi1_uc_rcv - handle an incoming UC packet |
| 268 | * @ibp: the port the packet came in on |
| 269 | * @hdr: the header of the packet |
| 270 | * @rcv_flags: flags relevant to rcv processing |
| 271 | * @data: the packet data |
| 272 | * @tlen: the length of the packet |
| 273 | * @qp: the QP for this packet. |
| 274 | * |
| 275 | * This is called from qp_rcv() to process an incoming UC packet |
| 276 | * for the given QP. |
| 277 | * Called at interrupt level. |
| 278 | */ |
| 279 | void hfi1_uc_rcv(struct hfi1_packet *packet) |
| 280 | { |
| 281 | struct hfi1_ibport *ibp = &packet->rcd->ppd->ibport_data; |
| 282 | struct hfi1_ib_header *hdr = packet->hdr; |
| 283 | u32 rcv_flags = packet->rcv_flags; |
| 284 | void *data = packet->ebuf; |
| 285 | u32 tlen = packet->tlen; |
Dennis Dalessandro | 895420d | 2016-01-19 14:42:28 -0800 | [diff] [blame] | 286 | struct rvt_qp *qp = packet->qp; |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 287 | struct hfi1_other_headers *ohdr = packet->ohdr; |
Arthur Kepner | 977940b | 2015-11-04 21:10:10 -0500 | [diff] [blame] | 288 | u32 bth0, opcode; |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 289 | u32 hdrsize = packet->hlen; |
| 290 | u32 psn; |
| 291 | u32 pad; |
| 292 | struct ib_wc wc; |
| 293 | u32 pmtu = qp->pmtu; |
| 294 | struct ib_reth *reth; |
| 295 | int has_grh = rcv_flags & HFI1_HAS_GRH; |
| 296 | int ret; |
| 297 | u32 bth1; |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 298 | |
Arthur Kepner | 977940b | 2015-11-04 21:10:10 -0500 | [diff] [blame] | 299 | bth0 = be32_to_cpu(ohdr->bth[0]); |
| 300 | if (hfi1_ruc_check_hdr(ibp, hdr, has_grh, qp, bth0)) |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 301 | return; |
| 302 | |
| 303 | bth1 = be32_to_cpu(ohdr->bth[1]); |
| 304 | if (unlikely(bth1 & (HFI1_BECN_SMASK | HFI1_FECN_SMASK))) { |
| 305 | if (bth1 & HFI1_BECN_SMASK) { |
| 306 | struct hfi1_pportdata *ppd = ppd_from_ibp(ibp); |
| 307 | u32 rqpn, lqpn; |
| 308 | u16 rlid = be16_to_cpu(hdr->lrh[3]); |
| 309 | u8 sl, sc5; |
| 310 | |
Dennis Dalessandro | ec4274f | 2016-01-19 14:43:44 -0800 | [diff] [blame] | 311 | lqpn = bth1 & RVT_QPN_MASK; |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 312 | rqpn = qp->remote_qpn; |
| 313 | |
| 314 | sc5 = ibp->sl_to_sc[qp->remote_ah_attr.sl]; |
| 315 | sl = ibp->sc_to_sl[sc5]; |
| 316 | |
| 317 | process_becn(ppd, sl, rlid, lqpn, rqpn, |
Jubin John | 17fb4f2 | 2016-02-14 20:21:52 -0800 | [diff] [blame] | 318 | IB_CC_SVCTYPE_UC); |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 319 | } |
| 320 | |
| 321 | if (bth1 & HFI1_FECN_SMASK) { |
Arthur Kepner | 977940b | 2015-11-04 21:10:10 -0500 | [diff] [blame] | 322 | struct ib_grh *grh = NULL; |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 323 | u16 pkey = (u16)be32_to_cpu(ohdr->bth[0]); |
| 324 | u16 slid = be16_to_cpu(hdr->lrh[3]); |
| 325 | u16 dlid = be16_to_cpu(hdr->lrh[1]); |
| 326 | u32 src_qp = qp->remote_qpn; |
| 327 | u8 sc5; |
| 328 | |
| 329 | sc5 = ibp->sl_to_sc[qp->remote_ah_attr.sl]; |
Arthur Kepner | 977940b | 2015-11-04 21:10:10 -0500 | [diff] [blame] | 330 | if (has_grh) |
| 331 | grh = &hdr->u.l.grh; |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 332 | |
Arthur Kepner | 977940b | 2015-11-04 21:10:10 -0500 | [diff] [blame] | 333 | return_cnp(ibp, qp, src_qp, pkey, dlid, slid, sc5, |
| 334 | grh); |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 335 | } |
| 336 | } |
| 337 | |
| 338 | psn = be32_to_cpu(ohdr->bth[2]); |
Arthur Kepner | 977940b | 2015-11-04 21:10:10 -0500 | [diff] [blame] | 339 | opcode = (bth0 >> 24) & 0xff; |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 340 | |
| 341 | /* Compare the PSN verses the expected PSN. */ |
| 342 | if (unlikely(cmp_psn(psn, qp->r_psn) != 0)) { |
| 343 | /* |
| 344 | * Handle a sequence error. |
| 345 | * Silently drop any current message. |
| 346 | */ |
| 347 | qp->r_psn = psn; |
| 348 | inv: |
| 349 | if (qp->r_state == OP(SEND_FIRST) || |
| 350 | qp->r_state == OP(SEND_MIDDLE)) { |
Dennis Dalessandro | 54d10c1 | 2016-01-19 14:43:01 -0800 | [diff] [blame] | 351 | set_bit(RVT_R_REWIND_SGE, &qp->r_aflags); |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 352 | qp->r_sge.num_sge = 0; |
Jubin John | e490974 | 2016-02-14 20:22:00 -0800 | [diff] [blame] | 353 | } else { |
Dennis Dalessandro | ec4274f | 2016-01-19 14:43:44 -0800 | [diff] [blame] | 354 | rvt_put_ss(&qp->r_sge); |
Jubin John | e490974 | 2016-02-14 20:22:00 -0800 | [diff] [blame] | 355 | } |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 356 | qp->r_state = OP(SEND_LAST); |
| 357 | switch (opcode) { |
| 358 | case OP(SEND_FIRST): |
| 359 | case OP(SEND_ONLY): |
| 360 | case OP(SEND_ONLY_WITH_IMMEDIATE): |
| 361 | goto send_first; |
| 362 | |
| 363 | case OP(RDMA_WRITE_FIRST): |
| 364 | case OP(RDMA_WRITE_ONLY): |
| 365 | case OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE): |
| 366 | goto rdma_first; |
| 367 | |
| 368 | default: |
| 369 | goto drop; |
| 370 | } |
| 371 | } |
| 372 | |
| 373 | /* Check for opcode sequence errors. */ |
| 374 | switch (qp->r_state) { |
| 375 | case OP(SEND_FIRST): |
| 376 | case OP(SEND_MIDDLE): |
| 377 | if (opcode == OP(SEND_MIDDLE) || |
| 378 | opcode == OP(SEND_LAST) || |
| 379 | opcode == OP(SEND_LAST_WITH_IMMEDIATE)) |
| 380 | break; |
| 381 | goto inv; |
| 382 | |
| 383 | case OP(RDMA_WRITE_FIRST): |
| 384 | case OP(RDMA_WRITE_MIDDLE): |
| 385 | if (opcode == OP(RDMA_WRITE_MIDDLE) || |
| 386 | opcode == OP(RDMA_WRITE_LAST) || |
| 387 | opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE)) |
| 388 | break; |
| 389 | goto inv; |
| 390 | |
| 391 | default: |
| 392 | if (opcode == OP(SEND_FIRST) || |
| 393 | opcode == OP(SEND_ONLY) || |
| 394 | opcode == OP(SEND_ONLY_WITH_IMMEDIATE) || |
| 395 | opcode == OP(RDMA_WRITE_FIRST) || |
| 396 | opcode == OP(RDMA_WRITE_ONLY) || |
| 397 | opcode == OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE)) |
| 398 | break; |
| 399 | goto inv; |
| 400 | } |
| 401 | |
Dennis Dalessandro | 54d10c1 | 2016-01-19 14:43:01 -0800 | [diff] [blame] | 402 | if (qp->state == IB_QPS_RTR && !(qp->r_flags & RVT_R_COMM_EST)) |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 403 | qp_comm_est(qp); |
| 404 | |
| 405 | /* OK, process the packet. */ |
| 406 | switch (opcode) { |
| 407 | case OP(SEND_FIRST): |
| 408 | case OP(SEND_ONLY): |
| 409 | case OP(SEND_ONLY_WITH_IMMEDIATE): |
| 410 | send_first: |
Jubin John | e490974 | 2016-02-14 20:22:00 -0800 | [diff] [blame] | 411 | if (test_and_clear_bit(RVT_R_REWIND_SGE, &qp->r_aflags)) { |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 412 | qp->r_sge = qp->s_rdma_read_sge; |
Jubin John | e490974 | 2016-02-14 20:22:00 -0800 | [diff] [blame] | 413 | } else { |
Dennis Dalessandro | ec4274f | 2016-01-19 14:43:44 -0800 | [diff] [blame] | 414 | ret = hfi1_rvt_get_rwqe(qp, 0); |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 415 | if (ret < 0) |
| 416 | goto op_err; |
| 417 | if (!ret) |
| 418 | goto drop; |
| 419 | /* |
| 420 | * qp->s_rdma_read_sge will be the owner |
| 421 | * of the mr references. |
| 422 | */ |
| 423 | qp->s_rdma_read_sge = qp->r_sge; |
| 424 | } |
| 425 | qp->r_rcv_len = 0; |
| 426 | if (opcode == OP(SEND_ONLY)) |
| 427 | goto no_immediate_data; |
| 428 | else if (opcode == OP(SEND_ONLY_WITH_IMMEDIATE)) |
| 429 | goto send_last_imm; |
| 430 | /* FALLTHROUGH */ |
| 431 | case OP(SEND_MIDDLE): |
| 432 | /* Check for invalid length PMTU or posted rwqe len. */ |
| 433 | if (unlikely(tlen != (hdrsize + pmtu + 4))) |
| 434 | goto rewind; |
| 435 | qp->r_rcv_len += pmtu; |
| 436 | if (unlikely(qp->r_rcv_len > qp->r_len)) |
| 437 | goto rewind; |
Dean Luick | 7b0b01a | 2016-02-03 14:35:49 -0800 | [diff] [blame] | 438 | hfi1_copy_sge(&qp->r_sge, data, pmtu, 0, 0); |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 439 | break; |
| 440 | |
| 441 | case OP(SEND_LAST_WITH_IMMEDIATE): |
| 442 | send_last_imm: |
| 443 | wc.ex.imm_data = ohdr->u.imm_data; |
| 444 | wc.wc_flags = IB_WC_WITH_IMM; |
| 445 | goto send_last; |
| 446 | case OP(SEND_LAST): |
| 447 | no_immediate_data: |
| 448 | wc.ex.imm_data = 0; |
| 449 | wc.wc_flags = 0; |
| 450 | send_last: |
| 451 | /* Get the number of bytes the message was padded by. */ |
| 452 | pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3; |
| 453 | /* Check for invalid length. */ |
| 454 | /* LAST len should be >= 1 */ |
| 455 | if (unlikely(tlen < (hdrsize + pad + 4))) |
| 456 | goto rewind; |
| 457 | /* Don't count the CRC. */ |
| 458 | tlen -= (hdrsize + pad + 4); |
| 459 | wc.byte_len = tlen + qp->r_rcv_len; |
| 460 | if (unlikely(wc.byte_len > qp->r_len)) |
| 461 | goto rewind; |
| 462 | wc.opcode = IB_WC_RECV; |
Dean Luick | 7b0b01a | 2016-02-03 14:35:49 -0800 | [diff] [blame] | 463 | hfi1_copy_sge(&qp->r_sge, data, tlen, 0, 0); |
Dennis Dalessandro | ec4274f | 2016-01-19 14:43:44 -0800 | [diff] [blame] | 464 | rvt_put_ss(&qp->s_rdma_read_sge); |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 465 | last_imm: |
| 466 | wc.wr_id = qp->r_wr_id; |
| 467 | wc.status = IB_WC_SUCCESS; |
| 468 | wc.qp = &qp->ibqp; |
| 469 | wc.src_qp = qp->remote_qpn; |
| 470 | wc.slid = qp->remote_ah_attr.dlid; |
| 471 | /* |
| 472 | * It seems that IB mandates the presence of an SL in a |
| 473 | * work completion only for the UD transport (see section |
| 474 | * 11.4.2 of IBTA Vol. 1). |
| 475 | * |
| 476 | * However, the way the SL is chosen below is consistent |
| 477 | * with the way that IB/qib works and is trying avoid |
| 478 | * introducing incompatibilities. |
| 479 | * |
| 480 | * See also OPA Vol. 1, section 9.7.6, and table 9-17. |
| 481 | */ |
| 482 | wc.sl = qp->remote_ah_attr.sl; |
| 483 | /* zero fields that are N/A */ |
| 484 | wc.vendor_err = 0; |
| 485 | wc.pkey_index = 0; |
| 486 | wc.dlid_path_bits = 0; |
| 487 | wc.port_num = 0; |
| 488 | /* Signal completion event if the solicited bit is set. */ |
Dennis Dalessandro | abd712d | 2016-01-19 14:43:22 -0800 | [diff] [blame] | 489 | rvt_cq_enter(ibcq_to_rvtcq(qp->ibqp.recv_cq), &wc, |
| 490 | (ohdr->bth[0] & |
| 491 | cpu_to_be32(IB_BTH_SOLICITED)) != 0); |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 492 | break; |
| 493 | |
| 494 | case OP(RDMA_WRITE_FIRST): |
| 495 | case OP(RDMA_WRITE_ONLY): |
| 496 | case OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE): /* consume RWQE */ |
| 497 | rdma_first: |
| 498 | if (unlikely(!(qp->qp_access_flags & |
| 499 | IB_ACCESS_REMOTE_WRITE))) { |
| 500 | goto drop; |
| 501 | } |
| 502 | reth = &ohdr->u.rc.reth; |
| 503 | qp->r_len = be32_to_cpu(reth->length); |
| 504 | qp->r_rcv_len = 0; |
| 505 | qp->r_sge.sg_list = NULL; |
| 506 | if (qp->r_len != 0) { |
| 507 | u32 rkey = be32_to_cpu(reth->rkey); |
| 508 | u64 vaddr = be64_to_cpu(reth->vaddr); |
| 509 | int ok; |
| 510 | |
| 511 | /* Check rkey */ |
Dennis Dalessandro | 895420d | 2016-01-19 14:42:28 -0800 | [diff] [blame] | 512 | ok = rvt_rkey_ok(qp, &qp->r_sge.sge, qp->r_len, |
| 513 | vaddr, rkey, IB_ACCESS_REMOTE_WRITE); |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 514 | if (unlikely(!ok)) |
| 515 | goto drop; |
| 516 | qp->r_sge.num_sge = 1; |
| 517 | } else { |
| 518 | qp->r_sge.num_sge = 0; |
| 519 | qp->r_sge.sge.mr = NULL; |
| 520 | qp->r_sge.sge.vaddr = NULL; |
| 521 | qp->r_sge.sge.length = 0; |
| 522 | qp->r_sge.sge.sge_length = 0; |
| 523 | } |
Jubin John | e490974 | 2016-02-14 20:22:00 -0800 | [diff] [blame] | 524 | if (opcode == OP(RDMA_WRITE_ONLY)) { |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 525 | goto rdma_last; |
Jubin John | e490974 | 2016-02-14 20:22:00 -0800 | [diff] [blame] | 526 | } else if (opcode == OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE)) { |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 527 | wc.ex.imm_data = ohdr->u.rc.imm_data; |
| 528 | goto rdma_last_imm; |
| 529 | } |
| 530 | /* FALLTHROUGH */ |
| 531 | case OP(RDMA_WRITE_MIDDLE): |
| 532 | /* Check for invalid length PMTU or posted rwqe len. */ |
| 533 | if (unlikely(tlen != (hdrsize + pmtu + 4))) |
| 534 | goto drop; |
| 535 | qp->r_rcv_len += pmtu; |
| 536 | if (unlikely(qp->r_rcv_len > qp->r_len)) |
| 537 | goto drop; |
Dean Luick | 7b0b01a | 2016-02-03 14:35:49 -0800 | [diff] [blame] | 538 | hfi1_copy_sge(&qp->r_sge, data, pmtu, 1, 0); |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 539 | break; |
| 540 | |
| 541 | case OP(RDMA_WRITE_LAST_WITH_IMMEDIATE): |
| 542 | wc.ex.imm_data = ohdr->u.imm_data; |
| 543 | rdma_last_imm: |
| 544 | wc.wc_flags = IB_WC_WITH_IMM; |
| 545 | |
| 546 | /* Get the number of bytes the message was padded by. */ |
| 547 | pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3; |
| 548 | /* Check for invalid length. */ |
| 549 | /* LAST len should be >= 1 */ |
| 550 | if (unlikely(tlen < (hdrsize + pad + 4))) |
| 551 | goto drop; |
| 552 | /* Don't count the CRC. */ |
| 553 | tlen -= (hdrsize + pad + 4); |
| 554 | if (unlikely(tlen + qp->r_rcv_len != qp->r_len)) |
| 555 | goto drop; |
Jubin John | e490974 | 2016-02-14 20:22:00 -0800 | [diff] [blame] | 556 | if (test_and_clear_bit(RVT_R_REWIND_SGE, &qp->r_aflags)) { |
Dennis Dalessandro | ec4274f | 2016-01-19 14:43:44 -0800 | [diff] [blame] | 557 | rvt_put_ss(&qp->s_rdma_read_sge); |
Jubin John | e490974 | 2016-02-14 20:22:00 -0800 | [diff] [blame] | 558 | } else { |
Dennis Dalessandro | ec4274f | 2016-01-19 14:43:44 -0800 | [diff] [blame] | 559 | ret = hfi1_rvt_get_rwqe(qp, 1); |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 560 | if (ret < 0) |
| 561 | goto op_err; |
| 562 | if (!ret) |
| 563 | goto drop; |
| 564 | } |
| 565 | wc.byte_len = qp->r_len; |
| 566 | wc.opcode = IB_WC_RECV_RDMA_WITH_IMM; |
Dean Luick | 7b0b01a | 2016-02-03 14:35:49 -0800 | [diff] [blame] | 567 | hfi1_copy_sge(&qp->r_sge, data, tlen, 1, 0); |
Dennis Dalessandro | ec4274f | 2016-01-19 14:43:44 -0800 | [diff] [blame] | 568 | rvt_put_ss(&qp->r_sge); |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 569 | goto last_imm; |
| 570 | |
| 571 | case OP(RDMA_WRITE_LAST): |
| 572 | rdma_last: |
| 573 | /* Get the number of bytes the message was padded by. */ |
| 574 | pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3; |
| 575 | /* Check for invalid length. */ |
| 576 | /* LAST len should be >= 1 */ |
| 577 | if (unlikely(tlen < (hdrsize + pad + 4))) |
| 578 | goto drop; |
| 579 | /* Don't count the CRC. */ |
| 580 | tlen -= (hdrsize + pad + 4); |
| 581 | if (unlikely(tlen + qp->r_rcv_len != qp->r_len)) |
| 582 | goto drop; |
Dean Luick | 7b0b01a | 2016-02-03 14:35:49 -0800 | [diff] [blame] | 583 | hfi1_copy_sge(&qp->r_sge, data, tlen, 1, 0); |
Dennis Dalessandro | ec4274f | 2016-01-19 14:43:44 -0800 | [diff] [blame] | 584 | rvt_put_ss(&qp->r_sge); |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 585 | break; |
| 586 | |
| 587 | default: |
| 588 | /* Drop packet for unknown opcodes. */ |
| 589 | goto drop; |
| 590 | } |
| 591 | qp->r_psn++; |
| 592 | qp->r_state = opcode; |
| 593 | return; |
| 594 | |
| 595 | rewind: |
Dennis Dalessandro | 54d10c1 | 2016-01-19 14:43:01 -0800 | [diff] [blame] | 596 | set_bit(RVT_R_REWIND_SGE, &qp->r_aflags); |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 597 | qp->r_sge.num_sge = 0; |
| 598 | drop: |
Dennis Dalessandro | 4eb0688 | 2016-01-19 14:42:39 -0800 | [diff] [blame] | 599 | ibp->rvp.n_pkt_drops++; |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 600 | return; |
| 601 | |
| 602 | op_err: |
| 603 | hfi1_rc_error(qp, IB_WC_LOC_QP_OP_ERR); |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 604 | } |