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Thomas Gleixner97873a32019-06-04 10:11:30 +02001// SPDX-License-Identifier: GPL-2.0-only
H. Peter Anvin5e8ddcbe2007-07-11 12:18:52 -07002/* -*- linux-c -*- ------------------------------------------------------- *
3 *
4 * Copyright (C) 1991, 1992 Linus Torvalds
5 * Copyright 2007 rPath, Inc. - All Rights Reserved
H. Peter Anvincf06de72009-04-01 18:20:11 -07006 * Copyright 2009 Intel Corporation; author H. Peter Anvin
H. Peter Anvin5e8ddcbe2007-07-11 12:18:52 -07007 *
H. Peter Anvin5e8ddcbe2007-07-11 12:18:52 -07008 * ----------------------------------------------------------------------- */
9
10/*
H. Peter Anvin5e8ddcbe2007-07-11 12:18:52 -070011 * VESA text modes
12 */
13
14#include "boot.h"
15#include "video.h"
16#include "vesa.h"
Vivek Goyalc041b5a2014-03-18 15:26:37 -040017#include "string.h"
H. Peter Anvin5e8ddcbe2007-07-11 12:18:52 -070018
19/* VESA information */
20static struct vesa_general_info vginfo;
21static struct vesa_mode_info vminfo;
22
roel kluin8bcad302008-10-21 19:49:09 -040023static __videocard video_vesa;
H. Peter Anvin5e8ddcbe2007-07-11 12:18:52 -070024
Pavel Macheke44b7b72008-04-10 23:28:10 +020025#ifndef _WAKEUP
H. Peter Anvin5e8ddcbe2007-07-11 12:18:52 -070026static void vesa_store_mode_params_graphics(void);
Pavel Macheke44b7b72008-04-10 23:28:10 +020027#else /* _WAKEUP */
28static inline void vesa_store_mode_params_graphics(void) {}
29#endif /* _WAKEUP */
H. Peter Anvin5e8ddcbe2007-07-11 12:18:52 -070030
31static int vesa_probe(void)
32{
H. Peter Anvincf06de72009-04-01 18:20:11 -070033 struct biosregs ireg, oreg;
H. Peter Anvin5e8ddcbe2007-07-11 12:18:52 -070034 u16 mode;
35 addr_t mode_ptr;
36 struct mode_info *mi;
37 int nmodes = 0;
38
39 video_vesa.modes = GET_HEAP(struct mode_info, 0);
40
H. Peter Anvincf06de72009-04-01 18:20:11 -070041 initregs(&ireg);
42 ireg.ax = 0x4f00;
43 ireg.di = (size_t)&vginfo;
44 intcall(0x10, &ireg, &oreg);
H. Peter Anvin5e8ddcbe2007-07-11 12:18:52 -070045
Akinobu Mitafebe04d2009-07-01 11:13:07 +090046 if (oreg.ax != 0x004f ||
H. Peter Anvin5e8ddcbe2007-07-11 12:18:52 -070047 vginfo.signature != VESA_MAGIC ||
48 vginfo.version < 0x0102)
49 return 0; /* Not present */
H. Peter Anvin2495fbf2009-06-26 10:53:57 -070050
H. Peter Anvin5e8ddcbe2007-07-11 12:18:52 -070051 set_fs(vginfo.video_mode_ptr.seg);
52 mode_ptr = vginfo.video_mode_ptr.off;
53
54 while ((mode = rdfs16(mode_ptr)) != 0xffff) {
55 mode_ptr += 2;
56
H. Peter Anvine6e1ace2007-10-25 16:09:38 -070057 if (!heap_free(sizeof(struct mode_info)))
H. Peter Anvin5e8ddcbe2007-07-11 12:18:52 -070058 break; /* Heap full, can't save mode info */
59
60 if (mode & ~0x1ff)
61 continue;
62
Jordan Borgner0e96f312018-10-28 12:58:28 +000063 memset(&vminfo, 0, sizeof(vminfo)); /* Just in case... */
H. Peter Anvin5e8ddcbe2007-07-11 12:18:52 -070064
H. Peter Anvincf06de72009-04-01 18:20:11 -070065 ireg.ax = 0x4f01;
66 ireg.cx = mode;
67 ireg.di = (size_t)&vminfo;
68 intcall(0x10, &ireg, &oreg);
H. Peter Anvin5e8ddcbe2007-07-11 12:18:52 -070069
Akinobu Mitafebe04d2009-07-01 11:13:07 +090070 if (oreg.ax != 0x004f)
H. Peter Anvin5e8ddcbe2007-07-11 12:18:52 -070071 continue;
72
73 if ((vminfo.mode_attr & 0x15) == 0x05) {
74 /* Text Mode, TTY BIOS supported,
75 supported by hardware */
76 mi = GET_HEAP(struct mode_info, 1);
H. Peter Anvin1cac5002008-01-30 13:33:02 +010077 mi->mode = mode + VIDEO_FIRST_VESA;
78 mi->depth = 0; /* text */
79 mi->x = vminfo.h_res;
80 mi->y = vminfo.v_res;
H. Peter Anvin5e8ddcbe2007-07-11 12:18:52 -070081 nmodes++;
H. Peter Anvin1cac5002008-01-30 13:33:02 +010082 } else if ((vminfo.mode_attr & 0x99) == 0x99 &&
83 (vminfo.memory_layout == 4 ||
84 vminfo.memory_layout == 6) &&
85 vminfo.memory_planes == 1) {
Michal Januszewski4d31a2b2008-10-15 22:03:51 -070086#ifdef CONFIG_FB_BOOT_VESA_SUPPORT
H. Peter Anvin5e8ddcbe2007-07-11 12:18:52 -070087 /* Graphics mode, color, linear frame buffer
H. Peter Anvin1cac5002008-01-30 13:33:02 +010088 supported. Only register the mode if
89 if framebuffer is configured, however,
Michal Januszewski4d31a2b2008-10-15 22:03:51 -070090 otherwise the user will be left without a screen. */
H. Peter Anvin5e8ddcbe2007-07-11 12:18:52 -070091 mi = GET_HEAP(struct mode_info, 1);
92 mi->mode = mode + VIDEO_FIRST_VESA;
H. Peter Anvin1cac5002008-01-30 13:33:02 +010093 mi->depth = vminfo.bpp;
94 mi->x = vminfo.h_res;
95 mi->y = vminfo.v_res;
H. Peter Anvin5e8ddcbe2007-07-11 12:18:52 -070096 nmodes++;
97#endif
98 }
99 }
100
101 return nmodes;
H. Peter Anvin5e8ddcbe2007-07-11 12:18:52 -0700102}
103
104static int vesa_set_mode(struct mode_info *mode)
105{
H. Peter Anvincf06de72009-04-01 18:20:11 -0700106 struct biosregs ireg, oreg;
H. Peter Anvin5e8ddcbe2007-07-11 12:18:52 -0700107 int is_graphic;
108 u16 vesa_mode = mode->mode - VIDEO_FIRST_VESA;
109
Jordan Borgner0e96f312018-10-28 12:58:28 +0000110 memset(&vminfo, 0, sizeof(vminfo)); /* Just in case... */
H. Peter Anvin5e8ddcbe2007-07-11 12:18:52 -0700111
H. Peter Anvincf06de72009-04-01 18:20:11 -0700112 initregs(&ireg);
113 ireg.ax = 0x4f01;
114 ireg.cx = vesa_mode;
115 ireg.di = (size_t)&vminfo;
116 intcall(0x10, &ireg, &oreg);
H. Peter Anvin5e8ddcbe2007-07-11 12:18:52 -0700117
H. Peter Anvincf06de72009-04-01 18:20:11 -0700118 if (oreg.ax != 0x004f)
H. Peter Anvin5e8ddcbe2007-07-11 12:18:52 -0700119 return -1;
120
121 if ((vminfo.mode_attr & 0x15) == 0x05) {
122 /* It's a supported text mode */
123 is_graphic = 0;
Michal Januszewski4d31a2b2008-10-15 22:03:51 -0700124#ifdef CONFIG_FB_BOOT_VESA_SUPPORT
H. Peter Anvin5e8ddcbe2007-07-11 12:18:52 -0700125 } else if ((vminfo.mode_attr & 0x99) == 0x99) {
126 /* It's a graphics mode with linear frame buffer */
127 is_graphic = 1;
128 vesa_mode |= 0x4000; /* Request linear frame buffer */
Michal Januszewski4d31a2b2008-10-15 22:03:51 -0700129#endif
H. Peter Anvin5e8ddcbe2007-07-11 12:18:52 -0700130 } else {
131 return -1; /* Invalid mode */
132 }
133
134
H. Peter Anvincf06de72009-04-01 18:20:11 -0700135 initregs(&ireg);
136 ireg.ax = 0x4f02;
137 ireg.bx = vesa_mode;
138 intcall(0x10, &ireg, &oreg);
H. Peter Anvin5e8ddcbe2007-07-11 12:18:52 -0700139
H. Peter Anvincf06de72009-04-01 18:20:11 -0700140 if (oreg.ax != 0x004f)
H. Peter Anvin5e8ddcbe2007-07-11 12:18:52 -0700141 return -1;
142
143 graphic_mode = is_graphic;
144 if (!is_graphic) {
145 /* Text mode */
146 force_x = mode->x;
147 force_y = mode->y;
148 do_restore = 1;
149 } else {
150 /* Graphics mode */
151 vesa_store_mode_params_graphics();
152 }
153
154 return 0;
155}
156
157
Pavel Macheke44b7b72008-04-10 23:28:10 +0200158#ifndef _WAKEUP
159
H. Peter Anvin5e8ddcbe2007-07-11 12:18:52 -0700160/* Switch DAC to 8-bit mode */
161static void vesa_dac_set_8bits(void)
162{
H. Peter Anvincf06de72009-04-01 18:20:11 -0700163 struct biosregs ireg, oreg;
H. Peter Anvin5e8ddcbe2007-07-11 12:18:52 -0700164 u8 dac_size = 6;
165
166 /* If possible, switch the DAC to 8-bit mode */
167 if (vginfo.capabilities & 1) {
H. Peter Anvincf06de72009-04-01 18:20:11 -0700168 initregs(&ireg);
169 ireg.ax = 0x4f08;
170 ireg.bh = 0x08;
171 intcall(0x10, &ireg, &oreg);
172 if (oreg.ax == 0x004f)
173 dac_size = oreg.bh;
H. Peter Anvin5e8ddcbe2007-07-11 12:18:52 -0700174 }
175
176 /* Set the color sizes to the DAC size, and offsets to 0 */
H. Peter Anvincf06de72009-04-01 18:20:11 -0700177 boot_params.screen_info.red_size = dac_size;
H. Peter Anvin5e8ddcbe2007-07-11 12:18:52 -0700178 boot_params.screen_info.green_size = dac_size;
H. Peter Anvincf06de72009-04-01 18:20:11 -0700179 boot_params.screen_info.blue_size = dac_size;
180 boot_params.screen_info.rsvd_size = dac_size;
H. Peter Anvin5e8ddcbe2007-07-11 12:18:52 -0700181
H. Peter Anvincf06de72009-04-01 18:20:11 -0700182 boot_params.screen_info.red_pos = 0;
183 boot_params.screen_info.green_pos = 0;
184 boot_params.screen_info.blue_pos = 0;
185 boot_params.screen_info.rsvd_pos = 0;
H. Peter Anvin5e8ddcbe2007-07-11 12:18:52 -0700186}
187
188/* Save the VESA protected mode info */
189static void vesa_store_pm_info(void)
190{
H. Peter Anvincf06de72009-04-01 18:20:11 -0700191 struct biosregs ireg, oreg;
H. Peter Anvin5e8ddcbe2007-07-11 12:18:52 -0700192
H. Peter Anvincf06de72009-04-01 18:20:11 -0700193 initregs(&ireg);
194 ireg.ax = 0x4f0a;
195 intcall(0x10, &ireg, &oreg);
H. Peter Anvin5e8ddcbe2007-07-11 12:18:52 -0700196
H. Peter Anvincf06de72009-04-01 18:20:11 -0700197 if (oreg.ax != 0x004f)
H. Peter Anvin5e8ddcbe2007-07-11 12:18:52 -0700198 return;
199
H. Peter Anvincf06de72009-04-01 18:20:11 -0700200 boot_params.screen_info.vesapm_seg = oreg.es;
201 boot_params.screen_info.vesapm_off = oreg.di;
H. Peter Anvin5e8ddcbe2007-07-11 12:18:52 -0700202}
203
204/*
205 * Save video mode parameters for graphics mode
206 */
207static void vesa_store_mode_params_graphics(void)
208{
209 /* Tell the kernel we're in VESA graphics mode */
Michal Januszewski24073902008-10-05 12:16:04 +0200210 boot_params.screen_info.orig_video_isVGA = VIDEO_TYPE_VLFB;
H. Peter Anvin5e8ddcbe2007-07-11 12:18:52 -0700211
212 /* Mode parameters */
213 boot_params.screen_info.vesa_attributes = vminfo.mode_attr;
214 boot_params.screen_info.lfb_linelength = vminfo.logical_scan;
215 boot_params.screen_info.lfb_width = vminfo.h_res;
216 boot_params.screen_info.lfb_height = vminfo.v_res;
217 boot_params.screen_info.lfb_depth = vminfo.bpp;
218 boot_params.screen_info.pages = vminfo.image_planes;
219 boot_params.screen_info.lfb_base = vminfo.lfb_ptr;
220 memcpy(&boot_params.screen_info.red_size,
221 &vminfo.rmask, 8);
222
223 /* General parameters */
224 boot_params.screen_info.lfb_size = vginfo.total_memory;
225
226 if (vminfo.bpp <= 8)
227 vesa_dac_set_8bits();
228
229 vesa_store_pm_info();
230}
231
232/*
233 * Save EDID information for the kernel; this is invoked, separately,
234 * after mode-setting.
235 */
236void vesa_store_edid(void)
237{
238#ifdef CONFIG_FIRMWARE_EDID
H. Peter Anvincf06de72009-04-01 18:20:11 -0700239 struct biosregs ireg, oreg;
H. Peter Anvin5e8ddcbe2007-07-11 12:18:52 -0700240
241 /* Apparently used as a nonsense token... */
Jordan Borgner0e96f312018-10-28 12:58:28 +0000242 memset(&boot_params.edid_info, 0x13, sizeof(boot_params.edid_info));
H. Peter Anvin5e8ddcbe2007-07-11 12:18:52 -0700243
244 if (vginfo.version < 0x0200)
245 return; /* EDID requires VBE 2.0+ */
246
H. Peter Anvincf06de72009-04-01 18:20:11 -0700247 initregs(&ireg);
248 ireg.ax = 0x4f15; /* VBE DDC */
249 /* ireg.bx = 0x0000; */ /* Report DDC capabilities */
250 /* ireg.cx = 0; */ /* Controller 0 */
251 ireg.es = 0; /* ES:DI must be 0 by spec */
252 intcall(0x10, &ireg, &oreg);
H. Peter Anvin5e8ddcbe2007-07-11 12:18:52 -0700253
H. Peter Anvincf06de72009-04-01 18:20:11 -0700254 if (oreg.ax != 0x004f)
H. Peter Anvin5e8ddcbe2007-07-11 12:18:52 -0700255 return; /* No EDID */
256
257 /* BH = time in seconds to transfer EDD information */
258 /* BL = DDC level supported */
259
H. Peter Anvincf06de72009-04-01 18:20:11 -0700260 ireg.ax = 0x4f15; /* VBE DDC */
261 ireg.bx = 0x0001; /* Read EDID */
262 /* ireg.cx = 0; */ /* Controller 0 */
263 /* ireg.dx = 0; */ /* EDID block number */
264 ireg.es = ds();
265 ireg.di =(size_t)&boot_params.edid_info; /* (ES:)Pointer to block */
266 intcall(0x10, &ireg, &oreg);
H. Peter Anvin5e8ddcbe2007-07-11 12:18:52 -0700267#endif /* CONFIG_FIRMWARE_EDID */
268}
269
Pavel Macheke44b7b72008-04-10 23:28:10 +0200270#endif /* not _WAKEUP */
271
roel kluin8bcad302008-10-21 19:49:09 -0400272static __videocard video_vesa =
H. Peter Anvin5e8ddcbe2007-07-11 12:18:52 -0700273{
274 .card_name = "VESA",
275 .probe = vesa_probe,
276 .set_mode = vesa_set_mode,
277 .xmode_first = VIDEO_FIRST_VESA,
278 .xmode_n = 0x200,
279};