| Sugar Zhang | fc05a5b | 2017-06-13 15:27:46 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Rockchip PDM ALSA SoC Digital Audio Interface(DAI) driver |
| 3 | * |
| 4 | * Copyright (C) 2017 Fuzhou Rockchip Electronics Co., Ltd |
| 5 | * |
| 6 | * This software is licensed under the terms of the GNU General Public |
| 7 | * License version 2, as published by the Free Software Foundation, and |
| 8 | * may be copied, distributed, and modified under those terms. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | */ |
| 16 | |
| 17 | #ifndef _ROCKCHIP_PDM_H |
| 18 | #define _ROCKCHIP_PDM_H |
| 19 | |
| 20 | /* PDM REGS */ |
| 21 | #define PDM_SYSCONFIG (0x0000) |
| 22 | #define PDM_CTRL0 (0x0004) |
| 23 | #define PDM_CTRL1 (0x0008) |
| 24 | #define PDM_CLK_CTRL (0x000c) |
| 25 | #define PDM_HPF_CTRL (0x0010) |
| 26 | #define PDM_FIFO_CTRL (0x0014) |
| 27 | #define PDM_DMA_CTRL (0x0018) |
| 28 | #define PDM_INT_EN (0x001c) |
| 29 | #define PDM_INT_CLR (0x0020) |
| 30 | #define PDM_INT_ST (0x0024) |
| 31 | #define PDM_RXFIFO_DATA (0x0030) |
| 32 | #define PDM_DATA_VALID (0x0054) |
| 33 | #define PDM_VERSION (0x0058) |
| 34 | |
| 35 | /* PDM_SYSCONFIG */ |
| 36 | #define PDM_RX_MASK (0x1 << 2) |
| 37 | #define PDM_RX_START (0x1 << 2) |
| 38 | #define PDM_RX_STOP (0x0 << 2) |
| 39 | #define PDM_RX_CLR_MASK (0x1 << 0) |
| 40 | #define PDM_RX_CLR_WR (0x1 << 0) |
| 41 | #define PDM_RX_CLR_DONE (0x0 << 0) |
| 42 | |
| 43 | /* PDM CTRL0 */ |
| 44 | #define PDM_PATH_MSK (0xf << 27) |
| 45 | #define PDM_PATH3_EN BIT(30) |
| 46 | #define PDM_PATH2_EN BIT(29) |
| 47 | #define PDM_PATH1_EN BIT(28) |
| 48 | #define PDM_PATH0_EN BIT(27) |
| 49 | #define PDM_HWT_EN BIT(26) |
| 50 | #define PDM_VDW_MSK (0x1f << 0) |
| 51 | #define PDM_VDW(X) ((X - 1) << 0) |
| 52 | |
| 53 | /* PDM CLK CTRL */ |
| 54 | #define PDM_CLK_MSK BIT(5) |
| 55 | #define PDM_CLK_EN BIT(5) |
| 56 | #define PDM_CLK_DIS (0x0 << 5) |
| 57 | #define PDM_CKP_MSK BIT(3) |
| 58 | #define PDM_CKP_NORMAL (0x0 << 3) |
| 59 | #define PDM_CKP_INVERTED BIT(3) |
| 60 | #define PDM_DS_RATIO_MSK (0x7 << 0) |
| 61 | #define PDM_CLK_320FS (0x0 << 0) |
| 62 | #define PDM_CLK_640FS (0x1 << 0) |
| 63 | #define PDM_CLK_1280FS (0x2 << 0) |
| 64 | #define PDM_CLK_2560FS (0x3 << 0) |
| 65 | #define PDM_CLK_5120FS (0x4 << 0) |
| 66 | |
| 67 | /* PDM HPF CTRL */ |
| 68 | #define PDM_HPF_LE BIT(3) |
| 69 | #define PDM_HPF_RE BIT(2) |
| 70 | #define PDM_HPF_CF_MSK (0x3 << 0) |
| 71 | #define PDM_HPF_3P79HZ (0x0 << 0) |
| 72 | #define PDM_HPF_60HZ (0x1 << 0) |
| 73 | #define PDM_HPF_243HZ (0x2 << 0) |
| 74 | #define PDM_HPF_493HZ (0x3 << 0) |
| 75 | |
| 76 | /* PDM DMA CTRL */ |
| 77 | #define PDM_DMA_RD_MSK BIT(8) |
| 78 | #define PDM_DMA_RD_EN BIT(8) |
| 79 | #define PDM_DMA_RD_DIS (0x0 << 8) |
| 80 | #define PDM_DMA_RDL_MSK (0x7f << 0) |
| 81 | #define PDM_DMA_RDL(X) ((X - 1) << 0) |
| 82 | |
| 83 | #endif /* _ROCKCHIP_PDM_H */ |