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Tomi Valkeinen559d6702009-11-03 11:23:50 +02001/*
Tomi Valkeinen559d6702009-11-03 11:23:50 +02002 * Copyright (C) 2008 Nokia Corporation
3 * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published by
7 * the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program. If not, see <http://www.gnu.org/licenses/>.
16 */
17
Tomi Valkeinena0b38cc2011-05-11 14:05:07 +030018#ifndef __OMAP_OMAPDSS_H
19#define __OMAP_OMAPDSS_H
Tomi Valkeinen559d6702009-11-03 11:23:50 +020020
21#include <linux/list.h>
22#include <linux/kobject.h>
23#include <linux/device.h>
Tomi Valkeinen559d6702009-11-03 11:23:50 +020024
25#define DISPC_IRQ_FRAMEDONE (1 << 0)
26#define DISPC_IRQ_VSYNC (1 << 1)
27#define DISPC_IRQ_EVSYNC_EVEN (1 << 2)
28#define DISPC_IRQ_EVSYNC_ODD (1 << 3)
29#define DISPC_IRQ_ACBIAS_COUNT_STAT (1 << 4)
30#define DISPC_IRQ_PROG_LINE_NUM (1 << 5)
31#define DISPC_IRQ_GFX_FIFO_UNDERFLOW (1 << 6)
32#define DISPC_IRQ_GFX_END_WIN (1 << 7)
33#define DISPC_IRQ_PAL_GAMMA_MASK (1 << 8)
34#define DISPC_IRQ_OCP_ERR (1 << 9)
35#define DISPC_IRQ_VID1_FIFO_UNDERFLOW (1 << 10)
36#define DISPC_IRQ_VID1_END_WIN (1 << 11)
37#define DISPC_IRQ_VID2_FIFO_UNDERFLOW (1 << 12)
38#define DISPC_IRQ_VID2_END_WIN (1 << 13)
39#define DISPC_IRQ_SYNC_LOST (1 << 14)
40#define DISPC_IRQ_SYNC_LOST_DIGIT (1 << 15)
41#define DISPC_IRQ_WAKEUP (1 << 16)
Sumit Semwal2a205f32010-12-02 11:27:12 +000042#define DISPC_IRQ_SYNC_LOST2 (1 << 17)
43#define DISPC_IRQ_VSYNC2 (1 << 18)
44#define DISPC_IRQ_ACBIAS_COUNT_STAT2 (1 << 21)
45#define DISPC_IRQ_FRAMEDONE2 (1 << 22)
Tomi Valkeinen559d6702009-11-03 11:23:50 +020046
47struct omap_dss_device;
48struct omap_overlay_manager;
49
50enum omap_display_type {
51 OMAP_DISPLAY_TYPE_NONE = 0,
52 OMAP_DISPLAY_TYPE_DPI = 1 << 0,
53 OMAP_DISPLAY_TYPE_DBI = 1 << 1,
54 OMAP_DISPLAY_TYPE_SDI = 1 << 2,
55 OMAP_DISPLAY_TYPE_DSI = 1 << 3,
56 OMAP_DISPLAY_TYPE_VENC = 1 << 4,
Mythri P Kb1196012011-03-08 17:15:54 +053057 OMAP_DISPLAY_TYPE_HDMI = 1 << 5,
Tomi Valkeinen559d6702009-11-03 11:23:50 +020058};
59
60enum omap_plane {
61 OMAP_DSS_GFX = 0,
62 OMAP_DSS_VIDEO1 = 1,
63 OMAP_DSS_VIDEO2 = 2
64};
65
66enum omap_channel {
67 OMAP_DSS_CHANNEL_LCD = 0,
68 OMAP_DSS_CHANNEL_DIGIT = 1,
Sumit Semwal8613b002010-12-02 11:27:09 +000069 OMAP_DSS_CHANNEL_LCD2 = 2,
Tomi Valkeinen559d6702009-11-03 11:23:50 +020070};
71
72enum omap_color_mode {
73 OMAP_DSS_COLOR_CLUT1 = 1 << 0, /* BITMAP 1 */
74 OMAP_DSS_COLOR_CLUT2 = 1 << 1, /* BITMAP 2 */
75 OMAP_DSS_COLOR_CLUT4 = 1 << 2, /* BITMAP 4 */
76 OMAP_DSS_COLOR_CLUT8 = 1 << 3, /* BITMAP 8 */
77 OMAP_DSS_COLOR_RGB12U = 1 << 4, /* RGB12, 16-bit container */
78 OMAP_DSS_COLOR_ARGB16 = 1 << 5, /* ARGB16 */
79 OMAP_DSS_COLOR_RGB16 = 1 << 6, /* RGB16 */
80 OMAP_DSS_COLOR_RGB24U = 1 << 7, /* RGB24, 32-bit container */
81 OMAP_DSS_COLOR_RGB24P = 1 << 8, /* RGB24, 24-bit container */
82 OMAP_DSS_COLOR_YUV2 = 1 << 9, /* YUV2 4:2:2 co-sited */
83 OMAP_DSS_COLOR_UYVY = 1 << 10, /* UYVY 4:2:2 co-sited */
84 OMAP_DSS_COLOR_ARGB32 = 1 << 11, /* ARGB32 */
85 OMAP_DSS_COLOR_RGBA32 = 1 << 12, /* RGBA32 */
86 OMAP_DSS_COLOR_RGBX32 = 1 << 13, /* RGBx32 */
Amber Jainf20e4222011-05-19 19:47:50 +053087 OMAP_DSS_COLOR_NV12 = 1 << 14, /* NV12 format: YUV 4:2:0 */
88 OMAP_DSS_COLOR_RGBA16 = 1 << 15, /* RGBA16 - 4444 */
89 OMAP_DSS_COLOR_RGBX16 = 1 << 16, /* RGBx16 - 4444 */
90 OMAP_DSS_COLOR_ARGB16_1555 = 1 << 17, /* ARGB16 - 1555 */
91 OMAP_DSS_COLOR_XRGB16_1555 = 1 << 18, /* xRGB16 - 1555 */
Tomi Valkeinen559d6702009-11-03 11:23:50 +020092};
93
94enum omap_lcd_display_type {
95 OMAP_DSS_LCD_DISPLAY_STN,
96 OMAP_DSS_LCD_DISPLAY_TFT,
97};
98
99enum omap_dss_load_mode {
100 OMAP_DSS_LOAD_CLUT_AND_FRAME = 0,
101 OMAP_DSS_LOAD_CLUT_ONLY = 1,
102 OMAP_DSS_LOAD_FRAME_ONLY = 2,
103 OMAP_DSS_LOAD_CLUT_ONCE_FRAME = 3,
104};
105
106enum omap_dss_trans_key_type {
107 OMAP_DSS_COLOR_KEY_GFX_DST = 0,
108 OMAP_DSS_COLOR_KEY_VID_SRC = 1,
109};
110
111enum omap_rfbi_te_mode {
112 OMAP_DSS_RFBI_TE_MODE_1 = 1,
113 OMAP_DSS_RFBI_TE_MODE_2 = 2,
114};
115
116enum omap_panel_config {
117 OMAP_DSS_LCD_IVS = 1<<0,
118 OMAP_DSS_LCD_IHS = 1<<1,
119 OMAP_DSS_LCD_IPC = 1<<2,
120 OMAP_DSS_LCD_IEO = 1<<3,
121 OMAP_DSS_LCD_RF = 1<<4,
122 OMAP_DSS_LCD_ONOFF = 1<<5,
123
124 OMAP_DSS_LCD_TFT = 1<<20,
125};
126
127enum omap_dss_venc_type {
128 OMAP_DSS_VENC_TYPE_COMPOSITE,
129 OMAP_DSS_VENC_TYPE_SVIDEO,
130};
131
132enum omap_display_caps {
133 OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE = 1 << 0,
134 OMAP_DSS_DISPLAY_CAP_TEAR_ELIM = 1 << 1,
135};
136
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200137enum omap_dss_display_state {
138 OMAP_DSS_DISPLAY_DISABLED = 0,
139 OMAP_DSS_DISPLAY_ACTIVE,
140 OMAP_DSS_DISPLAY_SUSPENDED,
141};
142
143/* XXX perhaps this should be removed */
144enum omap_dss_overlay_managers {
145 OMAP_DSS_OVL_MGR_LCD,
146 OMAP_DSS_OVL_MGR_TV,
Sumit Semwal8613b002010-12-02 11:27:09 +0000147 OMAP_DSS_OVL_MGR_LCD2,
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200148};
149
150enum omap_dss_rotation_type {
151 OMAP_DSS_ROT_DMA = 0,
152 OMAP_DSS_ROT_VRFB = 1,
153};
154
155/* clockwise rotation angle */
156enum omap_dss_rotation_angle {
157 OMAP_DSS_ROT_0 = 0,
158 OMAP_DSS_ROT_90 = 1,
159 OMAP_DSS_ROT_180 = 2,
160 OMAP_DSS_ROT_270 = 3,
161};
162
163enum omap_overlay_caps {
164 OMAP_DSS_OVL_CAP_SCALE = 1 << 0,
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200165};
166
167enum omap_overlay_manager_caps {
Tomi Valkeinen4a9e78a2011-08-15 11:22:21 +0300168 OMAP_DSS_DUMMY_VALUE, /* add a dummy value to prevent compiler error */
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200169};
170
Archit Taneja89a35e52011-04-12 13:52:23 +0530171enum omap_dss_clk_source {
172 OMAP_DSS_CLK_SRC_FCK = 0, /* OMAP2/3: DSS1_ALWON_FCLK
173 * OMAP4: DSS_FCLK */
174 OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC, /* OMAP3: DSI1_PLL_FCLK
175 * OMAP4: PLL1_CLK1 */
176 OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI, /* OMAP3: DSI2_PLL_FCLK
177 * OMAP4: PLL1_CLK2 */
Archit Taneja5a8b5722011-05-12 17:26:29 +0530178 OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC, /* OMAP4: PLL2_CLK1 */
179 OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI, /* OMAP4: PLL2_CLK2 */
Archit Taneja89a35e52011-04-12 13:52:23 +0530180};
181
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200182/* RFBI */
183
184struct rfbi_timings {
185 int cs_on_time;
186 int cs_off_time;
187 int we_on_time;
188 int we_off_time;
189 int re_on_time;
190 int re_off_time;
191 int we_cycle_time;
192 int re_cycle_time;
193 int cs_pulse_width;
194 int access_time;
195
196 int clk_div;
197
198 u32 tim[5]; /* set by rfbi_convert_timings() */
199
200 int converted;
201};
202
203void omap_rfbi_write_command(const void *buf, u32 len);
204void omap_rfbi_read_data(void *buf, u32 len);
205void omap_rfbi_write_data(const void *buf, u32 len);
206void omap_rfbi_write_pixels(const void __iomem *buf, int scr_width,
207 u16 x, u16 y,
208 u16 w, u16 h);
209int omap_rfbi_enable_te(bool enable, unsigned line);
210int omap_rfbi_setup_te(enum omap_rfbi_te_mode mode,
211 unsigned hs_pulse_time, unsigned vs_pulse_time,
212 int hs_pol_inv, int vs_pol_inv, int extif_div);
Tomi Valkeinen773139f2011-04-21 19:50:31 +0300213void rfbi_bus_lock(void);
214void rfbi_bus_unlock(void);
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200215
216/* DSI */
Archit Taneja1ffefe72011-05-12 17:26:24 +0530217void dsi_bus_lock(struct omap_dss_device *dssdev);
218void dsi_bus_unlock(struct omap_dss_device *dssdev);
219int dsi_vc_dcs_write(struct omap_dss_device *dssdev, int channel, u8 *data,
220 int len);
221int dsi_vc_dcs_write_0(struct omap_dss_device *dssdev, int channel,
222 u8 dcs_cmd);
223int dsi_vc_dcs_write_1(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd,
224 u8 param);
225int dsi_vc_dcs_write_nosync(struct omap_dss_device *dssdev, int channel,
226 u8 *data, int len);
227int dsi_vc_dcs_read(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd,
228 u8 *buf, int buflen);
229int dsi_vc_dcs_read_1(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd,
230 u8 *data);
231int dsi_vc_dcs_read_2(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd,
232 u8 *data1, u8 *data2);
233int dsi_vc_set_max_rx_packet_size(struct omap_dss_device *dssdev, int channel,
234 u16 len);
235int dsi_vc_send_null(struct omap_dss_device *dssdev, int channel);
236int dsi_vc_send_bta_sync(struct omap_dss_device *dssdev, int channel);
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200237
238/* Board specific data */
239struct omap_dss_board_info {
Tomi Valkeinenaac927c2011-05-23 15:46:54 +0300240 int (*get_context_loss_count)(struct device *dev);
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200241 int num_devices;
242 struct omap_dss_device **devices;
243 struct omap_dss_device *default_device;
Tomi Valkeinen5bc416c2011-06-15 15:21:12 +0300244 int (*dsi_enable_pads)(int dsi_id, unsigned lane_mask);
245 void (*dsi_disable_pads)(int dsi_id, unsigned lane_mask);
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200246};
247
Sumit Semwalb7ee79a2011-01-24 06:21:54 +0000248#if defined(CONFIG_OMAP2_DSS_MODULE) || defined(CONFIG_OMAP2_DSS)
249/* Init with the board info */
250extern int omap_display_init(struct omap_dss_board_info *board_data);
251#else
252static inline int omap_display_init(struct omap_dss_board_info *board_data)
253{
254 return 0;
255}
256#endif
257
Senthilvadivu Guruswamycf07f532011-01-24 06:21:56 +0000258struct omap_display_platform_data {
259 struct omap_dss_board_info *board_data;
260 /* TODO: Additional members to be added when PM is considered */
261};
262
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200263struct omap_video_timings {
264 /* Unit: pixels */
265 u16 x_res;
266 /* Unit: pixels */
267 u16 y_res;
268 /* Unit: KHz */
269 u32 pixel_clock;
270 /* Unit: pixel clocks */
271 u16 hsw; /* Horizontal synchronization pulse width */
272 /* Unit: pixel clocks */
273 u16 hfp; /* Horizontal front porch */
274 /* Unit: pixel clocks */
275 u16 hbp; /* Horizontal back porch */
276 /* Unit: line clocks */
277 u16 vsw; /* Vertical synchronization pulse width */
278 /* Unit: line clocks */
279 u16 vfp; /* Vertical front porch */
280 /* Unit: line clocks */
281 u16 vbp; /* Vertical back porch */
282};
283
284#ifdef CONFIG_OMAP2_DSS_VENC
285/* Hardcoded timings for tv modes. Venc only uses these to
286 * identify the mode, and does not actually use the configs
287 * itself. However, the configs should be something that
288 * a normal monitor can also show */
Tobias Klauser5a1819e2010-05-20 17:12:52 +0200289extern const struct omap_video_timings omap_dss_pal_timings;
290extern const struct omap_video_timings omap_dss_ntsc_timings;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200291#endif
292
Tomi Valkeinen3c07cae2011-06-21 09:34:30 +0300293struct omap_dss_cpr_coefs {
294 s16 rr, rg, rb;
295 s16 gr, gg, gb;
296 s16 br, bg, bb;
297};
298
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200299struct omap_overlay_info {
300 bool enabled;
301
302 u32 paddr;
303 void __iomem *vaddr;
Amber Jain0d66cbb2011-05-19 19:47:54 +0530304 u32 p_uv_addr; /* for NV12 format */
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200305 u16 screen_width;
306 u16 width;
307 u16 height;
308 enum omap_color_mode color_mode;
309 u8 rotation;
310 enum omap_dss_rotation_type rotation_type;
311 bool mirror;
312
313 u16 pos_x;
314 u16 pos_y;
315 u16 out_width; /* if 0, out_width == width */
316 u16 out_height; /* if 0, out_height == height */
317 u8 global_alpha;
Rajkumar Nfd28a392010-11-04 12:28:42 +0100318 u8 pre_mult_alpha;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200319};
320
321struct omap_overlay {
322 struct kobject kobj;
323 struct list_head list;
324
325 /* static fields */
326 const char *name;
Tomi Valkeinen4a9e78a2011-08-15 11:22:21 +0300327 enum omap_plane id;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200328 enum omap_color_mode supported_modes;
329 enum omap_overlay_caps caps;
330
331 /* dynamic fields */
332 struct omap_overlay_manager *manager;
333 struct omap_overlay_info info;
334
Tomi Valkeinen8fa80312011-08-16 12:56:19 +0300335 bool manager_changed;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200336 /* if true, info has been changed, but not applied() yet */
337 bool info_dirty;
338
339 int (*set_manager)(struct omap_overlay *ovl,
340 struct omap_overlay_manager *mgr);
341 int (*unset_manager)(struct omap_overlay *ovl);
342
343 int (*set_overlay_info)(struct omap_overlay *ovl,
344 struct omap_overlay_info *info);
345 void (*get_overlay_info)(struct omap_overlay *ovl,
346 struct omap_overlay_info *info);
347
348 int (*wait_for_go)(struct omap_overlay *ovl);
349};
350
351struct omap_overlay_manager_info {
352 u32 default_color;
353
354 enum omap_dss_trans_key_type trans_key_type;
355 u32 trans_key;
356 bool trans_enabled;
357
358 bool alpha_enabled;
Tomi Valkeinen3c07cae2011-06-21 09:34:30 +0300359
360 bool cpr_enable;
361 struct omap_dss_cpr_coefs cpr_coefs;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200362};
363
364struct omap_overlay_manager {
365 struct kobject kobj;
366 struct list_head list;
367
368 /* static fields */
369 const char *name;
Tomi Valkeinen4a9e78a2011-08-15 11:22:21 +0300370 enum omap_channel id;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200371 enum omap_overlay_manager_caps caps;
372 int num_overlays;
373 struct omap_overlay **overlays;
374 enum omap_display_type supported_displays;
375
376 /* dynamic fields */
377 struct omap_dss_device *device;
378 struct omap_overlay_manager_info info;
379
380 bool device_changed;
381 /* if true, info has been changed but not applied() yet */
382 bool info_dirty;
383
384 int (*set_device)(struct omap_overlay_manager *mgr,
385 struct omap_dss_device *dssdev);
386 int (*unset_device)(struct omap_overlay_manager *mgr);
387
388 int (*set_manager_info)(struct omap_overlay_manager *mgr,
389 struct omap_overlay_manager_info *info);
390 void (*get_manager_info)(struct omap_overlay_manager *mgr,
391 struct omap_overlay_manager_info *info);
392
393 int (*apply)(struct omap_overlay_manager *mgr);
394 int (*wait_for_go)(struct omap_overlay_manager *mgr);
Tomi Valkeinen3f71cbe2010-01-08 17:06:04 +0200395 int (*wait_for_vsync)(struct omap_overlay_manager *mgr);
Tomi Valkeinena2faee82010-01-08 17:14:53 +0200396
397 int (*enable)(struct omap_overlay_manager *mgr);
398 int (*disable)(struct omap_overlay_manager *mgr);
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200399};
400
401struct omap_dss_device {
402 struct device dev;
403
404 enum omap_display_type type;
405
Sumit Semwal18faa1b2010-12-02 11:27:14 +0000406 enum omap_channel channel;
407
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200408 union {
409 struct {
410 u8 data_lines;
411 } dpi;
412
413 struct {
414 u8 channel;
415 u8 data_lines;
416 } rfbi;
417
418 struct {
419 u8 datapairs;
420 } sdi;
421
422 struct {
423 u8 clk_lane;
424 u8 clk_pol;
425 u8 data1_lane;
426 u8 data1_pol;
427 u8 data2_lane;
428 u8 data2_pol;
Archit Taneja75d72472011-05-16 15:17:08 +0530429 u8 data3_lane;
430 u8 data3_pol;
431 u8 data4_lane;
432 u8 data4_pol;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200433
Archit Tanejaa72b64b2011-05-12 17:26:26 +0530434 int module;
435
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200436 bool ext_te;
437 u8 ext_te_gpio;
438 } dsi;
439
440 struct {
441 enum omap_dss_venc_type type;
442 bool invert_polarity;
443 } venc;
444 } phy;
445
446 struct {
Tomi Valkeinenc6940a32011-02-22 13:36:10 +0200447 struct {
Archit Tanejae8881662011-04-12 13:52:24 +0530448 struct {
449 u16 lck_div;
450 u16 pck_div;
451 enum omap_dss_clk_source lcd_clk_src;
452 } channel;
453
454 enum omap_dss_clk_source dispc_fclk_src;
Tomi Valkeinenc6940a32011-02-22 13:36:10 +0200455 } dispc;
456
457 struct {
458 u16 regn;
459 u16 regm;
460 u16 regm_dispc;
461 u16 regm_dsi;
462
463 u16 lp_clk_div;
Archit Tanejae8881662011-04-12 13:52:24 +0530464 enum omap_dss_clk_source dsi_fclk_src;
Tomi Valkeinenc6940a32011-02-22 13:36:10 +0200465 } dsi;
Archit Taneja6cb07b22011-04-12 13:52:25 +0530466
467 struct {
468 u16 regn;
469 u16 regm2;
470 } hdmi;
Tomi Valkeinenc6940a32011-02-22 13:36:10 +0200471 } clocks;
472
473 struct {
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200474 struct omap_video_timings timings;
475
476 int acbi; /* ac-bias pin transitions per interrupt */
477 /* Unit: line clocks */
478 int acb; /* ac-bias pin frequency */
479
480 enum omap_panel_config config;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200481 } panel;
482
483 struct {
484 u8 pixel_size;
485 struct rfbi_timings rfbi_timings;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200486 } ctrl;
487
488 int reset_gpio;
489
490 int max_backlight_level;
491
492 const char *name;
493
494 /* used to match device to driver */
495 const char *driver_name;
496
497 void *data;
498
499 struct omap_dss_driver *driver;
500
501 /* helper variable for driver suspend/resume */
502 bool activate_after_resume;
503
504 enum omap_display_caps caps;
505
506 struct omap_overlay_manager *manager;
507
508 enum omap_dss_display_state state;
509
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200510 /* platform specific */
511 int (*platform_enable)(struct omap_dss_device *dssdev);
512 void (*platform_disable)(struct omap_dss_device *dssdev);
513 int (*set_backlight)(struct omap_dss_device *dssdev, int level);
514 int (*get_backlight)(struct omap_dss_device *dssdev);
515};
516
517struct omap_dss_driver {
518 struct device_driver driver;
519
520 int (*probe)(struct omap_dss_device *);
521 void (*remove)(struct omap_dss_device *);
522
523 int (*enable)(struct omap_dss_device *display);
524 void (*disable)(struct omap_dss_device *display);
525 int (*suspend)(struct omap_dss_device *display);
526 int (*resume)(struct omap_dss_device *display);
527 int (*run_test)(struct omap_dss_device *display, int test);
528
Tomi Valkeinen18946f62010-01-12 14:16:41 +0200529 int (*update)(struct omap_dss_device *dssdev,
530 u16 x, u16 y, u16 w, u16 h);
531 int (*sync)(struct omap_dss_device *dssdev);
532
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200533 int (*enable_te)(struct omap_dss_device *dssdev, bool enable);
Tomi Valkeinen225b6502010-01-11 15:11:01 +0200534 int (*get_te)(struct omap_dss_device *dssdev);
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200535
536 u8 (*get_rotate)(struct omap_dss_device *dssdev);
537 int (*set_rotate)(struct omap_dss_device *dssdev, u8 rotate);
538
539 bool (*get_mirror)(struct omap_dss_device *dssdev);
540 int (*set_mirror)(struct omap_dss_device *dssdev, bool enable);
541
542 int (*memory_read)(struct omap_dss_device *dssdev,
543 void *buf, size_t size,
544 u16 x, u16 y, u16 w, u16 h);
Tomi Valkeinen96adcec2010-01-11 13:54:33 +0200545
546 void (*get_resolution)(struct omap_dss_device *dssdev,
547 u16 *xres, u16 *yres);
Jani Nikula7a0987b2010-06-16 15:26:36 +0300548 void (*get_dimensions)(struct omap_dss_device *dssdev,
549 u32 *width, u32 *height);
Tomi Valkeinena2699502010-01-11 14:33:40 +0200550 int (*get_recommended_bpp)(struct omap_dss_device *dssdev);
Tomi Valkeinen36511312010-01-19 15:53:16 +0200551
Tomi Valkeinen69b20482010-01-20 12:11:25 +0200552 int (*check_timings)(struct omap_dss_device *dssdev,
553 struct omap_video_timings *timings);
554 void (*set_timings)(struct omap_dss_device *dssdev,
555 struct omap_video_timings *timings);
556 void (*get_timings)(struct omap_dss_device *dssdev,
557 struct omap_video_timings *timings);
558
Tomi Valkeinen36511312010-01-19 15:53:16 +0200559 int (*set_wss)(struct omap_dss_device *dssdev, u32 wss);
560 u32 (*get_wss)(struct omap_dss_device *dssdev);
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200561};
562
563int omap_dss_register_driver(struct omap_dss_driver *);
564void omap_dss_unregister_driver(struct omap_dss_driver *);
565
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200566void omap_dss_get_device(struct omap_dss_device *dssdev);
567void omap_dss_put_device(struct omap_dss_device *dssdev);
568#define for_each_dss_dev(d) while ((d = omap_dss_get_next_device(d)) != NULL)
569struct omap_dss_device *omap_dss_get_next_device(struct omap_dss_device *from);
570struct omap_dss_device *omap_dss_find_device(void *data,
571 int (*match)(struct omap_dss_device *dssdev, void *data));
572
573int omap_dss_start_device(struct omap_dss_device *dssdev);
574void omap_dss_stop_device(struct omap_dss_device *dssdev);
575
576int omap_dss_get_num_overlay_managers(void);
577struct omap_overlay_manager *omap_dss_get_overlay_manager(int num);
578
579int omap_dss_get_num_overlays(void);
580struct omap_overlay *omap_dss_get_overlay(int num);
581
Tomi Valkeinen96adcec2010-01-11 13:54:33 +0200582void omapdss_default_get_resolution(struct omap_dss_device *dssdev,
583 u16 *xres, u16 *yres);
Tomi Valkeinena2699502010-01-11 14:33:40 +0200584int omapdss_default_get_recommended_bpp(struct omap_dss_device *dssdev);
585
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200586typedef void (*omap_dispc_isr_t) (void *arg, u32 mask);
587int omap_dispc_register_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
588int omap_dispc_unregister_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
589
590int omap_dispc_wait_for_irq_timeout(u32 irqmask, unsigned long timeout);
591int omap_dispc_wait_for_irq_interruptible_timeout(u32 irqmask,
592 unsigned long timeout);
593
594#define to_dss_driver(x) container_of((x), struct omap_dss_driver, driver)
595#define to_dss_device(x) container_of((x), struct omap_dss_device, dev)
596
Archit Taneja1ffefe72011-05-12 17:26:24 +0530597void omapdss_dsi_vc_enable_hs(struct omap_dss_device *dssdev, int channel,
598 bool enable);
Tomi Valkeinen225b6502010-01-11 15:11:01 +0200599int omapdss_dsi_enable_te(struct omap_dss_device *dssdev, bool enable);
Tomi Valkeinen61140c92010-01-12 16:00:30 +0200600
Tomi Valkeinen18946f62010-01-12 14:16:41 +0200601int omap_dsi_prepare_update(struct omap_dss_device *dssdev,
Tomi Valkeinen26a8c252010-06-09 15:31:34 +0300602 u16 *x, u16 *y, u16 *w, u16 *h,
603 bool enlarge_update_area);
Tomi Valkeinen18946f62010-01-12 14:16:41 +0200604int omap_dsi_update(struct omap_dss_device *dssdev,
605 int channel,
606 u16 x, u16 y, u16 w, u16 h,
607 void (*callback)(int, void *), void *data);
Archit Taneja5ee3c142011-03-02 12:35:53 +0530608int omap_dsi_request_vc(struct omap_dss_device *dssdev, int *channel);
609int omap_dsi_set_vc_id(struct omap_dss_device *dssdev, int channel, int vc_id);
610void omap_dsi_release_vc(struct omap_dss_device *dssdev, int channel);
Tomi Valkeinen18946f62010-01-12 14:16:41 +0200611
Tomi Valkeinen37ac60e2010-01-12 15:12:07 +0200612int omapdss_dsi_display_enable(struct omap_dss_device *dssdev);
Tomi Valkeinen2a89dc12010-07-30 12:39:34 +0300613void omapdss_dsi_display_disable(struct omap_dss_device *dssdev,
Tomi Valkeinen22d6d672010-10-11 11:33:30 +0300614 bool disconnect_lanes, bool enter_ulps);
Tomi Valkeinen37ac60e2010-01-12 15:12:07 +0200615
616int omapdss_dpi_display_enable(struct omap_dss_device *dssdev);
617void omapdss_dpi_display_disable(struct omap_dss_device *dssdev);
Tomi Valkeinen69b20482010-01-20 12:11:25 +0200618void dpi_set_timings(struct omap_dss_device *dssdev,
619 struct omap_video_timings *timings);
620int dpi_check_timings(struct omap_dss_device *dssdev,
621 struct omap_video_timings *timings);
Tomi Valkeinen37ac60e2010-01-12 15:12:07 +0200622
623int omapdss_sdi_display_enable(struct omap_dss_device *dssdev);
624void omapdss_sdi_display_disable(struct omap_dss_device *dssdev);
625
626int omapdss_rfbi_display_enable(struct omap_dss_device *dssdev);
627void omapdss_rfbi_display_disable(struct omap_dss_device *dssdev);
Tomi Valkeinen18946f62010-01-12 14:16:41 +0200628int omap_rfbi_prepare_update(struct omap_dss_device *dssdev,
629 u16 *x, u16 *y, u16 *w, u16 *h);
630int omap_rfbi_update(struct omap_dss_device *dssdev,
631 u16 x, u16 y, u16 w, u16 h,
632 void (*callback)(void *), void *data);
Tomi Valkeinen1d5952a2011-04-29 15:57:01 +0300633int omap_rfbi_configure(struct omap_dss_device *dssdev, int pixel_size,
634 int data_lines);
Tomi Valkeinen18946f62010-01-12 14:16:41 +0200635
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200636#endif