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David Brownelle58b9e22008-02-04 22:28:25 -08001/*
Lars Poeschel4e47f912014-01-16 11:44:15 +01002 * MCP23S08 SPI/I2C GPIO gpio expander driver
3 *
4 * The inputs and outputs of the mcp23s08, mcp23s17, mcp23008 and mcp23017 are
5 * supported.
6 * For the I2C versions of the chips (mcp23008 and mcp23017) generation of
7 * interrupts is also supported.
8 * The hardware of the SPI versions of the chips (mcp23s08 and mcp23s17) is
9 * also capable of generating interrupts, but the linux driver does not
10 * support that yet.
David Brownelle58b9e22008-02-04 22:28:25 -080011 */
12
13#include <linux/kernel.h>
14#include <linux/device.h>
David Brownelle58b9e22008-02-04 22:28:25 -080015#include <linux/mutex.h>
Paul Gortmakerbb207ef2011-07-03 13:38:09 -040016#include <linux/module.h>
H Hartley Sweetend120c172009-09-22 16:46:37 -070017#include <linux/gpio.h>
Peter Korsgaard752ad5e2011-07-15 10:25:32 +020018#include <linux/i2c.h>
David Brownelle58b9e22008-02-04 22:28:25 -080019#include <linux/spi/spi.h>
20#include <linux/spi/mcp23s08.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090021#include <linux/slab.h>
Peter Korsgaard0b7bb772011-03-09 17:56:30 +010022#include <asm/byteorder.h>
Lars Poeschel4e47f912014-01-16 11:44:15 +010023#include <linux/interrupt.h>
24#include <linux/of_irq.h>
Lars Poeschel97ddb1c2013-04-04 12:02:02 +020025#include <linux/of_device.h>
David Brownelle58b9e22008-02-04 22:28:25 -080026
Peter Korsgaard0b7bb772011-03-09 17:56:30 +010027/**
28 * MCP types supported by driver
29 */
30#define MCP_TYPE_S08 0
31#define MCP_TYPE_S17 1
Peter Korsgaard752ad5e2011-07-15 10:25:32 +020032#define MCP_TYPE_008 2
33#define MCP_TYPE_017 3
Phil Reid28c5a412016-03-01 14:25:41 +080034#define MCP_TYPE_S18 4
David Brownelle58b9e22008-02-04 22:28:25 -080035
36/* Registers are all 8 bits wide.
37 *
38 * The mcp23s17 has twice as many bits, and can be configured to work
39 * with either 16 bit registers or with two adjacent 8 bit banks.
David Brownelle58b9e22008-02-04 22:28:25 -080040 */
41#define MCP_IODIR 0x00 /* init/reset: all ones */
42#define MCP_IPOL 0x01
43#define MCP_GPINTEN 0x02
44#define MCP_DEFVAL 0x03
45#define MCP_INTCON 0x04
46#define MCP_IOCON 0x05
Lars Poeschel4e47f912014-01-16 11:44:15 +010047# define IOCON_MIRROR (1 << 6)
David Brownelle58b9e22008-02-04 22:28:25 -080048# define IOCON_SEQOP (1 << 5)
49# define IOCON_HAEN (1 << 3)
50# define IOCON_ODR (1 << 2)
51# define IOCON_INTPOL (1 << 1)
Phil Reid35396992016-03-15 15:46:30 +080052# define IOCON_INTCC (1)
David Brownelle58b9e22008-02-04 22:28:25 -080053#define MCP_GPPU 0x06
54#define MCP_INTF 0x07
55#define MCP_INTCAP 0x08
56#define MCP_GPIO 0x09
57#define MCP_OLAT 0x0a
58
Peter Korsgaard0b7bb772011-03-09 17:56:30 +010059struct mcp23s08;
60
61struct mcp23s08_ops {
62 int (*read)(struct mcp23s08 *mcp, unsigned reg);
63 int (*write)(struct mcp23s08 *mcp, unsigned reg, unsigned val);
64 int (*read_regs)(struct mcp23s08 *mcp, unsigned reg,
65 u16 *vals, unsigned n);
66};
67
David Brownelle58b9e22008-02-04 22:28:25 -080068struct mcp23s08 {
David Brownelle58b9e22008-02-04 22:28:25 -080069 u8 addr;
Alexander Steina4e63552014-12-01 08:26:00 +010070 bool irq_active_high;
David Brownelle58b9e22008-02-04 22:28:25 -080071
Peter Korsgaard0b7bb772011-03-09 17:56:30 +010072 u16 cache[11];
Lars Poeschel4e47f912014-01-16 11:44:15 +010073 u16 irq_rise;
74 u16 irq_fall;
75 int irq;
76 bool irq_controller;
David Brownelle58b9e22008-02-04 22:28:25 -080077 /* lock protects the cached values */
78 struct mutex lock;
Lars Poeschel4e47f912014-01-16 11:44:15 +010079 struct mutex irq_lock;
David Brownelle58b9e22008-02-04 22:28:25 -080080
81 struct gpio_chip chip;
82
Peter Korsgaard0b7bb772011-03-09 17:56:30 +010083 const struct mcp23s08_ops *ops;
Peter Korsgaardd62b98f2011-07-15 10:25:31 +020084 void *data; /* ops specific data */
David Brownelle58b9e22008-02-04 22:28:25 -080085};
86
Peter Korsgaard0b7bb772011-03-09 17:56:30 +010087/* A given spi_device can represent up to eight mcp23sxx chips
David Brownell8f1cc3b2008-07-25 01:46:09 -070088 * sharing the same chipselect but using different addresses
89 * (e.g. chips #0 and #3 might be populated, but not #1 or $2).
90 * Driver data holds all the per-chip data.
91 */
92struct mcp23s08_driver_data {
93 unsigned ngpio;
Peter Korsgaard0b7bb772011-03-09 17:56:30 +010094 struct mcp23s08 *mcp[8];
David Brownell8f1cc3b2008-07-25 01:46:09 -070095 struct mcp23s08 chip[];
96};
97
Peter Korsgaard752ad5e2011-07-15 10:25:32 +020098/*----------------------------------------------------------------------*/
99
Daniel M. Weekscbf24fa2012-11-06 23:51:05 -0500100#if IS_ENABLED(CONFIG_I2C)
Peter Korsgaard752ad5e2011-07-15 10:25:32 +0200101
102static int mcp23008_read(struct mcp23s08 *mcp, unsigned reg)
103{
104 return i2c_smbus_read_byte_data(mcp->data, reg);
105}
106
107static int mcp23008_write(struct mcp23s08 *mcp, unsigned reg, unsigned val)
108{
109 return i2c_smbus_write_byte_data(mcp->data, reg, val);
110}
111
112static int
113mcp23008_read_regs(struct mcp23s08 *mcp, unsigned reg, u16 *vals, unsigned n)
114{
115 while (n--) {
116 int ret = mcp23008_read(mcp, reg++);
117 if (ret < 0)
118 return ret;
119 *vals++ = ret;
120 }
121
122 return 0;
123}
124
125static int mcp23017_read(struct mcp23s08 *mcp, unsigned reg)
126{
127 return i2c_smbus_read_word_data(mcp->data, reg << 1);
128}
129
130static int mcp23017_write(struct mcp23s08 *mcp, unsigned reg, unsigned val)
131{
132 return i2c_smbus_write_word_data(mcp->data, reg << 1, val);
133}
134
135static int
136mcp23017_read_regs(struct mcp23s08 *mcp, unsigned reg, u16 *vals, unsigned n)
137{
138 while (n--) {
139 int ret = mcp23017_read(mcp, reg++);
140 if (ret < 0)
141 return ret;
142 *vals++ = ret;
143 }
144
145 return 0;
146}
147
148static const struct mcp23s08_ops mcp23008_ops = {
149 .read = mcp23008_read,
150 .write = mcp23008_write,
151 .read_regs = mcp23008_read_regs,
152};
153
154static const struct mcp23s08_ops mcp23017_ops = {
155 .read = mcp23017_read,
156 .write = mcp23017_write,
157 .read_regs = mcp23017_read_regs,
158};
159
160#endif /* CONFIG_I2C */
161
162/*----------------------------------------------------------------------*/
163
Peter Korsgaardd62b98f2011-07-15 10:25:31 +0200164#ifdef CONFIG_SPI_MASTER
165
David Brownelle58b9e22008-02-04 22:28:25 -0800166static int mcp23s08_read(struct mcp23s08 *mcp, unsigned reg)
167{
168 u8 tx[2], rx[1];
169 int status;
170
171 tx[0] = mcp->addr | 0x01;
172 tx[1] = reg;
Gary Servin33bc84112014-03-06 20:25:26 -0300173 status = spi_write_then_read(mcp->data, tx, sizeof(tx), rx, sizeof(rx));
David Brownelle58b9e22008-02-04 22:28:25 -0800174 return (status < 0) ? status : rx[0];
175}
176
Peter Korsgaard0b7bb772011-03-09 17:56:30 +0100177static int mcp23s08_write(struct mcp23s08 *mcp, unsigned reg, unsigned val)
David Brownelle58b9e22008-02-04 22:28:25 -0800178{
179 u8 tx[3];
180
181 tx[0] = mcp->addr;
182 tx[1] = reg;
183 tx[2] = val;
Gary Servin33bc84112014-03-06 20:25:26 -0300184 return spi_write_then_read(mcp->data, tx, sizeof(tx), NULL, 0);
David Brownelle58b9e22008-02-04 22:28:25 -0800185}
186
187static int
Peter Korsgaard0b7bb772011-03-09 17:56:30 +0100188mcp23s08_read_regs(struct mcp23s08 *mcp, unsigned reg, u16 *vals, unsigned n)
David Brownelle58b9e22008-02-04 22:28:25 -0800189{
Peter Korsgaard0b7bb772011-03-09 17:56:30 +0100190 u8 tx[2], *tmp;
191 int status;
David Brownelle58b9e22008-02-04 22:28:25 -0800192
Gary Servin33bc84112014-03-06 20:25:26 -0300193 if ((n + reg) > sizeof(mcp->cache))
David Brownelle58b9e22008-02-04 22:28:25 -0800194 return -EINVAL;
195 tx[0] = mcp->addr | 0x01;
196 tx[1] = reg;
Peter Korsgaard0b7bb772011-03-09 17:56:30 +0100197
198 tmp = (u8 *)vals;
Gary Servin33bc84112014-03-06 20:25:26 -0300199 status = spi_write_then_read(mcp->data, tx, sizeof(tx), tmp, n);
Peter Korsgaard0b7bb772011-03-09 17:56:30 +0100200 if (status >= 0) {
201 while (n--)
202 vals[n] = tmp[n]; /* expand to 16bit */
203 }
204 return status;
David Brownelle58b9e22008-02-04 22:28:25 -0800205}
206
Peter Korsgaard0b7bb772011-03-09 17:56:30 +0100207static int mcp23s17_read(struct mcp23s08 *mcp, unsigned reg)
208{
209 u8 tx[2], rx[2];
210 int status;
211
212 tx[0] = mcp->addr | 0x01;
213 tx[1] = reg << 1;
Gary Servin33bc84112014-03-06 20:25:26 -0300214 status = spi_write_then_read(mcp->data, tx, sizeof(tx), rx, sizeof(rx));
Peter Korsgaard0b7bb772011-03-09 17:56:30 +0100215 return (status < 0) ? status : (rx[0] | (rx[1] << 8));
216}
217
218static int mcp23s17_write(struct mcp23s08 *mcp, unsigned reg, unsigned val)
219{
220 u8 tx[4];
221
222 tx[0] = mcp->addr;
223 tx[1] = reg << 1;
224 tx[2] = val;
225 tx[3] = val >> 8;
Gary Servin33bc84112014-03-06 20:25:26 -0300226 return spi_write_then_read(mcp->data, tx, sizeof(tx), NULL, 0);
Peter Korsgaard0b7bb772011-03-09 17:56:30 +0100227}
228
229static int
230mcp23s17_read_regs(struct mcp23s08 *mcp, unsigned reg, u16 *vals, unsigned n)
231{
232 u8 tx[2];
233 int status;
234
Gary Servin33bc84112014-03-06 20:25:26 -0300235 if ((n + reg) > sizeof(mcp->cache))
Peter Korsgaard0b7bb772011-03-09 17:56:30 +0100236 return -EINVAL;
237 tx[0] = mcp->addr | 0x01;
238 tx[1] = reg << 1;
239
Gary Servin33bc84112014-03-06 20:25:26 -0300240 status = spi_write_then_read(mcp->data, tx, sizeof(tx),
Peter Korsgaard0b7bb772011-03-09 17:56:30 +0100241 (u8 *)vals, n * 2);
242 if (status >= 0) {
243 while (n--)
244 vals[n] = __le16_to_cpu((__le16)vals[n]);
245 }
246
247 return status;
248}
249
250static const struct mcp23s08_ops mcp23s08_ops = {
251 .read = mcp23s08_read,
252 .write = mcp23s08_write,
253 .read_regs = mcp23s08_read_regs,
254};
255
256static const struct mcp23s08_ops mcp23s17_ops = {
257 .read = mcp23s17_read,
258 .write = mcp23s17_write,
259 .read_regs = mcp23s17_read_regs,
260};
261
Peter Korsgaardd62b98f2011-07-15 10:25:31 +0200262#endif /* CONFIG_SPI_MASTER */
Peter Korsgaard0b7bb772011-03-09 17:56:30 +0100263
David Brownelle58b9e22008-02-04 22:28:25 -0800264/*----------------------------------------------------------------------*/
265
266static int mcp23s08_direction_input(struct gpio_chip *chip, unsigned offset)
267{
Linus Walleij9e03cf02015-12-07 10:09:36 +0100268 struct mcp23s08 *mcp = gpiochip_get_data(chip);
David Brownelle58b9e22008-02-04 22:28:25 -0800269 int status;
270
271 mutex_lock(&mcp->lock);
272 mcp->cache[MCP_IODIR] |= (1 << offset);
Peter Korsgaard0b7bb772011-03-09 17:56:30 +0100273 status = mcp->ops->write(mcp, MCP_IODIR, mcp->cache[MCP_IODIR]);
David Brownelle58b9e22008-02-04 22:28:25 -0800274 mutex_unlock(&mcp->lock);
275 return status;
276}
277
278static int mcp23s08_get(struct gpio_chip *chip, unsigned offset)
279{
Linus Walleij9e03cf02015-12-07 10:09:36 +0100280 struct mcp23s08 *mcp = gpiochip_get_data(chip);
David Brownelle58b9e22008-02-04 22:28:25 -0800281 int status;
282
283 mutex_lock(&mcp->lock);
284
285 /* REVISIT reading this clears any IRQ ... */
Peter Korsgaard0b7bb772011-03-09 17:56:30 +0100286 status = mcp->ops->read(mcp, MCP_GPIO);
David Brownelle58b9e22008-02-04 22:28:25 -0800287 if (status < 0)
288 status = 0;
289 else {
290 mcp->cache[MCP_GPIO] = status;
291 status = !!(status & (1 << offset));
292 }
293 mutex_unlock(&mcp->lock);
294 return status;
295}
296
297static int __mcp23s08_set(struct mcp23s08 *mcp, unsigned mask, int value)
298{
Peter Korsgaard0b7bb772011-03-09 17:56:30 +0100299 unsigned olat = mcp->cache[MCP_OLAT];
David Brownelle58b9e22008-02-04 22:28:25 -0800300
301 if (value)
302 olat |= mask;
303 else
304 olat &= ~mask;
305 mcp->cache[MCP_OLAT] = olat;
Peter Korsgaard0b7bb772011-03-09 17:56:30 +0100306 return mcp->ops->write(mcp, MCP_OLAT, olat);
David Brownelle58b9e22008-02-04 22:28:25 -0800307}
308
309static void mcp23s08_set(struct gpio_chip *chip, unsigned offset, int value)
310{
Linus Walleij9e03cf02015-12-07 10:09:36 +0100311 struct mcp23s08 *mcp = gpiochip_get_data(chip);
Peter Korsgaard0b7bb772011-03-09 17:56:30 +0100312 unsigned mask = 1 << offset;
David Brownelle58b9e22008-02-04 22:28:25 -0800313
314 mutex_lock(&mcp->lock);
315 __mcp23s08_set(mcp, mask, value);
316 mutex_unlock(&mcp->lock);
317}
318
319static int
320mcp23s08_direction_output(struct gpio_chip *chip, unsigned offset, int value)
321{
Linus Walleij9e03cf02015-12-07 10:09:36 +0100322 struct mcp23s08 *mcp = gpiochip_get_data(chip);
Peter Korsgaard0b7bb772011-03-09 17:56:30 +0100323 unsigned mask = 1 << offset;
David Brownelle58b9e22008-02-04 22:28:25 -0800324 int status;
325
326 mutex_lock(&mcp->lock);
327 status = __mcp23s08_set(mcp, mask, value);
328 if (status == 0) {
329 mcp->cache[MCP_IODIR] &= ~mask;
Peter Korsgaard0b7bb772011-03-09 17:56:30 +0100330 status = mcp->ops->write(mcp, MCP_IODIR, mcp->cache[MCP_IODIR]);
David Brownelle58b9e22008-02-04 22:28:25 -0800331 }
332 mutex_unlock(&mcp->lock);
333 return status;
334}
335
336/*----------------------------------------------------------------------*/
Lars Poeschel4e47f912014-01-16 11:44:15 +0100337static irqreturn_t mcp23s08_irq(int irq, void *data)
338{
339 struct mcp23s08 *mcp = data;
340 int intcap, intf, i;
341 unsigned int child_irq;
342
343 mutex_lock(&mcp->lock);
344 intf = mcp->ops->read(mcp, MCP_INTF);
345 if (intf < 0) {
346 mutex_unlock(&mcp->lock);
347 return IRQ_HANDLED;
348 }
349
350 mcp->cache[MCP_INTF] = intf;
351
352 intcap = mcp->ops->read(mcp, MCP_INTCAP);
353 if (intcap < 0) {
354 mutex_unlock(&mcp->lock);
355 return IRQ_HANDLED;
356 }
357
358 mcp->cache[MCP_INTCAP] = intcap;
359 mutex_unlock(&mcp->lock);
360
361
362 for (i = 0; i < mcp->chip.ngpio; i++) {
363 if ((BIT(i) & mcp->cache[MCP_INTF]) &&
364 ((BIT(i) & intcap & mcp->irq_rise) ||
Alexander Stein16fe1ad2016-03-23 18:01:27 +0100365 (mcp->irq_fall & ~intcap & BIT(i)) ||
366 (BIT(i) & mcp->cache[MCP_INTCON]))) {
Phil Reiddad3d272016-03-18 16:07:06 +0800367 child_irq = irq_find_mapping(mcp->chip.irqdomain, i);
Lars Poeschel4e47f912014-01-16 11:44:15 +0100368 handle_nested_irq(child_irq);
369 }
370 }
371
372 return IRQ_HANDLED;
373}
374
Lars Poeschel4e47f912014-01-16 11:44:15 +0100375static void mcp23s08_irq_mask(struct irq_data *data)
376{
Phil Reiddad3d272016-03-18 16:07:06 +0800377 struct gpio_chip *gc = irq_data_get_irq_chip_data(data);
378 struct mcp23s08 *mcp = gpiochip_get_data(gc);
Lars Poeschel4e47f912014-01-16 11:44:15 +0100379 unsigned int pos = data->hwirq;
380
381 mcp->cache[MCP_GPINTEN] &= ~BIT(pos);
382}
383
384static void mcp23s08_irq_unmask(struct irq_data *data)
385{
Phil Reiddad3d272016-03-18 16:07:06 +0800386 struct gpio_chip *gc = irq_data_get_irq_chip_data(data);
387 struct mcp23s08 *mcp = gpiochip_get_data(gc);
Lars Poeschel4e47f912014-01-16 11:44:15 +0100388 unsigned int pos = data->hwirq;
389
390 mcp->cache[MCP_GPINTEN] |= BIT(pos);
391}
392
393static int mcp23s08_irq_set_type(struct irq_data *data, unsigned int type)
394{
Phil Reiddad3d272016-03-18 16:07:06 +0800395 struct gpio_chip *gc = irq_data_get_irq_chip_data(data);
396 struct mcp23s08 *mcp = gpiochip_get_data(gc);
Lars Poeschel4e47f912014-01-16 11:44:15 +0100397 unsigned int pos = data->hwirq;
398 int status = 0;
399
400 if ((type & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH) {
401 mcp->cache[MCP_INTCON] &= ~BIT(pos);
402 mcp->irq_rise |= BIT(pos);
403 mcp->irq_fall |= BIT(pos);
404 } else if (type & IRQ_TYPE_EDGE_RISING) {
405 mcp->cache[MCP_INTCON] &= ~BIT(pos);
406 mcp->irq_rise |= BIT(pos);
407 mcp->irq_fall &= ~BIT(pos);
408 } else if (type & IRQ_TYPE_EDGE_FALLING) {
409 mcp->cache[MCP_INTCON] &= ~BIT(pos);
410 mcp->irq_rise &= ~BIT(pos);
411 mcp->irq_fall |= BIT(pos);
Alexander Stein16fe1ad2016-03-23 18:01:27 +0100412 } else if (type & IRQ_TYPE_LEVEL_HIGH) {
413 mcp->cache[MCP_INTCON] |= BIT(pos);
414 mcp->cache[MCP_DEFVAL] &= ~BIT(pos);
415 } else if (type & IRQ_TYPE_LEVEL_LOW) {
416 mcp->cache[MCP_INTCON] |= BIT(pos);
417 mcp->cache[MCP_DEFVAL] |= BIT(pos);
Lars Poeschel4e47f912014-01-16 11:44:15 +0100418 } else
419 return -EINVAL;
420
421 return status;
422}
423
424static void mcp23s08_irq_bus_lock(struct irq_data *data)
425{
Phil Reiddad3d272016-03-18 16:07:06 +0800426 struct gpio_chip *gc = irq_data_get_irq_chip_data(data);
427 struct mcp23s08 *mcp = gpiochip_get_data(gc);
Lars Poeschel4e47f912014-01-16 11:44:15 +0100428
429 mutex_lock(&mcp->irq_lock);
430}
431
432static void mcp23s08_irq_bus_unlock(struct irq_data *data)
433{
Phil Reiddad3d272016-03-18 16:07:06 +0800434 struct gpio_chip *gc = irq_data_get_irq_chip_data(data);
435 struct mcp23s08 *mcp = gpiochip_get_data(gc);
Lars Poeschel4e47f912014-01-16 11:44:15 +0100436
437 mutex_lock(&mcp->lock);
438 mcp->ops->write(mcp, MCP_GPINTEN, mcp->cache[MCP_GPINTEN]);
439 mcp->ops->write(mcp, MCP_DEFVAL, mcp->cache[MCP_DEFVAL]);
440 mcp->ops->write(mcp, MCP_INTCON, mcp->cache[MCP_INTCON]);
441 mutex_unlock(&mcp->lock);
442 mutex_unlock(&mcp->irq_lock);
443}
444
Lars Poeschel4e47f912014-01-16 11:44:15 +0100445static struct irq_chip mcp23s08_irq_chip = {
446 .name = "gpio-mcp23xxx",
447 .irq_mask = mcp23s08_irq_mask,
448 .irq_unmask = mcp23s08_irq_unmask,
449 .irq_set_type = mcp23s08_irq_set_type,
450 .irq_bus_lock = mcp23s08_irq_bus_lock,
451 .irq_bus_sync_unlock = mcp23s08_irq_bus_unlock,
Lars Poeschel4e47f912014-01-16 11:44:15 +0100452};
453
454static int mcp23s08_irq_setup(struct mcp23s08 *mcp)
455{
456 struct gpio_chip *chip = &mcp->chip;
Phil Reiddad3d272016-03-18 16:07:06 +0800457 int err;
Alexander Steina4e63552014-12-01 08:26:00 +0100458 unsigned long irqflags = IRQF_ONESHOT | IRQF_SHARED;
Lars Poeschel4e47f912014-01-16 11:44:15 +0100459
460 mutex_init(&mcp->irq_lock);
461
Alexander Steina4e63552014-12-01 08:26:00 +0100462 if (mcp->irq_active_high)
463 irqflags |= IRQF_TRIGGER_HIGH;
464 else
465 irqflags |= IRQF_TRIGGER_LOW;
466
Linus Walleij58383c782015-11-04 09:56:26 +0100467 err = devm_request_threaded_irq(chip->parent, mcp->irq, NULL,
468 mcp23s08_irq,
469 irqflags, dev_name(chip->parent), mcp);
Lars Poeschel4e47f912014-01-16 11:44:15 +0100470 if (err != 0) {
Linus Walleij58383c782015-11-04 09:56:26 +0100471 dev_err(chip->parent, "unable to request IRQ#%d: %d\n",
Lars Poeschel4e47f912014-01-16 11:44:15 +0100472 mcp->irq, err);
473 return err;
474 }
475
Linus Walleijd245b3f2016-11-24 10:57:25 +0100476 err = gpiochip_irqchip_add_nested(chip,
477 &mcp23s08_irq_chip,
478 0,
479 handle_simple_irq,
480 IRQ_TYPE_NONE);
Phil Reiddad3d272016-03-18 16:07:06 +0800481 if (err) {
482 dev_err(chip->parent,
483 "could not connect irqchip to gpiochip: %d\n", err);
484 return err;
Lars Poeschel4e47f912014-01-16 11:44:15 +0100485 }
Phil Reiddad3d272016-03-18 16:07:06 +0800486
Linus Walleijd245b3f2016-11-24 10:57:25 +0100487 gpiochip_set_nested_irqchip(chip,
488 &mcp23s08_irq_chip,
489 mcp->irq);
Phil Reiddad3d272016-03-18 16:07:06 +0800490
Lars Poeschel4e47f912014-01-16 11:44:15 +0100491 return 0;
492}
493
Lars Poeschel4e47f912014-01-16 11:44:15 +0100494/*----------------------------------------------------------------------*/
David Brownelle58b9e22008-02-04 22:28:25 -0800495
496#ifdef CONFIG_DEBUG_FS
497
498#include <linux/seq_file.h>
499
500/*
501 * This shows more info than the generic gpio dump code:
502 * pullups, deglitching, open drain drive.
503 */
504static void mcp23s08_dbg_show(struct seq_file *s, struct gpio_chip *chip)
505{
506 struct mcp23s08 *mcp;
507 char bank;
Roel Kluin1d1c1d92008-05-23 13:04:43 -0700508 int t;
David Brownelle58b9e22008-02-04 22:28:25 -0800509 unsigned mask;
510
Linus Walleij9e03cf02015-12-07 10:09:36 +0100511 mcp = gpiochip_get_data(chip);
David Brownelle58b9e22008-02-04 22:28:25 -0800512
513 /* NOTE: we only handle one bank for now ... */
Peter Korsgaard0b7bb772011-03-09 17:56:30 +0100514 bank = '0' + ((mcp->addr >> 1) & 0x7);
David Brownelle58b9e22008-02-04 22:28:25 -0800515
516 mutex_lock(&mcp->lock);
Peter Korsgaard0b7bb772011-03-09 17:56:30 +0100517 t = mcp->ops->read_regs(mcp, 0, mcp->cache, ARRAY_SIZE(mcp->cache));
David Brownelle58b9e22008-02-04 22:28:25 -0800518 if (t < 0) {
519 seq_printf(s, " I/O ERROR %d\n", t);
520 goto done;
521 }
522
Peter Korsgaard0b7bb772011-03-09 17:56:30 +0100523 for (t = 0, mask = 1; t < chip->ngpio; t++, mask <<= 1) {
David Brownelle58b9e22008-02-04 22:28:25 -0800524 const char *label;
525
526 label = gpiochip_is_requested(chip, t);
527 if (!label)
528 continue;
529
530 seq_printf(s, " gpio-%-3d P%c.%d (%-12s) %s %s %s",
531 chip->base + t, bank, t, label,
532 (mcp->cache[MCP_IODIR] & mask) ? "in " : "out",
533 (mcp->cache[MCP_GPIO] & mask) ? "hi" : "lo",
Peter Korsgaardeb1567f2012-04-25 11:51:53 +0200534 (mcp->cache[MCP_GPPU] & mask) ? "up" : " ");
David Brownelle58b9e22008-02-04 22:28:25 -0800535 /* NOTE: ignoring the irq-related registers */
Gary Servin33bc84112014-03-06 20:25:26 -0300536 seq_puts(s, "\n");
David Brownelle58b9e22008-02-04 22:28:25 -0800537 }
538done:
539 mutex_unlock(&mcp->lock);
540}
541
542#else
543#define mcp23s08_dbg_show NULL
544#endif
545
546/*----------------------------------------------------------------------*/
547
Peter Korsgaardd62b98f2011-07-15 10:25:31 +0200548static int mcp23s08_probe_one(struct mcp23s08 *mcp, struct device *dev,
Lars Poeschel4e47f912014-01-16 11:44:15 +0100549 void *data, unsigned addr, unsigned type,
Sonic Zhang3af0dbd2014-09-01 11:19:52 +0800550 struct mcp23s08_platform_data *pdata, int cs)
David Brownelle58b9e22008-02-04 22:28:25 -0800551{
Peter Korsgaardd62b98f2011-07-15 10:25:31 +0200552 int status;
Lars Poeschel4e47f912014-01-16 11:44:15 +0100553 bool mirror = false;
David Brownelle58b9e22008-02-04 22:28:25 -0800554
David Brownelle58b9e22008-02-04 22:28:25 -0800555 mutex_init(&mcp->lock);
556
Peter Korsgaardd62b98f2011-07-15 10:25:31 +0200557 mcp->data = data;
558 mcp->addr = addr;
Alexander Steina4e63552014-12-01 08:26:00 +0100559 mcp->irq_active_high = false;
David Brownelle58b9e22008-02-04 22:28:25 -0800560
David Brownelle58b9e22008-02-04 22:28:25 -0800561 mcp->chip.direction_input = mcp23s08_direction_input;
562 mcp->chip.get = mcp23s08_get;
563 mcp->chip.direction_output = mcp23s08_direction_output;
564 mcp->chip.set = mcp23s08_set;
565 mcp->chip.dbg_show = mcp23s08_dbg_show;
Linus Walleij60f749f2016-09-07 23:13:20 +0200566#ifdef CONFIG_OF_GPIO
Lars Poeschel97ddb1c2013-04-04 12:02:02 +0200567 mcp->chip.of_gpio_n_cells = 2;
568 mcp->chip.of_node = dev->of_node;
569#endif
David Brownelle58b9e22008-02-04 22:28:25 -0800570
Peter Korsgaardd62b98f2011-07-15 10:25:31 +0200571 switch (type) {
572#ifdef CONFIG_SPI_MASTER
573 case MCP_TYPE_S08:
Peter Korsgaard0b7bb772011-03-09 17:56:30 +0100574 mcp->ops = &mcp23s08_ops;
575 mcp->chip.ngpio = 8;
576 mcp->chip.label = "mcp23s08";
Peter Korsgaardd62b98f2011-07-15 10:25:31 +0200577 break;
578
579 case MCP_TYPE_S17:
580 mcp->ops = &mcp23s17_ops;
581 mcp->chip.ngpio = 16;
582 mcp->chip.label = "mcp23s17";
583 break;
Phil Reid28c5a412016-03-01 14:25:41 +0800584
585 case MCP_TYPE_S18:
586 mcp->ops = &mcp23s17_ops;
587 mcp->chip.ngpio = 16;
588 mcp->chip.label = "mcp23s18";
589 break;
Peter Korsgaardd62b98f2011-07-15 10:25:31 +0200590#endif /* CONFIG_SPI_MASTER */
591
Daniel M. Weekscbf24fa2012-11-06 23:51:05 -0500592#if IS_ENABLED(CONFIG_I2C)
Peter Korsgaard752ad5e2011-07-15 10:25:32 +0200593 case MCP_TYPE_008:
594 mcp->ops = &mcp23008_ops;
595 mcp->chip.ngpio = 8;
596 mcp->chip.label = "mcp23008";
597 break;
598
599 case MCP_TYPE_017:
600 mcp->ops = &mcp23017_ops;
601 mcp->chip.ngpio = 16;
602 mcp->chip.label = "mcp23017";
603 break;
604#endif /* CONFIG_I2C */
605
Peter Korsgaardd62b98f2011-07-15 10:25:31 +0200606 default:
607 dev_err(dev, "invalid device type (%d)\n", type);
608 return -EINVAL;
Peter Korsgaard0b7bb772011-03-09 17:56:30 +0100609 }
Peter Korsgaardd62b98f2011-07-15 10:25:31 +0200610
Sonic Zhang3af0dbd2014-09-01 11:19:52 +0800611 mcp->chip.base = pdata->base;
Linus Walleij9fb1f392013-12-04 14:42:46 +0100612 mcp->chip.can_sleep = true;
Linus Walleij58383c782015-11-04 09:56:26 +0100613 mcp->chip.parent = dev;
Guennadi Liakhovetskid72cbed2008-04-28 02:14:45 -0700614 mcp->chip.owner = THIS_MODULE;
David Brownelle58b9e22008-02-04 22:28:25 -0800615
David Brownell8f1cc3b2008-07-25 01:46:09 -0700616 /* verify MCP_IOCON.SEQOP = 0, so sequential reads work,
617 * and MCP_IOCON.HAEN = 1, so we work with all chips.
618 */
Lars Poeschel4e47f912014-01-16 11:44:15 +0100619
Peter Korsgaard0b7bb772011-03-09 17:56:30 +0100620 status = mcp->ops->read(mcp, MCP_IOCON);
David Brownelle58b9e22008-02-04 22:28:25 -0800621 if (status < 0)
622 goto fail;
Lars Poeschel4e47f912014-01-16 11:44:15 +0100623
Sonic Zhang3af0dbd2014-09-01 11:19:52 +0800624 mcp->irq_controller = pdata->irq_controller;
Alexander Steina4e63552014-12-01 08:26:00 +0100625 if (mcp->irq && mcp->irq_controller) {
Linus Walleij170680a2014-12-12 11:22:11 +0100626 mcp->irq_active_high =
Linus Walleij58383c782015-11-04 09:56:26 +0100627 of_property_read_bool(mcp->chip.parent->of_node,
Linus Walleij170680a2014-12-12 11:22:11 +0100628 "microchip,irq-active-high");
Lars Poeschel4e47f912014-01-16 11:44:15 +0100629
Phil Reid28c5a412016-03-01 14:25:41 +0800630 mirror = pdata->mirror;
Alexander Steina4e63552014-12-01 08:26:00 +0100631 }
632
633 if ((status & IOCON_SEQOP) || !(status & IOCON_HAEN) || mirror ||
634 mcp->irq_active_high) {
Peter Korsgaard0b7bb772011-03-09 17:56:30 +0100635 /* mcp23s17 has IOCON twice, make sure they are in sync */
636 status &= ~(IOCON_SEQOP | (IOCON_SEQOP << 8));
637 status |= IOCON_HAEN | (IOCON_HAEN << 8);
Alexander Steina4e63552014-12-01 08:26:00 +0100638 if (mcp->irq_active_high)
639 status |= IOCON_INTPOL | (IOCON_INTPOL << 8);
640 else
641 status &= ~(IOCON_INTPOL | (IOCON_INTPOL << 8));
642
Lars Poeschel4e47f912014-01-16 11:44:15 +0100643 if (mirror)
644 status |= IOCON_MIRROR | (IOCON_MIRROR << 8);
645
Phil Reid35396992016-03-15 15:46:30 +0800646 if (type == MCP_TYPE_S18)
647 status |= IOCON_INTCC | (IOCON_INTCC << 8);
648
Peter Korsgaard0b7bb772011-03-09 17:56:30 +0100649 status = mcp->ops->write(mcp, MCP_IOCON, status);
David Brownelle58b9e22008-02-04 22:28:25 -0800650 if (status < 0)
651 goto fail;
652 }
653
654 /* configure ~100K pullups */
Sonic Zhang3af0dbd2014-09-01 11:19:52 +0800655 status = mcp->ops->write(mcp, MCP_GPPU, pdata->chip[cs].pullups);
David Brownelle58b9e22008-02-04 22:28:25 -0800656 if (status < 0)
657 goto fail;
658
Peter Korsgaard0b7bb772011-03-09 17:56:30 +0100659 status = mcp->ops->read_regs(mcp, 0, mcp->cache, ARRAY_SIZE(mcp->cache));
David Brownelle58b9e22008-02-04 22:28:25 -0800660 if (status < 0)
661 goto fail;
662
663 /* disable inverter on input */
664 if (mcp->cache[MCP_IPOL] != 0) {
665 mcp->cache[MCP_IPOL] = 0;
Peter Korsgaard0b7bb772011-03-09 17:56:30 +0100666 status = mcp->ops->write(mcp, MCP_IPOL, 0);
667 if (status < 0)
668 goto fail;
David Brownelle58b9e22008-02-04 22:28:25 -0800669 }
670
671 /* disable irqs */
672 if (mcp->cache[MCP_GPINTEN] != 0) {
673 mcp->cache[MCP_GPINTEN] = 0;
Peter Korsgaard0b7bb772011-03-09 17:56:30 +0100674 status = mcp->ops->write(mcp, MCP_GPINTEN, 0);
David Brownell8f1cc3b2008-07-25 01:46:09 -0700675 if (status < 0)
676 goto fail;
David Brownelle58b9e22008-02-04 22:28:25 -0800677 }
678
Linus Walleij9e03cf02015-12-07 10:09:36 +0100679 status = gpiochip_add_data(&mcp->chip, mcp);
Lars Poeschel4e47f912014-01-16 11:44:15 +0100680 if (status < 0)
681 goto fail;
682
683 if (mcp->irq && mcp->irq_controller) {
684 status = mcp23s08_irq_setup(mcp);
685 if (status) {
Lars Poeschel4e47f912014-01-16 11:44:15 +0100686 goto fail;
687 }
688 }
David Brownell8f1cc3b2008-07-25 01:46:09 -0700689fail:
690 if (status < 0)
Peter Korsgaardd62b98f2011-07-15 10:25:31 +0200691 dev_dbg(dev, "can't setup chip %d, --> %d\n",
692 addr, status);
David Brownell8f1cc3b2008-07-25 01:46:09 -0700693 return status;
694}
695
Peter Korsgaard752ad5e2011-07-15 10:25:32 +0200696/*----------------------------------------------------------------------*/
697
Lars Poeschel97ddb1c2013-04-04 12:02:02 +0200698#ifdef CONFIG_OF
699#ifdef CONFIG_SPI_MASTER
Jingoo Hanac791802014-05-07 18:05:17 +0900700static const struct of_device_id mcp23s08_spi_of_match[] = {
Lars Poeschel97ddb1c2013-04-04 12:02:02 +0200701 {
Lars Poeschel45971682013-08-28 10:38:50 +0200702 .compatible = "microchip,mcp23s08",
703 .data = (void *) MCP_TYPE_S08,
Lars Poeschel97ddb1c2013-04-04 12:02:02 +0200704 },
705 {
Lars Poeschel45971682013-08-28 10:38:50 +0200706 .compatible = "microchip,mcp23s17",
707 .data = (void *) MCP_TYPE_S17,
708 },
Phil Reid28c5a412016-03-01 14:25:41 +0800709 {
710 .compatible = "microchip,mcp23s18",
711 .data = (void *) MCP_TYPE_S18,
712 },
Lars Poeschel45971682013-08-28 10:38:50 +0200713/* NOTE: The use of the mcp prefix is deprecated and will be removed. */
714 {
715 .compatible = "mcp,mcp23s08",
716 .data = (void *) MCP_TYPE_S08,
717 },
718 {
719 .compatible = "mcp,mcp23s17",
720 .data = (void *) MCP_TYPE_S17,
Lars Poeschel97ddb1c2013-04-04 12:02:02 +0200721 },
722 { },
723};
724MODULE_DEVICE_TABLE(of, mcp23s08_spi_of_match);
725#endif
726
727#if IS_ENABLED(CONFIG_I2C)
Jingoo Hanac791802014-05-07 18:05:17 +0900728static const struct of_device_id mcp23s08_i2c_of_match[] = {
Lars Poeschel97ddb1c2013-04-04 12:02:02 +0200729 {
Lars Poeschel45971682013-08-28 10:38:50 +0200730 .compatible = "microchip,mcp23008",
731 .data = (void *) MCP_TYPE_008,
Lars Poeschel97ddb1c2013-04-04 12:02:02 +0200732 },
733 {
Lars Poeschel45971682013-08-28 10:38:50 +0200734 .compatible = "microchip,mcp23017",
735 .data = (void *) MCP_TYPE_017,
736 },
737/* NOTE: The use of the mcp prefix is deprecated and will be removed. */
738 {
739 .compatible = "mcp,mcp23008",
740 .data = (void *) MCP_TYPE_008,
741 },
742 {
743 .compatible = "mcp,mcp23017",
744 .data = (void *) MCP_TYPE_017,
Lars Poeschel97ddb1c2013-04-04 12:02:02 +0200745 },
746 { },
747};
748MODULE_DEVICE_TABLE(of, mcp23s08_i2c_of_match);
749#endif
750#endif /* CONFIG_OF */
751
752
Daniel M. Weekscbf24fa2012-11-06 23:51:05 -0500753#if IS_ENABLED(CONFIG_I2C)
Peter Korsgaard752ad5e2011-07-15 10:25:32 +0200754
Bill Pemberton38363092012-11-19 13:22:34 -0500755static int mcp230xx_probe(struct i2c_client *client,
Peter Korsgaard752ad5e2011-07-15 10:25:32 +0200756 const struct i2c_device_id *id)
757{
Sonic Zhang3af0dbd2014-09-01 11:19:52 +0800758 struct mcp23s08_platform_data *pdata, local_pdata;
Peter Korsgaard752ad5e2011-07-15 10:25:32 +0200759 struct mcp23s08 *mcp;
Sonic Zhang3af0dbd2014-09-01 11:19:52 +0800760 int status;
Lars Poeschel97ddb1c2013-04-04 12:02:02 +0200761 const struct of_device_id *match;
Peter Korsgaard752ad5e2011-07-15 10:25:32 +0200762
Lars Poeschel97ddb1c2013-04-04 12:02:02 +0200763 match = of_match_device(of_match_ptr(mcp23s08_i2c_of_match),
764 &client->dev);
Sonic Zhang3af0dbd2014-09-01 11:19:52 +0800765 if (match) {
766 pdata = &local_pdata;
767 pdata->base = -1;
768 pdata->chip[0].pullups = 0;
769 pdata->irq_controller = of_property_read_bool(
770 client->dev.of_node,
771 "interrupt-controller");
772 pdata->mirror = of_property_read_bool(client->dev.of_node,
773 "microchip,irq-mirror");
Lars Poeschel4e47f912014-01-16 11:44:15 +0100774 client->irq = irq_of_parse_and_map(client->dev.of_node, 0);
Lars Poeschel97ddb1c2013-04-04 12:02:02 +0200775 } else {
Sonic Zhang3af0dbd2014-09-01 11:19:52 +0800776 pdata = dev_get_platdata(&client->dev);
Sonic Zhangb184c382015-01-20 17:00:08 +0800777 if (!pdata) {
778 pdata = devm_kzalloc(&client->dev,
779 sizeof(struct mcp23s08_platform_data),
780 GFP_KERNEL);
Insu Yunaaf2b3a2016-02-15 21:19:57 -0500781 if (!pdata)
782 return -ENOMEM;
Sonic Zhangb184c382015-01-20 17:00:08 +0800783 pdata->base = -1;
Lars Poeschel97ddb1c2013-04-04 12:02:02 +0200784 }
Peter Korsgaard752ad5e2011-07-15 10:25:32 +0200785 }
786
Gary Servin33bc84112014-03-06 20:25:26 -0300787 mcp = kzalloc(sizeof(*mcp), GFP_KERNEL);
Peter Korsgaard752ad5e2011-07-15 10:25:32 +0200788 if (!mcp)
789 return -ENOMEM;
790
Lars Poeschel4e47f912014-01-16 11:44:15 +0100791 mcp->irq = client->irq;
Peter Korsgaard752ad5e2011-07-15 10:25:32 +0200792 status = mcp23s08_probe_one(mcp, &client->dev, client, client->addr,
Sonic Zhang3af0dbd2014-09-01 11:19:52 +0800793 id->driver_data, pdata, 0);
Peter Korsgaard752ad5e2011-07-15 10:25:32 +0200794 if (status)
795 goto fail;
796
797 i2c_set_clientdata(client, mcp);
798
799 return 0;
800
801fail:
802 kfree(mcp);
803
804 return status;
805}
806
Bill Pemberton206210c2012-11-19 13:25:50 -0500807static int mcp230xx_remove(struct i2c_client *client)
Peter Korsgaard752ad5e2011-07-15 10:25:32 +0200808{
809 struct mcp23s08 *mcp = i2c_get_clientdata(client);
Peter Korsgaard752ad5e2011-07-15 10:25:32 +0200810
abdoulaye berthe9f5132a2014-07-12 22:30:12 +0200811 gpiochip_remove(&mcp->chip);
812 kfree(mcp);
Peter Korsgaard752ad5e2011-07-15 10:25:32 +0200813
abdoulaye berthe9f5132a2014-07-12 22:30:12 +0200814 return 0;
Peter Korsgaard752ad5e2011-07-15 10:25:32 +0200815}
816
817static const struct i2c_device_id mcp230xx_id[] = {
818 { "mcp23008", MCP_TYPE_008 },
819 { "mcp23017", MCP_TYPE_017 },
820 { },
821};
822MODULE_DEVICE_TABLE(i2c, mcp230xx_id);
823
824static struct i2c_driver mcp230xx_driver = {
825 .driver = {
826 .name = "mcp230xx",
Lars Poeschel97ddb1c2013-04-04 12:02:02 +0200827 .of_match_table = of_match_ptr(mcp23s08_i2c_of_match),
Peter Korsgaard752ad5e2011-07-15 10:25:32 +0200828 },
829 .probe = mcp230xx_probe,
Bill Pemberton8283c4f2012-11-19 13:20:08 -0500830 .remove = mcp230xx_remove,
Peter Korsgaard752ad5e2011-07-15 10:25:32 +0200831 .id_table = mcp230xx_id,
832};
833
834static int __init mcp23s08_i2c_init(void)
835{
836 return i2c_add_driver(&mcp230xx_driver);
837}
838
839static void mcp23s08_i2c_exit(void)
840{
841 i2c_del_driver(&mcp230xx_driver);
842}
843
844#else
845
846static int __init mcp23s08_i2c_init(void) { return 0; }
847static void mcp23s08_i2c_exit(void) { }
848
849#endif /* CONFIG_I2C */
850
851/*----------------------------------------------------------------------*/
852
Peter Korsgaardd62b98f2011-07-15 10:25:31 +0200853#ifdef CONFIG_SPI_MASTER
854
David Brownell8f1cc3b2008-07-25 01:46:09 -0700855static int mcp23s08_probe(struct spi_device *spi)
856{
Sonic Zhang3af0dbd2014-09-01 11:19:52 +0800857 struct mcp23s08_platform_data *pdata, local_pdata;
David Brownell8f1cc3b2008-07-25 01:46:09 -0700858 unsigned addr;
Linus Walleij596a1c52014-05-28 09:14:06 +0200859 int chips = 0;
David Brownell8f1cc3b2008-07-25 01:46:09 -0700860 struct mcp23s08_driver_data *data;
Peter Korsgaard0b7bb772011-03-09 17:56:30 +0100861 int status, type;
Sonic Zhang3af0dbd2014-09-01 11:19:52 +0800862 unsigned ngpio = 0;
Lars Poeschel97ddb1c2013-04-04 12:02:02 +0200863 const struct of_device_id *match;
864 u32 spi_present_mask = 0;
David Brownell8f1cc3b2008-07-25 01:46:09 -0700865
Lars Poeschel97ddb1c2013-04-04 12:02:02 +0200866 match = of_match_device(of_match_ptr(mcp23s08_spi_of_match), &spi->dev);
867 if (match) {
SeongJae Parkde755c32014-01-18 13:53:04 +0900868 type = (int)(uintptr_t)match->data;
Lars Poeschel97ddb1c2013-04-04 12:02:02 +0200869 status = of_property_read_u32(spi->dev.of_node,
Lars Poeschel45971682013-08-28 10:38:50 +0200870 "microchip,spi-present-mask", &spi_present_mask);
Lars Poeschel97ddb1c2013-04-04 12:02:02 +0200871 if (status) {
Lars Poeschel45971682013-08-28 10:38:50 +0200872 status = of_property_read_u32(spi->dev.of_node,
873 "mcp,spi-present-mask", &spi_present_mask);
874 if (status) {
875 dev_err(&spi->dev,
876 "DT has no spi-present-mask\n");
877 return -ENODEV;
878 }
Lars Poeschel97ddb1c2013-04-04 12:02:02 +0200879 }
880 if ((spi_present_mask <= 0) || (spi_present_mask >= 256)) {
881 dev_err(&spi->dev, "invalid spi-present-mask\n");
882 return -ENODEV;
883 }
Peter Korsgaard0b7bb772011-03-09 17:56:30 +0100884
Sonic Zhang3af0dbd2014-09-01 11:19:52 +0800885 pdata = &local_pdata;
886 pdata->base = -1;
Michael Welling99e4b982014-04-16 20:00:24 -0500887 for (addr = 0; addr < ARRAY_SIZE(pdata->chip); addr++) {
Sonic Zhang3af0dbd2014-09-01 11:19:52 +0800888 pdata->chip[addr].pullups = 0;
Michael Stickel3e3bed92014-05-26 10:03:16 +0200889 if (spi_present_mask & (1 << addr))
890 chips++;
Michael Welling99e4b982014-04-16 20:00:24 -0500891 }
Sonic Zhang3af0dbd2014-09-01 11:19:52 +0800892 pdata->irq_controller = of_property_read_bool(
893 spi->dev.of_node,
894 "interrupt-controller");
895 pdata->mirror = of_property_read_bool(spi->dev.of_node,
896 "microchip,irq-mirror");
Lars Poeschel97ddb1c2013-04-04 12:02:02 +0200897 } else {
898 type = spi_get_device_id(spi)->driver_data;
Jingoo Hane56aee12013-07-30 17:08:05 +0900899 pdata = dev_get_platdata(&spi->dev);
Sonic Zhangb184c382015-01-20 17:00:08 +0800900 if (!pdata) {
901 pdata = devm_kzalloc(&spi->dev,
902 sizeof(struct mcp23s08_platform_data),
903 GFP_KERNEL);
904 pdata->base = -1;
Peter Korsgaard0b7bb772011-03-09 17:56:30 +0100905 }
Lars Poeschel97ddb1c2013-04-04 12:02:02 +0200906
907 for (addr = 0; addr < ARRAY_SIZE(pdata->chip); addr++) {
908 if (!pdata->chip[addr].is_present)
909 continue;
910 chips++;
911 if ((type == MCP_TYPE_S08) && (addr > 3)) {
912 dev_err(&spi->dev,
913 "mcp23s08 only supports address 0..3\n");
914 return -EINVAL;
915 }
916 spi_present_mask |= 1 << addr;
Lars Poeschel97ddb1c2013-04-04 12:02:02 +0200917 }
David Brownell8f1cc3b2008-07-25 01:46:09 -0700918 }
David Brownell8f1cc3b2008-07-25 01:46:09 -0700919
Michael Welling99e4b982014-04-16 20:00:24 -0500920 if (!chips)
921 return -ENODEV;
922
Varka Bhadram7898b312015-03-31 09:49:08 +0530923 data = devm_kzalloc(&spi->dev,
924 sizeof(*data) + chips * sizeof(struct mcp23s08),
925 GFP_KERNEL);
David Brownell8f1cc3b2008-07-25 01:46:09 -0700926 if (!data)
927 return -ENOMEM;
Varka Bhadram7898b312015-03-31 09:49:08 +0530928
David Brownell8f1cc3b2008-07-25 01:46:09 -0700929 spi_set_drvdata(spi, data);
930
Alexander Steina231b88c2014-11-17 09:38:10 +0100931 spi->irq = irq_of_parse_and_map(spi->dev.of_node, 0);
932
Peter Korsgaard0b7bb772011-03-09 17:56:30 +0100933 for (addr = 0; addr < ARRAY_SIZE(pdata->chip); addr++) {
Lars Poeschel97ddb1c2013-04-04 12:02:02 +0200934 if (!(spi_present_mask & (1 << addr)))
David Brownell8f1cc3b2008-07-25 01:46:09 -0700935 continue;
936 chips--;
937 data->mcp[addr] = &data->chip[chips];
Alexander Steina231b88c2014-11-17 09:38:10 +0100938 data->mcp[addr]->irq = spi->irq;
Peter Korsgaardd62b98f2011-07-15 10:25:31 +0200939 status = mcp23s08_probe_one(data->mcp[addr], &spi->dev, spi,
Sonic Zhang3af0dbd2014-09-01 11:19:52 +0800940 0x40 | (addr << 1), type, pdata,
941 addr);
David Brownell8f1cc3b2008-07-25 01:46:09 -0700942 if (status < 0)
943 goto fail;
Peter Korsgaard0b7bb772011-03-09 17:56:30 +0100944
Sonic Zhang3af0dbd2014-09-01 11:19:52 +0800945 if (pdata->base != -1)
Phil Reid28c5a412016-03-01 14:25:41 +0800946 pdata->base += data->mcp[addr]->chip.ngpio;
947 ngpio += data->mcp[addr]->chip.ngpio;
David Brownell8f1cc3b2008-07-25 01:46:09 -0700948 }
Lars Poeschel97ddb1c2013-04-04 12:02:02 +0200949 data->ngpio = ngpio;
David Brownelle58b9e22008-02-04 22:28:25 -0800950
951 /* NOTE: these chips have a relatively sane IRQ framework, with
952 * per-signal masking and level/edge triggering. It's not yet
953 * handled here...
954 */
955
David Brownelle58b9e22008-02-04 22:28:25 -0800956 return 0;
957
958fail:
Peter Korsgaard0b7bb772011-03-09 17:56:30 +0100959 for (addr = 0; addr < ARRAY_SIZE(data->mcp); addr++) {
David Brownell8f1cc3b2008-07-25 01:46:09 -0700960
961 if (!data->mcp[addr])
962 continue;
abdoulaye berthe9f5132a2014-07-12 22:30:12 +0200963 gpiochip_remove(&data->mcp[addr]->chip);
David Brownell8f1cc3b2008-07-25 01:46:09 -0700964 }
David Brownelle58b9e22008-02-04 22:28:25 -0800965 return status;
966}
967
968static int mcp23s08_remove(struct spi_device *spi)
969{
David Brownell8f1cc3b2008-07-25 01:46:09 -0700970 struct mcp23s08_driver_data *data = spi_get_drvdata(spi);
David Brownell8f1cc3b2008-07-25 01:46:09 -0700971 unsigned addr;
David Brownelle58b9e22008-02-04 22:28:25 -0800972
Peter Korsgaard0b7bb772011-03-09 17:56:30 +0100973 for (addr = 0; addr < ARRAY_SIZE(data->mcp); addr++) {
David Brownell8f1cc3b2008-07-25 01:46:09 -0700974
975 if (!data->mcp[addr])
976 continue;
977
abdoulaye berthe9f5132a2014-07-12 22:30:12 +0200978 gpiochip_remove(&data->mcp[addr]->chip);
David Brownell8f1cc3b2008-07-25 01:46:09 -0700979 }
Varka Bhadramc4941e02015-04-07 21:34:40 +0530980
abdoulaye berthe9f5132a2014-07-12 22:30:12 +0200981 return 0;
David Brownelle58b9e22008-02-04 22:28:25 -0800982}
983
Peter Korsgaard0b7bb772011-03-09 17:56:30 +0100984static const struct spi_device_id mcp23s08_ids[] = {
985 { "mcp23s08", MCP_TYPE_S08 },
986 { "mcp23s17", MCP_TYPE_S17 },
Phil Reid28c5a412016-03-01 14:25:41 +0800987 { "mcp23s18", MCP_TYPE_S18 },
Peter Korsgaard0b7bb772011-03-09 17:56:30 +0100988 { },
989};
990MODULE_DEVICE_TABLE(spi, mcp23s08_ids);
991
David Brownelle58b9e22008-02-04 22:28:25 -0800992static struct spi_driver mcp23s08_driver = {
993 .probe = mcp23s08_probe,
994 .remove = mcp23s08_remove,
Peter Korsgaard0b7bb772011-03-09 17:56:30 +0100995 .id_table = mcp23s08_ids,
David Brownelle58b9e22008-02-04 22:28:25 -0800996 .driver = {
997 .name = "mcp23s08",
Lars Poeschel97ddb1c2013-04-04 12:02:02 +0200998 .of_match_table = of_match_ptr(mcp23s08_spi_of_match),
David Brownelle58b9e22008-02-04 22:28:25 -0800999 },
1000};
1001
Peter Korsgaardd62b98f2011-07-15 10:25:31 +02001002static int __init mcp23s08_spi_init(void)
1003{
1004 return spi_register_driver(&mcp23s08_driver);
1005}
1006
1007static void mcp23s08_spi_exit(void)
1008{
1009 spi_unregister_driver(&mcp23s08_driver);
1010}
1011
1012#else
1013
1014static int __init mcp23s08_spi_init(void) { return 0; }
1015static void mcp23s08_spi_exit(void) { }
1016
1017#endif /* CONFIG_SPI_MASTER */
1018
David Brownelle58b9e22008-02-04 22:28:25 -08001019/*----------------------------------------------------------------------*/
1020
1021static int __init mcp23s08_init(void)
1022{
Peter Korsgaard752ad5e2011-07-15 10:25:32 +02001023 int ret;
1024
1025 ret = mcp23s08_spi_init();
1026 if (ret)
1027 goto spi_fail;
1028
1029 ret = mcp23s08_i2c_init();
1030 if (ret)
1031 goto i2c_fail;
1032
1033 return 0;
1034
1035 i2c_fail:
1036 mcp23s08_spi_exit();
1037 spi_fail:
1038 return ret;
David Brownelle58b9e22008-02-04 22:28:25 -08001039}
Peter Korsgaard752ad5e2011-07-15 10:25:32 +02001040/* register after spi/i2c postcore initcall and before
David Brownell673c0c02008-10-15 22:02:46 -07001041 * subsys initcalls that may rely on these GPIOs
1042 */
1043subsys_initcall(mcp23s08_init);
David Brownelle58b9e22008-02-04 22:28:25 -08001044
1045static void __exit mcp23s08_exit(void)
1046{
Peter Korsgaardd62b98f2011-07-15 10:25:31 +02001047 mcp23s08_spi_exit();
Peter Korsgaard752ad5e2011-07-15 10:25:32 +02001048 mcp23s08_i2c_exit();
David Brownelle58b9e22008-02-04 22:28:25 -08001049}
1050module_exit(mcp23s08_exit);
1051
1052MODULE_LICENSE("GPL");