Aisheng Dong | f05c07b | 2018-12-18 15:22:58 +0000 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | /* |
| 3 | * Copyright (C) 2016 Freescale Semiconductor, Inc. |
| 4 | * Copyright 2017~2018 NXP |
| 5 | * Dong Aisheng <aisheng.dong@nxp.com> |
| 6 | */ |
| 7 | |
| 8 | #include <dt-bindings/pinctrl/pads-imx8qm.h> |
| 9 | #include <linux/err.h> |
| 10 | #include <linux/firmware/imx/sci.h> |
| 11 | #include <linux/init.h> |
| 12 | #include <linux/module.h> |
| 13 | #include <linux/of.h> |
| 14 | #include <linux/pinctrl/pinctrl.h> |
| 15 | #include <linux/platform_device.h> |
| 16 | |
| 17 | #include "pinctrl-imx.h" |
| 18 | |
| 19 | static const struct pinctrl_pin_desc imx8qm_pinctrl_pads[] = { |
| 20 | IMX_PINCTRL_PIN(IMX8QM_SIM0_CLK), |
| 21 | IMX_PINCTRL_PIN(IMX8QM_SIM0_RST), |
| 22 | IMX_PINCTRL_PIN(IMX8QM_SIM0_IO), |
| 23 | IMX_PINCTRL_PIN(IMX8QM_SIM0_PD), |
| 24 | IMX_PINCTRL_PIN(IMX8QM_SIM0_POWER_EN), |
| 25 | IMX_PINCTRL_PIN(IMX8QM_SIM0_GPIO0_00), |
| 26 | IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_SIM), |
| 27 | IMX_PINCTRL_PIN(IMX8QM_M40_I2C0_SCL), |
| 28 | IMX_PINCTRL_PIN(IMX8QM_M40_I2C0_SDA), |
| 29 | IMX_PINCTRL_PIN(IMX8QM_M40_GPIO0_00), |
| 30 | IMX_PINCTRL_PIN(IMX8QM_M40_GPIO0_01), |
| 31 | IMX_PINCTRL_PIN(IMX8QM_M41_I2C0_SCL), |
| 32 | IMX_PINCTRL_PIN(IMX8QM_M41_I2C0_SDA), |
| 33 | IMX_PINCTRL_PIN(IMX8QM_M41_GPIO0_00), |
| 34 | IMX_PINCTRL_PIN(IMX8QM_M41_GPIO0_01), |
| 35 | IMX_PINCTRL_PIN(IMX8QM_GPT0_CLK), |
| 36 | IMX_PINCTRL_PIN(IMX8QM_GPT0_CAPTURE), |
| 37 | IMX_PINCTRL_PIN(IMX8QM_GPT0_COMPARE), |
| 38 | IMX_PINCTRL_PIN(IMX8QM_GPT1_CLK), |
| 39 | IMX_PINCTRL_PIN(IMX8QM_GPT1_CAPTURE), |
| 40 | IMX_PINCTRL_PIN(IMX8QM_GPT1_COMPARE), |
| 41 | IMX_PINCTRL_PIN(IMX8QM_UART0_RX), |
| 42 | IMX_PINCTRL_PIN(IMX8QM_UART0_TX), |
| 43 | IMX_PINCTRL_PIN(IMX8QM_UART0_RTS_B), |
| 44 | IMX_PINCTRL_PIN(IMX8QM_UART0_CTS_B), |
| 45 | IMX_PINCTRL_PIN(IMX8QM_UART1_TX), |
| 46 | IMX_PINCTRL_PIN(IMX8QM_UART1_RX), |
| 47 | IMX_PINCTRL_PIN(IMX8QM_UART1_RTS_B), |
| 48 | IMX_PINCTRL_PIN(IMX8QM_UART1_CTS_B), |
| 49 | IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_GPIOLH), |
| 50 | IMX_PINCTRL_PIN(IMX8QM_SCU_PMIC_MEMC_ON), |
| 51 | IMX_PINCTRL_PIN(IMX8QM_SCU_WDOG_OUT), |
| 52 | IMX_PINCTRL_PIN(IMX8QM_PMIC_I2C_SDA), |
| 53 | IMX_PINCTRL_PIN(IMX8QM_PMIC_I2C_SCL), |
| 54 | IMX_PINCTRL_PIN(IMX8QM_PMIC_EARLY_WARNING), |
| 55 | IMX_PINCTRL_PIN(IMX8QM_PMIC_INT_B), |
| 56 | IMX_PINCTRL_PIN(IMX8QM_SCU_GPIO0_00), |
| 57 | IMX_PINCTRL_PIN(IMX8QM_SCU_GPIO0_01), |
| 58 | IMX_PINCTRL_PIN(IMX8QM_SCU_GPIO0_02), |
| 59 | IMX_PINCTRL_PIN(IMX8QM_SCU_GPIO0_03), |
| 60 | IMX_PINCTRL_PIN(IMX8QM_SCU_GPIO0_04), |
| 61 | IMX_PINCTRL_PIN(IMX8QM_SCU_GPIO0_05), |
| 62 | IMX_PINCTRL_PIN(IMX8QM_SCU_GPIO0_06), |
| 63 | IMX_PINCTRL_PIN(IMX8QM_SCU_GPIO0_07), |
| 64 | IMX_PINCTRL_PIN(IMX8QM_SCU_BOOT_MODE0), |
| 65 | IMX_PINCTRL_PIN(IMX8QM_SCU_BOOT_MODE1), |
| 66 | IMX_PINCTRL_PIN(IMX8QM_SCU_BOOT_MODE2), |
| 67 | IMX_PINCTRL_PIN(IMX8QM_SCU_BOOT_MODE3), |
| 68 | IMX_PINCTRL_PIN(IMX8QM_SCU_BOOT_MODE4), |
| 69 | IMX_PINCTRL_PIN(IMX8QM_SCU_BOOT_MODE5), |
| 70 | IMX_PINCTRL_PIN(IMX8QM_LVDS0_GPIO00), |
| 71 | IMX_PINCTRL_PIN(IMX8QM_LVDS0_GPIO01), |
| 72 | IMX_PINCTRL_PIN(IMX8QM_LVDS0_I2C0_SCL), |
| 73 | IMX_PINCTRL_PIN(IMX8QM_LVDS0_I2C0_SDA), |
| 74 | IMX_PINCTRL_PIN(IMX8QM_LVDS0_I2C1_SCL), |
| 75 | IMX_PINCTRL_PIN(IMX8QM_LVDS0_I2C1_SDA), |
| 76 | IMX_PINCTRL_PIN(IMX8QM_LVDS1_GPIO00), |
| 77 | IMX_PINCTRL_PIN(IMX8QM_LVDS1_GPIO01), |
| 78 | IMX_PINCTRL_PIN(IMX8QM_LVDS1_I2C0_SCL), |
| 79 | IMX_PINCTRL_PIN(IMX8QM_LVDS1_I2C0_SDA), |
| 80 | IMX_PINCTRL_PIN(IMX8QM_LVDS1_I2C1_SCL), |
| 81 | IMX_PINCTRL_PIN(IMX8QM_LVDS1_I2C1_SDA), |
| 82 | IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_LVDSGPIO), |
| 83 | IMX_PINCTRL_PIN(IMX8QM_MIPI_DSI0_I2C0_SCL), |
| 84 | IMX_PINCTRL_PIN(IMX8QM_MIPI_DSI0_I2C0_SDA), |
| 85 | IMX_PINCTRL_PIN(IMX8QM_MIPI_DSI0_GPIO0_00), |
| 86 | IMX_PINCTRL_PIN(IMX8QM_MIPI_DSI0_GPIO0_01), |
| 87 | IMX_PINCTRL_PIN(IMX8QM_MIPI_DSI1_I2C0_SCL), |
| 88 | IMX_PINCTRL_PIN(IMX8QM_MIPI_DSI1_I2C0_SDA), |
| 89 | IMX_PINCTRL_PIN(IMX8QM_MIPI_DSI1_GPIO0_00), |
| 90 | IMX_PINCTRL_PIN(IMX8QM_MIPI_DSI1_GPIO0_01), |
| 91 | IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_MIPIDSIGPIO), |
| 92 | IMX_PINCTRL_PIN(IMX8QM_MIPI_CSI0_MCLK_OUT), |
| 93 | IMX_PINCTRL_PIN(IMX8QM_MIPI_CSI0_I2C0_SCL), |
| 94 | IMX_PINCTRL_PIN(IMX8QM_MIPI_CSI0_I2C0_SDA), |
| 95 | IMX_PINCTRL_PIN(IMX8QM_MIPI_CSI0_GPIO0_00), |
| 96 | IMX_PINCTRL_PIN(IMX8QM_MIPI_CSI0_GPIO0_01), |
| 97 | IMX_PINCTRL_PIN(IMX8QM_MIPI_CSI1_MCLK_OUT), |
| 98 | IMX_PINCTRL_PIN(IMX8QM_MIPI_CSI1_GPIO0_00), |
| 99 | IMX_PINCTRL_PIN(IMX8QM_MIPI_CSI1_GPIO0_01), |
| 100 | IMX_PINCTRL_PIN(IMX8QM_MIPI_CSI1_I2C0_SCL), |
| 101 | IMX_PINCTRL_PIN(IMX8QM_MIPI_CSI1_I2C0_SDA), |
| 102 | IMX_PINCTRL_PIN(IMX8QM_HDMI_TX0_TS_SCL), |
| 103 | IMX_PINCTRL_PIN(IMX8QM_HDMI_TX0_TS_SDA), |
| 104 | IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_3V3_HDMIGPIO), |
| 105 | IMX_PINCTRL_PIN(IMX8QM_ESAI1_FSR), |
| 106 | IMX_PINCTRL_PIN(IMX8QM_ESAI1_FST), |
| 107 | IMX_PINCTRL_PIN(IMX8QM_ESAI1_SCKR), |
| 108 | IMX_PINCTRL_PIN(IMX8QM_ESAI1_SCKT), |
| 109 | IMX_PINCTRL_PIN(IMX8QM_ESAI1_TX0), |
| 110 | IMX_PINCTRL_PIN(IMX8QM_ESAI1_TX1), |
| 111 | IMX_PINCTRL_PIN(IMX8QM_ESAI1_TX2_RX3), |
| 112 | IMX_PINCTRL_PIN(IMX8QM_ESAI1_TX3_RX2), |
| 113 | IMX_PINCTRL_PIN(IMX8QM_ESAI1_TX4_RX1), |
| 114 | IMX_PINCTRL_PIN(IMX8QM_ESAI1_TX5_RX0), |
| 115 | IMX_PINCTRL_PIN(IMX8QM_SPDIF0_RX), |
| 116 | IMX_PINCTRL_PIN(IMX8QM_SPDIF0_TX), |
| 117 | IMX_PINCTRL_PIN(IMX8QM_SPDIF0_EXT_CLK), |
| 118 | IMX_PINCTRL_PIN(IMX8QM_SPI3_SCK), |
| 119 | IMX_PINCTRL_PIN(IMX8QM_SPI3_SDO), |
| 120 | IMX_PINCTRL_PIN(IMX8QM_SPI3_SDI), |
| 121 | IMX_PINCTRL_PIN(IMX8QM_SPI3_CS0), |
| 122 | IMX_PINCTRL_PIN(IMX8QM_SPI3_CS1), |
| 123 | IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_GPIORHB), |
| 124 | IMX_PINCTRL_PIN(IMX8QM_ESAI0_FSR), |
| 125 | IMX_PINCTRL_PIN(IMX8QM_ESAI0_FST), |
| 126 | IMX_PINCTRL_PIN(IMX8QM_ESAI0_SCKR), |
| 127 | IMX_PINCTRL_PIN(IMX8QM_ESAI0_SCKT), |
| 128 | IMX_PINCTRL_PIN(IMX8QM_ESAI0_TX0), |
| 129 | IMX_PINCTRL_PIN(IMX8QM_ESAI0_TX1), |
| 130 | IMX_PINCTRL_PIN(IMX8QM_ESAI0_TX2_RX3), |
| 131 | IMX_PINCTRL_PIN(IMX8QM_ESAI0_TX3_RX2), |
| 132 | IMX_PINCTRL_PIN(IMX8QM_ESAI0_TX4_RX1), |
| 133 | IMX_PINCTRL_PIN(IMX8QM_ESAI0_TX5_RX0), |
| 134 | IMX_PINCTRL_PIN(IMX8QM_MCLK_IN0), |
| 135 | IMX_PINCTRL_PIN(IMX8QM_MCLK_OUT0), |
| 136 | IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_GPIORHC), |
| 137 | IMX_PINCTRL_PIN(IMX8QM_SPI0_SCK), |
| 138 | IMX_PINCTRL_PIN(IMX8QM_SPI0_SDO), |
| 139 | IMX_PINCTRL_PIN(IMX8QM_SPI0_SDI), |
| 140 | IMX_PINCTRL_PIN(IMX8QM_SPI0_CS0), |
| 141 | IMX_PINCTRL_PIN(IMX8QM_SPI0_CS1), |
| 142 | IMX_PINCTRL_PIN(IMX8QM_SPI2_SCK), |
| 143 | IMX_PINCTRL_PIN(IMX8QM_SPI2_SDO), |
| 144 | IMX_PINCTRL_PIN(IMX8QM_SPI2_SDI), |
| 145 | IMX_PINCTRL_PIN(IMX8QM_SPI2_CS0), |
| 146 | IMX_PINCTRL_PIN(IMX8QM_SPI2_CS1), |
| 147 | IMX_PINCTRL_PIN(IMX8QM_SAI1_RXC), |
| 148 | IMX_PINCTRL_PIN(IMX8QM_SAI1_RXD), |
| 149 | IMX_PINCTRL_PIN(IMX8QM_SAI1_RXFS), |
| 150 | IMX_PINCTRL_PIN(IMX8QM_SAI1_TXC), |
| 151 | IMX_PINCTRL_PIN(IMX8QM_SAI1_TXD), |
| 152 | IMX_PINCTRL_PIN(IMX8QM_SAI1_TXFS), |
| 153 | IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_GPIORHT), |
| 154 | IMX_PINCTRL_PIN(IMX8QM_ADC_IN7), |
| 155 | IMX_PINCTRL_PIN(IMX8QM_ADC_IN6), |
| 156 | IMX_PINCTRL_PIN(IMX8QM_ADC_IN5), |
| 157 | IMX_PINCTRL_PIN(IMX8QM_ADC_IN4), |
| 158 | IMX_PINCTRL_PIN(IMX8QM_ADC_IN3), |
| 159 | IMX_PINCTRL_PIN(IMX8QM_ADC_IN2), |
| 160 | IMX_PINCTRL_PIN(IMX8QM_ADC_IN1), |
| 161 | IMX_PINCTRL_PIN(IMX8QM_ADC_IN0), |
| 162 | IMX_PINCTRL_PIN(IMX8QM_MLB_SIG), |
| 163 | IMX_PINCTRL_PIN(IMX8QM_MLB_CLK), |
| 164 | IMX_PINCTRL_PIN(IMX8QM_MLB_DATA), |
| 165 | IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_GPIOLHT), |
| 166 | IMX_PINCTRL_PIN(IMX8QM_FLEXCAN0_RX), |
| 167 | IMX_PINCTRL_PIN(IMX8QM_FLEXCAN0_TX), |
| 168 | IMX_PINCTRL_PIN(IMX8QM_FLEXCAN1_RX), |
| 169 | IMX_PINCTRL_PIN(IMX8QM_FLEXCAN1_TX), |
| 170 | IMX_PINCTRL_PIN(IMX8QM_FLEXCAN2_RX), |
| 171 | IMX_PINCTRL_PIN(IMX8QM_FLEXCAN2_TX), |
| 172 | IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_GPIOTHR), |
| 173 | IMX_PINCTRL_PIN(IMX8QM_USB_SS3_TC0), |
| 174 | IMX_PINCTRL_PIN(IMX8QM_USB_SS3_TC1), |
| 175 | IMX_PINCTRL_PIN(IMX8QM_USB_SS3_TC2), |
| 176 | IMX_PINCTRL_PIN(IMX8QM_USB_SS3_TC3), |
| 177 | IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_3V3_USB3IO), |
| 178 | IMX_PINCTRL_PIN(IMX8QM_USDHC1_RESET_B), |
| 179 | IMX_PINCTRL_PIN(IMX8QM_USDHC1_VSELECT), |
| 180 | IMX_PINCTRL_PIN(IMX8QM_USDHC2_RESET_B), |
| 181 | IMX_PINCTRL_PIN(IMX8QM_USDHC2_VSELECT), |
| 182 | IMX_PINCTRL_PIN(IMX8QM_USDHC2_WP), |
| 183 | IMX_PINCTRL_PIN(IMX8QM_USDHC2_CD_B), |
| 184 | IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_VSELSEP), |
| 185 | IMX_PINCTRL_PIN(IMX8QM_ENET0_MDIO), |
| 186 | IMX_PINCTRL_PIN(IMX8QM_ENET0_MDC), |
| 187 | IMX_PINCTRL_PIN(IMX8QM_ENET0_REFCLK_125M_25M), |
| 188 | IMX_PINCTRL_PIN(IMX8QM_ENET1_REFCLK_125M_25M), |
| 189 | IMX_PINCTRL_PIN(IMX8QM_ENET1_MDIO), |
| 190 | IMX_PINCTRL_PIN(IMX8QM_ENET1_MDC), |
| 191 | IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_GPIOCT), |
| 192 | IMX_PINCTRL_PIN(IMX8QM_QSPI1A_SS0_B), |
| 193 | IMX_PINCTRL_PIN(IMX8QM_QSPI1A_SS1_B), |
| 194 | IMX_PINCTRL_PIN(IMX8QM_QSPI1A_SCLK), |
| 195 | IMX_PINCTRL_PIN(IMX8QM_QSPI1A_DQS), |
| 196 | IMX_PINCTRL_PIN(IMX8QM_QSPI1A_DATA3), |
| 197 | IMX_PINCTRL_PIN(IMX8QM_QSPI1A_DATA2), |
| 198 | IMX_PINCTRL_PIN(IMX8QM_QSPI1A_DATA1), |
| 199 | IMX_PINCTRL_PIN(IMX8QM_QSPI1A_DATA0), |
| 200 | IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_QSPI1), |
| 201 | IMX_PINCTRL_PIN(IMX8QM_QSPI0A_DATA0), |
| 202 | IMX_PINCTRL_PIN(IMX8QM_QSPI0A_DATA1), |
| 203 | IMX_PINCTRL_PIN(IMX8QM_QSPI0A_DATA2), |
| 204 | IMX_PINCTRL_PIN(IMX8QM_QSPI0A_DATA3), |
| 205 | IMX_PINCTRL_PIN(IMX8QM_QSPI0A_DQS), |
| 206 | IMX_PINCTRL_PIN(IMX8QM_QSPI0A_SS0_B), |
| 207 | IMX_PINCTRL_PIN(IMX8QM_QSPI0A_SS1_B), |
| 208 | IMX_PINCTRL_PIN(IMX8QM_QSPI0A_SCLK), |
| 209 | IMX_PINCTRL_PIN(IMX8QM_QSPI0B_SCLK), |
| 210 | IMX_PINCTRL_PIN(IMX8QM_QSPI0B_DATA0), |
| 211 | IMX_PINCTRL_PIN(IMX8QM_QSPI0B_DATA1), |
| 212 | IMX_PINCTRL_PIN(IMX8QM_QSPI0B_DATA2), |
| 213 | IMX_PINCTRL_PIN(IMX8QM_QSPI0B_DATA3), |
| 214 | IMX_PINCTRL_PIN(IMX8QM_QSPI0B_DQS), |
| 215 | IMX_PINCTRL_PIN(IMX8QM_QSPI0B_SS0_B), |
| 216 | IMX_PINCTRL_PIN(IMX8QM_QSPI0B_SS1_B), |
| 217 | IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_QSPI0), |
| 218 | IMX_PINCTRL_PIN(IMX8QM_PCIE_CTRL0_CLKREQ_B), |
| 219 | IMX_PINCTRL_PIN(IMX8QM_PCIE_CTRL0_WAKE_B), |
| 220 | IMX_PINCTRL_PIN(IMX8QM_PCIE_CTRL0_PERST_B), |
| 221 | IMX_PINCTRL_PIN(IMX8QM_PCIE_CTRL1_CLKREQ_B), |
| 222 | IMX_PINCTRL_PIN(IMX8QM_PCIE_CTRL1_WAKE_B), |
| 223 | IMX_PINCTRL_PIN(IMX8QM_PCIE_CTRL1_PERST_B), |
| 224 | IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_PCIESEP), |
| 225 | IMX_PINCTRL_PIN(IMX8QM_USB_HSIC0_DATA), |
| 226 | IMX_PINCTRL_PIN(IMX8QM_USB_HSIC0_STROBE), |
| 227 | IMX_PINCTRL_PIN(IMX8QM_CALIBRATION_0_HSIC), |
| 228 | IMX_PINCTRL_PIN(IMX8QM_CALIBRATION_1_HSIC), |
| 229 | IMX_PINCTRL_PIN(IMX8QM_EMMC0_CLK), |
| 230 | IMX_PINCTRL_PIN(IMX8QM_EMMC0_CMD), |
| 231 | IMX_PINCTRL_PIN(IMX8QM_EMMC0_DATA0), |
| 232 | IMX_PINCTRL_PIN(IMX8QM_EMMC0_DATA1), |
| 233 | IMX_PINCTRL_PIN(IMX8QM_EMMC0_DATA2), |
| 234 | IMX_PINCTRL_PIN(IMX8QM_EMMC0_DATA3), |
| 235 | IMX_PINCTRL_PIN(IMX8QM_EMMC0_DATA4), |
| 236 | IMX_PINCTRL_PIN(IMX8QM_EMMC0_DATA5), |
| 237 | IMX_PINCTRL_PIN(IMX8QM_EMMC0_DATA6), |
| 238 | IMX_PINCTRL_PIN(IMX8QM_EMMC0_DATA7), |
| 239 | IMX_PINCTRL_PIN(IMX8QM_EMMC0_STROBE), |
| 240 | IMX_PINCTRL_PIN(IMX8QM_EMMC0_RESET_B), |
| 241 | IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_SD1FIX), |
| 242 | IMX_PINCTRL_PIN(IMX8QM_USDHC1_CLK), |
| 243 | IMX_PINCTRL_PIN(IMX8QM_USDHC1_CMD), |
| 244 | IMX_PINCTRL_PIN(IMX8QM_USDHC1_DATA0), |
| 245 | IMX_PINCTRL_PIN(IMX8QM_USDHC1_DATA1), |
| 246 | IMX_PINCTRL_PIN(IMX8QM_CTL_NAND_RE_P_N), |
| 247 | IMX_PINCTRL_PIN(IMX8QM_USDHC1_DATA2), |
| 248 | IMX_PINCTRL_PIN(IMX8QM_USDHC1_DATA3), |
| 249 | IMX_PINCTRL_PIN(IMX8QM_CTL_NAND_DQS_P_N), |
| 250 | IMX_PINCTRL_PIN(IMX8QM_USDHC1_DATA4), |
| 251 | IMX_PINCTRL_PIN(IMX8QM_USDHC1_DATA5), |
| 252 | IMX_PINCTRL_PIN(IMX8QM_USDHC1_DATA6), |
| 253 | IMX_PINCTRL_PIN(IMX8QM_USDHC1_DATA7), |
| 254 | IMX_PINCTRL_PIN(IMX8QM_USDHC1_STROBE), |
| 255 | IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_VSEL2), |
| 256 | IMX_PINCTRL_PIN(IMX8QM_USDHC2_CLK), |
| 257 | IMX_PINCTRL_PIN(IMX8QM_USDHC2_CMD), |
| 258 | IMX_PINCTRL_PIN(IMX8QM_USDHC2_DATA0), |
| 259 | IMX_PINCTRL_PIN(IMX8QM_USDHC2_DATA1), |
| 260 | IMX_PINCTRL_PIN(IMX8QM_USDHC2_DATA2), |
| 261 | IMX_PINCTRL_PIN(IMX8QM_USDHC2_DATA3), |
| 262 | IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_VSEL3), |
| 263 | IMX_PINCTRL_PIN(IMX8QM_ENET0_RGMII_TXC), |
| 264 | IMX_PINCTRL_PIN(IMX8QM_ENET0_RGMII_TX_CTL), |
| 265 | IMX_PINCTRL_PIN(IMX8QM_ENET0_RGMII_TXD0), |
| 266 | IMX_PINCTRL_PIN(IMX8QM_ENET0_RGMII_TXD1), |
| 267 | IMX_PINCTRL_PIN(IMX8QM_ENET0_RGMII_TXD2), |
| 268 | IMX_PINCTRL_PIN(IMX8QM_ENET0_RGMII_TXD3), |
| 269 | IMX_PINCTRL_PIN(IMX8QM_ENET0_RGMII_RXC), |
| 270 | IMX_PINCTRL_PIN(IMX8QM_ENET0_RGMII_RX_CTL), |
| 271 | IMX_PINCTRL_PIN(IMX8QM_ENET0_RGMII_RXD0), |
| 272 | IMX_PINCTRL_PIN(IMX8QM_ENET0_RGMII_RXD1), |
| 273 | IMX_PINCTRL_PIN(IMX8QM_ENET0_RGMII_RXD2), |
| 274 | IMX_PINCTRL_PIN(IMX8QM_ENET0_RGMII_RXD3), |
| 275 | IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB), |
| 276 | IMX_PINCTRL_PIN(IMX8QM_ENET1_RGMII_TXC), |
| 277 | IMX_PINCTRL_PIN(IMX8QM_ENET1_RGMII_TX_CTL), |
| 278 | IMX_PINCTRL_PIN(IMX8QM_ENET1_RGMII_TXD0), |
| 279 | IMX_PINCTRL_PIN(IMX8QM_ENET1_RGMII_TXD1), |
| 280 | IMX_PINCTRL_PIN(IMX8QM_ENET1_RGMII_TXD2), |
| 281 | IMX_PINCTRL_PIN(IMX8QM_ENET1_RGMII_TXD3), |
| 282 | IMX_PINCTRL_PIN(IMX8QM_ENET1_RGMII_RXC), |
| 283 | IMX_PINCTRL_PIN(IMX8QM_ENET1_RGMII_RX_CTL), |
| 284 | IMX_PINCTRL_PIN(IMX8QM_ENET1_RGMII_RXD0), |
| 285 | IMX_PINCTRL_PIN(IMX8QM_ENET1_RGMII_RXD1), |
| 286 | IMX_PINCTRL_PIN(IMX8QM_ENET1_RGMII_RXD2), |
| 287 | IMX_PINCTRL_PIN(IMX8QM_ENET1_RGMII_RXD3), |
| 288 | IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_ENET_ENETA), |
| 289 | }; |
| 290 | |
| 291 | static const struct imx_pinctrl_soc_info imx8qm_pinctrl_info = { |
| 292 | .pins = imx8qm_pinctrl_pads, |
| 293 | .npins = ARRAY_SIZE(imx8qm_pinctrl_pads), |
| 294 | .flags = IMX_USE_SCU, |
Anson Huang | 07ae3f0 | 2020-09-08 16:11:59 +0800 | [diff] [blame] | 295 | .imx_pinconf_get = imx_pinconf_get_scu, |
| 296 | .imx_pinconf_set = imx_pinconf_set_scu, |
| 297 | .imx_pinctrl_parse_pin = imx_pinctrl_parse_pin_scu, |
Aisheng Dong | f05c07b | 2018-12-18 15:22:58 +0000 | [diff] [blame] | 298 | }; |
| 299 | |
| 300 | static const struct of_device_id imx8qm_pinctrl_of_match[] = { |
| 301 | { .compatible = "fsl,imx8qm-iomuxc", }, |
| 302 | { /* sentinel */ } |
| 303 | }; |
Anson Huang | 36d640f | 2020-06-24 14:24:03 +0800 | [diff] [blame] | 304 | MODULE_DEVICE_TABLE(of, imx8qm_pinctrl_of_match); |
Aisheng Dong | f05c07b | 2018-12-18 15:22:58 +0000 | [diff] [blame] | 305 | |
| 306 | static int imx8qm_pinctrl_probe(struct platform_device *pdev) |
| 307 | { |
| 308 | int ret; |
| 309 | |
| 310 | ret = imx_pinctrl_sc_ipc_init(pdev); |
| 311 | if (ret) |
| 312 | return ret; |
| 313 | |
| 314 | return imx_pinctrl_probe(pdev, &imx8qm_pinctrl_info); |
| 315 | } |
| 316 | |
| 317 | static struct platform_driver imx8qm_pinctrl_driver = { |
| 318 | .driver = { |
| 319 | .name = "imx8qm-pinctrl", |
| 320 | .of_match_table = of_match_ptr(imx8qm_pinctrl_of_match), |
| 321 | .suppress_bind_attrs = true, |
| 322 | }, |
| 323 | .probe = imx8qm_pinctrl_probe, |
| 324 | }; |
| 325 | |
| 326 | static int __init imx8qm_pinctrl_init(void) |
| 327 | { |
| 328 | return platform_driver_register(&imx8qm_pinctrl_driver); |
| 329 | } |
| 330 | arch_initcall(imx8qm_pinctrl_init); |
Anson Huang | 36d640f | 2020-06-24 14:24:03 +0800 | [diff] [blame] | 331 | |
| 332 | MODULE_AUTHOR("Aisheng Dong <aisheng.dong@nxp.com>"); |
| 333 | MODULE_DESCRIPTION("NXP i.MX8QM pinctrl driver"); |
| 334 | MODULE_LICENSE("GPL v2"); |