Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * linux/arch/sh/kernel/io_7751se.c |
| 3 | * |
| 4 | * Copyright (C) 2002 David McCullough <davidm@snapgear.com> |
| 5 | * Copyright (C) 2001 Ian da Silva, Jeremy Siegel |
| 6 | * Based largely on io_se.c. |
| 7 | * |
| 8 | * I/O routine for Hitachi 7751 SolutionEngine. |
| 9 | * |
| 10 | * Initial version only to support LAN access; some |
| 11 | * placeholder code from io_se.c left in with the |
| 12 | * expectation of later SuperIO and PCMCIA access. |
| 13 | */ |
| 14 | |
| 15 | #include <linux/kernel.h> |
| 16 | #include <linux/types.h> |
| 17 | #include <linux/pci.h> |
| 18 | #include <asm/io.h> |
| 19 | #include <asm/addrspace.h> |
| 20 | |
| 21 | #include <asm/pci.h> |
| 22 | #include "../../drivers/pci/pci-sh7751.h" |
| 23 | |
| 24 | #ifdef CONFIG_SH_SECUREEDGE5410 |
| 25 | unsigned short secureedge5410_ioport; |
| 26 | #endif |
| 27 | |
| 28 | /* |
| 29 | * The SnapGear uses the built-in PCI controller (PCIC) |
| 30 | * of the 7751 processor |
| 31 | */ |
| 32 | |
| 33 | #define PCIIOBR (volatile long *)PCI_REG(SH7751_PCIIOBR) |
| 34 | #define PCIMBR (volatile long *)PCI_REG(SH7751_PCIMBR) |
| 35 | #define PCI_IO_AREA SH7751_PCI_IO_BASE |
| 36 | #define PCI_MEM_AREA SH7751_PCI_CONFIG_BASE |
| 37 | |
| 38 | |
| 39 | #define PCI_IOMAP(adr) (PCI_IO_AREA + (adr & ~SH7751_PCIIOBR_MASK)) |
| 40 | |
| 41 | |
| 42 | #define maybebadio(name,port) \ |
| 43 | printk("bad PC-like io %s for port 0x%lx at 0x%08x\n", \ |
| 44 | #name, (port), (__u32) __builtin_return_address(0)) |
| 45 | |
| 46 | |
| 47 | static inline void delay(void) |
| 48 | { |
| 49 | ctrl_inw(0xa0000000); |
| 50 | } |
| 51 | |
| 52 | |
| 53 | static inline volatile __u16 *port2adr(unsigned int port) |
| 54 | { |
| 55 | #if 0 |
| 56 | if (port >= 0x2000) |
| 57 | return (volatile __u16 *) (PA_MRSHPC + (port - 0x2000)); |
| 58 | #endif |
| 59 | maybebadio(name,(unsigned long)port); |
| 60 | return (volatile __u16*)port; |
| 61 | } |
| 62 | |
| 63 | |
| 64 | /* In case someone configures the kernel w/o PCI support: in that */ |
| 65 | /* scenario, don't ever bother to check for PCI-window addresses */ |
| 66 | |
| 67 | /* NOTE: WINDOW CHECK MAY BE A BIT OFF, HIGH PCIBIOS_MIN_IO WRAPS? */ |
| 68 | #if defined(CONFIG_PCI) |
| 69 | #define CHECK_SH7751_PCIIO(port) \ |
| 70 | ((port >= PCIBIOS_MIN_IO) && (port < (PCIBIOS_MIN_IO + SH7751_PCI_IO_SIZE))) |
| 71 | #else |
| 72 | #define CHECK_SH7751_PCIIO(port) (0) |
| 73 | #endif |
| 74 | |
| 75 | /* |
| 76 | * General outline: remap really low stuff [eventually] to SuperIO, |
| 77 | * stuff in PCI IO space (at or above window at pci.h:PCIBIOS_MIN_IO) |
| 78 | * is mapped through the PCI IO window. Stuff with high bits (PXSEG) |
| 79 | * should be way beyond the window, and is used w/o translation for |
| 80 | * compatibility. |
| 81 | */ |
| 82 | |
| 83 | unsigned char snapgear_inb(unsigned long port) |
| 84 | { |
| 85 | if (PXSEG(port)) |
| 86 | return *(volatile unsigned char *)port; |
| 87 | else if (CHECK_SH7751_PCIIO(port)) |
| 88 | return *(volatile unsigned char *)PCI_IOMAP(port); |
| 89 | else |
| 90 | return (*port2adr(port))&0xff; |
| 91 | } |
| 92 | |
| 93 | |
| 94 | unsigned char snapgear_inb_p(unsigned long port) |
| 95 | { |
| 96 | unsigned char v; |
| 97 | |
| 98 | if (PXSEG(port)) |
| 99 | v = *(volatile unsigned char *)port; |
| 100 | else if (CHECK_SH7751_PCIIO(port)) |
| 101 | v = *(volatile unsigned char *)PCI_IOMAP(port); |
| 102 | else |
| 103 | v = (*port2adr(port))&0xff; |
| 104 | delay(); |
| 105 | return v; |
| 106 | } |
| 107 | |
| 108 | |
| 109 | unsigned short snapgear_inw(unsigned long port) |
| 110 | { |
| 111 | if (PXSEG(port)) |
| 112 | return *(volatile unsigned short *)port; |
| 113 | else if (CHECK_SH7751_PCIIO(port)) |
| 114 | return *(volatile unsigned short *)PCI_IOMAP(port); |
| 115 | else if (port >= 0x2000) |
| 116 | return *port2adr(port); |
| 117 | else |
| 118 | maybebadio(inw, port); |
| 119 | return 0; |
| 120 | } |
| 121 | |
| 122 | |
| 123 | unsigned int snapgear_inl(unsigned long port) |
| 124 | { |
| 125 | if (PXSEG(port)) |
| 126 | return *(volatile unsigned long *)port; |
| 127 | else if (CHECK_SH7751_PCIIO(port)) |
| 128 | return *(volatile unsigned int *)PCI_IOMAP(port); |
| 129 | else if (port >= 0x2000) |
| 130 | return *port2adr(port); |
| 131 | else |
| 132 | maybebadio(inl, port); |
| 133 | return 0; |
| 134 | } |
| 135 | |
| 136 | |
| 137 | void snapgear_outb(unsigned char value, unsigned long port) |
| 138 | { |
| 139 | |
| 140 | if (PXSEG(port)) |
| 141 | *(volatile unsigned char *)port = value; |
| 142 | else if (CHECK_SH7751_PCIIO(port)) |
| 143 | *((unsigned char*)PCI_IOMAP(port)) = value; |
| 144 | else |
| 145 | *(port2adr(port)) = value; |
| 146 | } |
| 147 | |
| 148 | |
| 149 | void snapgear_outb_p(unsigned char value, unsigned long port) |
| 150 | { |
| 151 | if (PXSEG(port)) |
| 152 | *(volatile unsigned char *)port = value; |
| 153 | else if (CHECK_SH7751_PCIIO(port)) |
| 154 | *((unsigned char*)PCI_IOMAP(port)) = value; |
| 155 | else |
| 156 | *(port2adr(port)) = value; |
| 157 | delay(); |
| 158 | } |
| 159 | |
| 160 | |
| 161 | void snapgear_outw(unsigned short value, unsigned long port) |
| 162 | { |
| 163 | if (PXSEG(port)) |
| 164 | *(volatile unsigned short *)port = value; |
| 165 | else if (CHECK_SH7751_PCIIO(port)) |
| 166 | *((unsigned short *)PCI_IOMAP(port)) = value; |
| 167 | else if (port >= 0x2000) |
| 168 | *port2adr(port) = value; |
| 169 | else |
| 170 | maybebadio(outw, port); |
| 171 | } |
| 172 | |
| 173 | |
| 174 | void snapgear_outl(unsigned int value, unsigned long port) |
| 175 | { |
| 176 | if (PXSEG(port)) |
| 177 | *(volatile unsigned long *)port = value; |
| 178 | else if (CHECK_SH7751_PCIIO(port)) |
| 179 | *((unsigned long*)PCI_IOMAP(port)) = value; |
| 180 | else |
| 181 | maybebadio(outl, port); |
| 182 | } |
| 183 | |
| 184 | void snapgear_insl(unsigned long port, void *addr, unsigned long count) |
| 185 | { |
| 186 | maybebadio(insl, port); |
| 187 | } |
| 188 | |
| 189 | void snapgear_outsl(unsigned long port, const void *addr, unsigned long count) |
| 190 | { |
| 191 | maybebadio(outsw, port); |
| 192 | } |
| 193 | |
| 194 | /* Map ISA bus address to the real address. Only for PCMCIA. */ |
| 195 | |
| 196 | |
| 197 | /* ISA page descriptor. */ |
| 198 | static __u32 sh_isa_memmap[256]; |
| 199 | |
| 200 | |
| 201 | #if 0 |
| 202 | static int sh_isa_mmap(__u32 start, __u32 length, __u32 offset) |
| 203 | { |
| 204 | int idx; |
| 205 | |
| 206 | if (start >= 0x100000 || (start & 0xfff) || (length != 0x1000)) |
| 207 | return -1; |
| 208 | |
| 209 | idx = start >> 12; |
| 210 | sh_isa_memmap[idx] = 0xb8000000 + (offset &~ 0xfff); |
| 211 | #if 0 |
| 212 | printk("sh_isa_mmap: start %x len %x offset %x (idx %x paddr %x)\n", |
| 213 | start, length, offset, idx, sh_isa_memmap[idx]); |
| 214 | #endif |
| 215 | return 0; |
| 216 | } |
| 217 | #endif |
| 218 | |
| 219 | unsigned long snapgear_isa_port2addr(unsigned long offset) |
| 220 | { |
| 221 | int idx; |
| 222 | |
| 223 | idx = (offset >> 12) & 0xff; |
| 224 | offset &= 0xfff; |
| 225 | return sh_isa_memmap[idx] + offset; |
| 226 | } |