SZ Lin (林上智) | 30fd611 | 2018-09-28 18:47:16 +0800 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | /* |
| 3 | * Copyright (C) 2018 MOXA Inc. - https://www.moxa.com/ |
| 4 | * |
| 5 | * Authors: SZ Lin (林上智) <sz.lin@moxa.com> |
| 6 | * Wes Huang (黃淵河) <wes.huang@moxa.com> |
| 7 | * Fero JD Zhou (周俊達) <FeroJD.Zhou@moxa.com> |
| 8 | */ |
| 9 | |
| 10 | #include "am33xx.dtsi" |
| 11 | |
| 12 | / { |
| 13 | vbat: vbat-regulator { |
| 14 | compatible = "regulator-fixed"; |
| 15 | }; |
| 16 | |
| 17 | /* Power supply provides a fixed 3.3V @3A */ |
| 18 | vmmcsd_fixed: vmmcsd-regulator { |
| 19 | compatible = "regulator-fixed"; |
| 20 | regulator-name = "vmmcsd_fixed"; |
| 21 | regulator-min-microvolt = <3300000>; |
| 22 | regulator-max-microvolt = <3300000>; |
| 23 | regulator-boot-on; |
| 24 | }; |
| 25 | |
| 26 | buttons: push_button { |
| 27 | compatible = "gpio-keys"; |
| 28 | }; |
| 29 | }; |
| 30 | |
| 31 | &am33xx_pinmux { |
| 32 | pinctrl-names = "default"; |
| 33 | |
| 34 | i2c0_pins: pinmux_i2c0_pins { |
| 35 | pinctrl-single,pins = < |
Christina Quast | 876144d | 2019-04-12 18:26:13 +0200 | [diff] [blame] | 36 | AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT_PULLUP, MUX_MODE0) |
| 37 | AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_INPUT_PULLUP, MUX_MODE0) |
SZ Lin (林上智) | 30fd611 | 2018-09-28 18:47:16 +0800 | [diff] [blame] | 38 | >; |
| 39 | }; |
| 40 | |
| 41 | push_button_pins: pinmux_push_button { |
| 42 | pinctrl-single,pins = < |
Christina Quast | 876144d | 2019-04-12 18:26:13 +0200 | [diff] [blame] | 43 | AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_INPUT_PULLDOWN, MUX_MODE7) /* lcd_hsync.gpio2_23 */ |
SZ Lin (林上智) | 30fd611 | 2018-09-28 18:47:16 +0800 | [diff] [blame] | 44 | >; |
| 45 | }; |
| 46 | |
| 47 | uart0_pins: pinmux_uart0_pins { |
| 48 | pinctrl-single,pins = < |
Christina Quast | 876144d | 2019-04-12 18:26:13 +0200 | [diff] [blame] | 49 | AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0) |
| 50 | AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0) |
SZ Lin (林上智) | 30fd611 | 2018-09-28 18:47:16 +0800 | [diff] [blame] | 51 | >; |
| 52 | }; |
| 53 | |
| 54 | davinci_mdio_default: davinci_mdio_default { |
| 55 | pinctrl-single,pins = < |
| 56 | /* MDIO */ |
Christina Quast | 876144d | 2019-04-12 18:26:13 +0200 | [diff] [blame] | 57 | AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLUP | SLEWCTRL_FAST, MUX_MODE0) |
| 58 | AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLUP, MUX_MODE0) |
SZ Lin (林上智) | 30fd611 | 2018-09-28 18:47:16 +0800 | [diff] [blame] | 59 | >; |
| 60 | }; |
| 61 | |
| 62 | mmc1_pins_default: pinmux_mmc1_pins { |
| 63 | pinctrl-single,pins = < |
| 64 | /* eMMC */ |
Christina Quast | 876144d | 2019-04-12 18:26:13 +0200 | [diff] [blame] | 65 | AM33XX_PADCONF(AM335X_PIN_GPMC_AD0, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad12.mmc1_dat0 */ |
| 66 | AM33XX_PADCONF(AM335X_PIN_GPMC_AD1, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad13.mmc1_dat1 */ |
| 67 | AM33XX_PADCONF(AM335X_PIN_GPMC_AD2, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad14.mmc1_dat2 */ |
| 68 | AM33XX_PADCONF(AM335X_PIN_GPMC_AD3, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad15.mmc1_dat3 */ |
| 69 | AM33XX_PADCONF(AM335X_PIN_GPMC_AD4, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad8.mmc1_dat4 */ |
| 70 | AM33XX_PADCONF(AM335X_PIN_GPMC_AD5, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad9.mmc1_dat5 */ |
| 71 | AM33XX_PADCONF(AM335X_PIN_GPMC_AD6, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad10.mmc1_dat6 */ |
| 72 | AM33XX_PADCONF(AM335X_PIN_GPMC_AD7, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad11.mmc1_dat7 */ |
| 73 | AM33XX_PADCONF(AM335X_PIN_GPMC_CSN2, PIN_INPUT_PULLUP, MUX_MODE2) /* gpmc_csn2.mmc1_cmd */ |
| 74 | AM33XX_PADCONF(AM335X_PIN_GPMC_CSN1, PIN_INPUT_PULLUP, MUX_MODE2) /* gpmc_csn1.mmc1_clk */ |
SZ Lin (林上智) | 30fd611 | 2018-09-28 18:47:16 +0800 | [diff] [blame] | 75 | >; |
| 76 | }; |
| 77 | |
| 78 | spi0_pins: pinmux_spi0 { |
| 79 | pinctrl-single,pins = < |
Christina Quast | 876144d | 2019-04-12 18:26:13 +0200 | [diff] [blame] | 80 | AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT_PULLUP, MUX_MODE0) |
| 81 | AM33XX_PADCONF(AM335X_PIN_SPI0_CS0, PIN_INPUT_PULLUP, MUX_MODE0) |
| 82 | AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_INPUT_PULLUP, MUX_MODE0) |
| 83 | AM33XX_PADCONF(AM335X_PIN_SPI0_D1, PIN_INPUT_PULLUP, MUX_MODE0) |
SZ Lin (林上智) | 30fd611 | 2018-09-28 18:47:16 +0800 | [diff] [blame] | 84 | >; |
| 85 | }; |
| 86 | }; |
| 87 | |
| 88 | &uart0 { |
| 89 | /* Console */ |
| 90 | status = "okay"; |
| 91 | pinctrl-names = "default"; |
| 92 | pinctrl-0 = <&uart0_pins>; |
| 93 | }; |
| 94 | |
| 95 | &i2c0 { |
| 96 | pinctrl-names = "default"; |
| 97 | pinctrl-0 = <&i2c0_pins>; |
| 98 | |
| 99 | status = "okay"; |
| 100 | clock-frequency = <400000>; |
| 101 | |
| 102 | eeprom: eeprom@50 { |
| 103 | compatible = "atmel,24c16"; |
| 104 | pagesize = <16>; |
| 105 | reg = <0x50>; |
| 106 | }; |
| 107 | |
| 108 | rtc_wdt: rtc_wdt@68 { |
| 109 | compatible = "dallas,ds1374"; |
| 110 | reg = <0x68>; |
| 111 | }; |
| 112 | }; |
| 113 | |
SZ Lin (林上智) | 30fd611 | 2018-09-28 18:47:16 +0800 | [diff] [blame] | 114 | &usb0 { |
SZ Lin (林上智) | 30fd611 | 2018-09-28 18:47:16 +0800 | [diff] [blame] | 115 | dr_mode = "host"; |
| 116 | }; |
| 117 | |
SZ Lin (林上智) | 30fd611 | 2018-09-28 18:47:16 +0800 | [diff] [blame] | 118 | /* Power */ |
| 119 | &vbat { |
| 120 | regulator-name = "vbat"; |
| 121 | regulator-min-microvolt = <5000000>; |
| 122 | regulator-max-microvolt = <5000000>; |
| 123 | }; |
| 124 | |
| 125 | &mac { |
| 126 | pinctrl-names = "default"; |
| 127 | pinctrl-0 = <&cpsw_default>; |
| 128 | status = "okay"; |
| 129 | }; |
| 130 | |
| 131 | &davinci_mdio { |
| 132 | pinctrl-names = "default"; |
| 133 | pinctrl-0 = <&davinci_mdio_default>; |
| 134 | status = "okay"; |
| 135 | }; |
| 136 | |
| 137 | &cpsw_emac0 { |
| 138 | status = "okay"; |
| 139 | }; |
| 140 | |
| 141 | &cpsw_emac1 { |
| 142 | status = "okay"; |
| 143 | }; |
| 144 | |
SZ Lin (林上智) | 30fd611 | 2018-09-28 18:47:16 +0800 | [diff] [blame] | 145 | &sham { |
| 146 | status = "okay"; |
| 147 | }; |
| 148 | |
| 149 | &aes { |
| 150 | status = "okay"; |
| 151 | }; |
| 152 | |
| 153 | &gpio0 { |
| 154 | ti,no-reset-on-init; |
| 155 | }; |
| 156 | |
| 157 | &mmc2 { |
| 158 | pinctrl-names = "default"; |
| 159 | vmmc-supply = <&vmmcsd_fixed>; |
| 160 | bus-width = <8>; |
| 161 | pinctrl-0 = <&mmc1_pins_default>; |
| 162 | ti,non-removable; |
| 163 | status = "okay"; |
| 164 | }; |
| 165 | |
| 166 | &buttons { |
| 167 | pinctrl-names = "default"; |
| 168 | pinctrl-0 = <&push_button_pins>; |
| 169 | #address-cells = <1>; |
| 170 | #size-cells = <0>; |
| 171 | |
| 172 | button@0 { |
| 173 | label = "push_button"; |
| 174 | linux,code = <0x100>; |
| 175 | gpios = <&gpio2 23 GPIO_ACTIVE_LOW>; |
| 176 | }; |
| 177 | }; |
| 178 | |
| 179 | /* SPI Busses */ |
| 180 | &spi0 { |
| 181 | status = "okay"; |
| 182 | pinctrl-names = "default"; |
| 183 | pinctrl-0 = <&spi0_pins>; |
| 184 | |
| 185 | m25p80@0 { |
| 186 | compatible = "mx25l6405d"; |
| 187 | spi-max-frequency = <40000000>; |
| 188 | |
| 189 | reg = <0>; |
| 190 | spi-cpol; |
| 191 | spi-cpha; |
| 192 | |
| 193 | partitions { |
| 194 | compatible = "fixed-partitions"; |
| 195 | #address-cells = <1>; |
| 196 | #size-cells = <1>; |
| 197 | |
| 198 | /* reg : The partition's offset and size within the mtd bank. */ |
| 199 | partitions@0 { |
| 200 | label = "MLO"; |
| 201 | reg = <0x0 0x80000>; |
| 202 | }; |
| 203 | |
| 204 | partitions@1 { |
| 205 | label = "U-Boot"; |
| 206 | reg = <0x80000 0x100000>; |
| 207 | }; |
| 208 | |
| 209 | partitions@2 { |
| 210 | label = "U-Boot Env"; |
| 211 | reg = <0x180000 0x40000>; |
| 212 | }; |
| 213 | }; |
| 214 | }; |
| 215 | }; |
| 216 | |
| 217 | &spi1 { |
| 218 | status = "okay"; |
| 219 | pinctrl-names = "default"; |
| 220 | pinctrl-0 = <&spi1_pins>; |
| 221 | |
| 222 | tpm_spi_tis@0 { |
| 223 | compatible = "tcg,tpm_tis-spi"; |
| 224 | reg = <0>; |
| 225 | spi-max-frequency = <500000>; |
| 226 | }; |
| 227 | }; |