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Pierre-Louis Bossart23859462019-05-01 10:57:25 -05001/* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */
2/* Copyright(c) 2015-17 Intel Corporation. */
Vinod Koul7c3cd182017-12-14 11:19:34 +05303
4#ifndef __SDW_BUS_H
5#define __SDW_BUS_H
6
Shreyas NCce6e74d2018-07-27 14:44:16 +05307#define DEFAULT_BANK_SWITCH_TIMEOUT 3000
8
Vinod Koul7c3cd182017-12-14 11:19:34 +05309#if IS_ENABLED(CONFIG_ACPI)
10int sdw_acpi_find_slaves(struct sdw_bus *bus);
11#else
12static inline int sdw_acpi_find_slaves(struct sdw_bus *bus)
13{
14 return -ENOTSUPP;
15}
16#endif
17
18void sdw_extract_slave_id(struct sdw_bus *bus,
Pierre-Louis Bossart806a11f2019-05-01 10:57:26 -050019 u64 addr, struct sdw_slave_id *id);
Vinod Koul7c3cd182017-12-14 11:19:34 +053020
Vinod Koul9d715fa2017-12-14 11:19:37 +053021enum {
22 SDW_MSG_FLAG_READ = 0,
23 SDW_MSG_FLAG_WRITE,
24};
25
26/**
27 * struct sdw_msg - Message structure
28 * @addr: Register address accessed in the Slave
29 * @len: number of messages
30 * @dev_num: Slave device number
31 * @addr_page1: SCP address page 1 Slave register
32 * @addr_page2: SCP address page 2 Slave register
33 * @flags: transfer flags, indicate if xfer is read or write
34 * @buf: message data buffer
35 * @ssp_sync: Send message at SSP (Stream Synchronization Point)
36 * @page: address requires paging
37 */
38struct sdw_msg {
39 u16 addr;
40 u16 len;
41 u8 dev_num;
42 u8 addr_page1;
43 u8 addr_page2;
44 u8 flags;
45 u8 *buf;
46 bool ssp_sync;
47 bool page;
48};
49
Sanyog Kale99b8a5d2018-04-26 18:38:28 +053050#define SDW_DOUBLE_RATE_FACTOR 2
51
52extern int rows[SDW_FRAME_ROWS];
53extern int cols[SDW_FRAME_COLS];
54
Sanyog Kale89e59052018-04-26 18:38:08 +053055/**
Sanyog Kalebbe73792018-04-26 18:38:13 +053056 * sdw_port_runtime: Runtime port parameters for Master or Slave
57 *
58 * @num: Port number. For audio streams, valid port number ranges from
59 * [1,14]
60 * @ch_mask: Channel mask
61 * @transport_params: Transport parameters
62 * @port_params: Port parameters
63 * @port_node: List node for Master or Slave port_list
64 *
65 * SoundWire spec has no mention of ports for Master interface but the
66 * concept is logically extended.
67 */
68struct sdw_port_runtime {
69 int num;
70 int ch_mask;
71 struct sdw_transport_params transport_params;
72 struct sdw_port_params port_params;
73 struct list_head port_node;
74};
75
76/**
Sanyog Kale89e59052018-04-26 18:38:08 +053077 * sdw_slave_runtime: Runtime Stream parameters for Slave
78 *
79 * @slave: Slave handle
80 * @direction: Data direction for Slave
81 * @ch_count: Number of channels handled by the Slave for
82 * this stream
83 * @m_rt_node: sdw_master_runtime list node
Sanyog Kalebbe73792018-04-26 18:38:13 +053084 * @port_list: List of Slave Ports configured for this stream
Sanyog Kale89e59052018-04-26 18:38:08 +053085 */
86struct sdw_slave_runtime {
87 struct sdw_slave *slave;
88 enum sdw_data_direction direction;
89 unsigned int ch_count;
90 struct list_head m_rt_node;
Sanyog Kalebbe73792018-04-26 18:38:13 +053091 struct list_head port_list;
Sanyog Kale89e59052018-04-26 18:38:08 +053092};
93
94/**
95 * sdw_master_runtime: Runtime stream parameters for Master
96 *
97 * @bus: Bus handle
98 * @stream: Stream runtime handle
99 * @direction: Data direction for Master
100 * @ch_count: Number of channels handled by the Master for
101 * this stream, can be zero.
102 * @slave_rt_list: Slave runtime list
Sanyog Kalebbe73792018-04-26 18:38:13 +0530103 * @port_list: List of Master Ports configured for this stream, can be zero.
Sanyog Kale0c4a1042018-07-27 14:44:13 +0530104 * @stream_node: sdw_stream_runtime master_list node
Sanyog Kale89e59052018-04-26 18:38:08 +0530105 * @bus_node: sdw_bus m_rt_list node
106 */
107struct sdw_master_runtime {
108 struct sdw_bus *bus;
109 struct sdw_stream_runtime *stream;
110 enum sdw_data_direction direction;
111 unsigned int ch_count;
112 struct list_head slave_rt_list;
Sanyog Kalebbe73792018-04-26 18:38:13 +0530113 struct list_head port_list;
Sanyog Kale0c4a1042018-07-27 14:44:13 +0530114 struct list_head stream_node;
Sanyog Kale89e59052018-04-26 18:38:08 +0530115 struct list_head bus_node;
116};
117
Sanyog Kalef8101c72018-04-26 18:38:17 +0530118struct sdw_dpn_prop *sdw_get_slave_dpn_prop(struct sdw_slave *slave,
Pierre-Louis Bossart806a11f2019-05-01 10:57:26 -0500119 enum sdw_data_direction direction,
120 unsigned int port_num);
Sanyog Kale79df15b2018-04-26 18:38:23 +0530121int sdw_configure_dpn_intr(struct sdw_slave *slave, int port,
Pierre-Louis Bossart806a11f2019-05-01 10:57:26 -0500122 bool enable, int mask);
Sanyog Kalef8101c72018-04-26 18:38:17 +0530123
Vinod Koul9d715fa2017-12-14 11:19:37 +0530124int sdw_transfer(struct sdw_bus *bus, struct sdw_msg *msg);
125int sdw_transfer_defer(struct sdw_bus *bus, struct sdw_msg *msg,
Pierre-Louis Bossart806a11f2019-05-01 10:57:26 -0500126 struct sdw_defer *defer);
Vinod Koul9d715fa2017-12-14 11:19:37 +0530127
Vinod Koulb0a9c372017-12-14 11:19:40 +0530128#define SDW_READ_INTR_CLEAR_RETRY 10
129
Vinod Koul9d715fa2017-12-14 11:19:37 +0530130int sdw_fill_msg(struct sdw_msg *msg, struct sdw_slave *slave,
Pierre-Louis Bossart806a11f2019-05-01 10:57:26 -0500131 u32 addr, size_t count, u16 dev_num, u8 flags, u8 *buf);
Vinod Koul9d715fa2017-12-14 11:19:37 +0530132
Sanyog Kaled52d7a12017-12-14 11:19:39 +0530133/* Read-Modify-Write Slave register */
134static inline int
135sdw_update(struct sdw_slave *slave, u32 addr, u8 mask, u8 val)
136{
137 int tmp;
138
139 tmp = sdw_read(slave, addr);
140 if (tmp < 0)
141 return tmp;
142
143 tmp = (tmp & ~mask) | val;
144 return sdw_write(slave, addr, tmp);
145}
146
Vinod Koul7c3cd182017-12-14 11:19:34 +0530147#endif /* __SDW_BUS_H */