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Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04001/*
2 * QLogic Fibre Channel HBA Driver
Armen Baloyanbd21eaf2014-04-11 16:54:24 -04003 * Copyright (c) 2003-2014 QLogic Corporation
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04004 *
5 * See LICENSE.qla2xxx for copyright and licensing details.
6 */
7#include "qla_def.h"
8#include <linux/delay.h>
Tina Ruchandani5ea33eb2016-01-25 23:00:20 +01009#include <linux/ktime.h>
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -040010#include <linux/pci.h>
11#include <linux/ratelimit.h>
12#include <linux/vmalloc.h>
Johannes Thumshirn75cc8cf2016-11-17 10:31:19 +010013#include <linux/bsg-lib.h>
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -040014#include <scsi/scsi_tcq.h>
15#include <linux/utsname.h>
16
17
18/* QLAFX00 specific Mailbox implementation functions */
19
20/*
21 * qlafx00_mailbox_command
22 * Issue mailbox command and waits for completion.
23 *
24 * Input:
25 * ha = adapter block pointer.
26 * mcp = driver internal mbx struct pointer.
27 *
28 * Output:
29 * mb[MAX_MAILBOX_REGISTER_COUNT] = returned mailbox data.
30 *
31 * Returns:
32 * 0 : QLA_SUCCESS = cmd performed success
33 * 1 : QLA_FUNCTION_FAILED (error encountered)
34 * 6 : QLA_FUNCTION_TIMEOUT (timeout condition encountered)
35 *
36 * Context:
37 * Kernel context.
38 */
39static int
40qlafx00_mailbox_command(scsi_qla_host_t *vha, struct mbx_cmd_32 *mcp)
41
42{
43 int rval;
44 unsigned long flags = 0;
Chad Dupuisf73cb692014-02-26 04:15:06 -050045 device_reg_t *reg;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -040046 uint8_t abort_active;
47 uint8_t io_lock_on;
48 uint16_t command = 0;
49 uint32_t *iptr;
50 uint32_t __iomem *optr;
51 uint32_t cnt;
52 uint32_t mboxes;
53 unsigned long wait_time;
54 struct qla_hw_data *ha = vha->hw;
55 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
56
57 if (ha->pdev->error_state > pci_channel_io_frozen) {
58 ql_log(ql_log_warn, vha, 0x115c,
59 "error_state is greater than pci_channel_io_frozen, "
60 "exiting.\n");
61 return QLA_FUNCTION_TIMEOUT;
62 }
63
64 if (vha->device_flags & DFLG_DEV_FAILED) {
65 ql_log(ql_log_warn, vha, 0x115f,
66 "Device in failed state, exiting.\n");
67 return QLA_FUNCTION_TIMEOUT;
68 }
69
70 reg = ha->iobase;
71 io_lock_on = base_vha->flags.init_done;
72
73 rval = QLA_SUCCESS;
74 abort_active = test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
75
76 if (ha->flags.pci_channel_io_perm_failure) {
77 ql_log(ql_log_warn, vha, 0x1175,
78 "Perm failure on EEH timeout MBX, exiting.\n");
79 return QLA_FUNCTION_TIMEOUT;
80 }
81
82 if (ha->flags.isp82xx_fw_hung) {
83 /* Setting Link-Down error */
84 mcp->mb[0] = MBS_LINK_DOWN_ERROR;
85 ql_log(ql_log_warn, vha, 0x1176,
86 "FW hung = %d.\n", ha->flags.isp82xx_fw_hung);
87 rval = QLA_FUNCTION_FAILED;
88 goto premature_exit;
89 }
90
91 /*
92 * Wait for active mailbox commands to finish by waiting at most tov
93 * seconds. This is to serialize actual issuing of mailbox cmds during
94 * non ISP abort time.
95 */
96 if (!wait_for_completion_timeout(&ha->mbx_cmd_comp, mcp->tov * HZ)) {
97 /* Timeout occurred. Return error. */
98 ql_log(ql_log_warn, vha, 0x1177,
99 "Cmd access timeout, cmd=0x%x, Exiting.\n",
100 mcp->mb[0]);
101 return QLA_FUNCTION_TIMEOUT;
102 }
103
104 ha->flags.mbox_busy = 1;
105 /* Save mailbox command for debug */
106 ha->mcp32 = mcp;
107
108 ql_dbg(ql_dbg_mbx, vha, 0x1178,
109 "Prepare to issue mbox cmd=0x%x.\n", mcp->mb[0]);
110
111 spin_lock_irqsave(&ha->hardware_lock, flags);
112
113 /* Load mailbox registers. */
114 optr = (uint32_t __iomem *)&reg->ispfx00.mailbox0;
115
116 iptr = mcp->mb;
117 command = mcp->mb[0];
118 mboxes = mcp->out_mb;
119
120 for (cnt = 0; cnt < ha->mbx_count; cnt++) {
121 if (mboxes & BIT_0)
122 WRT_REG_DWORD(optr, *iptr);
123
124 mboxes >>= 1;
125 optr++;
126 iptr++;
127 }
128
129 /* Issue set host interrupt command to send cmd out. */
130 ha->flags.mbox_int = 0;
131 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
132
133 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1172,
134 (uint8_t *)mcp->mb, 16);
135 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1173,
136 ((uint8_t *)mcp->mb + 0x10), 16);
137 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1174,
138 ((uint8_t *)mcp->mb + 0x20), 8);
139
140 /* Unlock mbx registers and wait for interrupt */
141 ql_dbg(ql_dbg_mbx, vha, 0x1179,
142 "Going to unlock irq & waiting for interrupts. "
143 "jiffies=%lx.\n", jiffies);
144
145 /* Wait for mbx cmd completion until timeout */
146 if ((!abort_active && io_lock_on) || IS_NOPOLLING_TYPE(ha)) {
147 set_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
148
149 QLAFX00_SET_HST_INTR(ha, ha->mbx_intr_code);
150 spin_unlock_irqrestore(&ha->hardware_lock, flags);
151
152 wait_for_completion_timeout(&ha->mbx_intr_comp, mcp->tov * HZ);
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -0400153 } else {
154 ql_dbg(ql_dbg_mbx, vha, 0x112c,
155 "Cmd=%x Polling Mode.\n", command);
156
157 QLAFX00_SET_HST_INTR(ha, ha->mbx_intr_code);
158 spin_unlock_irqrestore(&ha->hardware_lock, flags);
159
160 wait_time = jiffies + mcp->tov * HZ; /* wait at most tov secs */
161 while (!ha->flags.mbox_int) {
162 if (time_after(jiffies, wait_time))
163 break;
164
165 /* Check for pending interrupts. */
166 qla2x00_poll(ha->rsp_q_map[0]);
167
168 if (!ha->flags.mbox_int &&
169 !(IS_QLA2200(ha) &&
170 command == MBC_LOAD_RISC_RAM_EXTENDED))
171 usleep_range(10000, 11000);
172 } /* while */
173 ql_dbg(ql_dbg_mbx, vha, 0x112d,
174 "Waited %d sec.\n",
175 (uint)((jiffies - (wait_time - (mcp->tov * HZ)))/HZ));
176 }
177
178 /* Check whether we timed out */
179 if (ha->flags.mbox_int) {
180 uint32_t *iptr2;
181
182 ql_dbg(ql_dbg_mbx, vha, 0x112e,
183 "Cmd=%x completed.\n", command);
184
185 /* Got interrupt. Clear the flag. */
186 ha->flags.mbox_int = 0;
187 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
188
189 if (ha->mailbox_out32[0] != MBS_COMMAND_COMPLETE)
190 rval = QLA_FUNCTION_FAILED;
191
192 /* Load return mailbox registers. */
193 iptr2 = mcp->mb;
194 iptr = (uint32_t *)&ha->mailbox_out32[0];
195 mboxes = mcp->in_mb;
196 for (cnt = 0; cnt < ha->mbx_count; cnt++) {
197 if (mboxes & BIT_0)
198 *iptr2 = *iptr;
199
200 mboxes >>= 1;
201 iptr2++;
202 iptr++;
203 }
204 } else {
205
206 rval = QLA_FUNCTION_TIMEOUT;
207 }
208
209 ha->flags.mbox_busy = 0;
210
211 /* Clean up */
212 ha->mcp32 = NULL;
213
214 if ((abort_active || !io_lock_on) && !IS_NOPOLLING_TYPE(ha)) {
215 ql_dbg(ql_dbg_mbx, vha, 0x113a,
216 "checking for additional resp interrupt.\n");
217
218 /* polling mode for non isp_abort commands. */
219 qla2x00_poll(ha->rsp_q_map[0]);
220 }
221
222 if (rval == QLA_FUNCTION_TIMEOUT &&
223 mcp->mb[0] != MBC_GEN_SYSTEM_ERROR) {
224 if (!io_lock_on || (mcp->flags & IOCTL_CMD) ||
225 ha->flags.eeh_busy) {
226 /* not in dpc. schedule it for dpc to take over. */
227 ql_dbg(ql_dbg_mbx, vha, 0x115d,
228 "Timeout, schedule isp_abort_needed.\n");
229
230 if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) &&
231 !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) &&
232 !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
233
234 ql_log(ql_log_info, base_vha, 0x115e,
235 "Mailbox cmd timeout occurred, cmd=0x%x, "
236 "mb[0]=0x%x, eeh_busy=0x%x. Scheduling ISP "
237 "abort.\n", command, mcp->mb[0],
238 ha->flags.eeh_busy);
239 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
240 qla2xxx_wake_dpc(vha);
241 }
242 } else if (!abort_active) {
243 /* call abort directly since we are in the DPC thread */
244 ql_dbg(ql_dbg_mbx, vha, 0x1160,
245 "Timeout, calling abort_isp.\n");
246
247 if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) &&
248 !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) &&
249 !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
250
251 ql_log(ql_log_info, base_vha, 0x1161,
252 "Mailbox cmd timeout occurred, cmd=0x%x, "
253 "mb[0]=0x%x. Scheduling ISP abort ",
254 command, mcp->mb[0]);
255
256 set_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags);
257 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
258 if (ha->isp_ops->abort_isp(vha)) {
259 /* Failed. retry later. */
260 set_bit(ISP_ABORT_NEEDED,
261 &vha->dpc_flags);
262 }
263 clear_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags);
264 ql_dbg(ql_dbg_mbx, vha, 0x1162,
265 "Finished abort_isp.\n");
266 }
267 }
268 }
269
270premature_exit:
271 /* Allow next mbx cmd to come in. */
272 complete(&ha->mbx_cmd_comp);
273
274 if (rval) {
275 ql_log(ql_log_warn, base_vha, 0x1163,
276 "**** Failed mbx[0]=%x, mb[1]=%x, mb[2]=%x, "
277 "mb[3]=%x, cmd=%x ****.\n",
278 mcp->mb[0], mcp->mb[1], mcp->mb[2], mcp->mb[3], command);
279 } else {
280 ql_dbg(ql_dbg_mbx, base_vha, 0x1164, "Done %s.\n", __func__);
281 }
282
283 return rval;
284}
285
286/*
287 * qlafx00_driver_shutdown
288 * Indicate a driver shutdown to firmware.
289 *
290 * Input:
291 * ha = adapter block pointer.
292 *
293 * Returns:
294 * local function return status code.
295 *
296 * Context:
297 * Kernel context.
298 */
Armen Baloyan42479342013-08-27 01:37:37 -0400299int
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -0400300qlafx00_driver_shutdown(scsi_qla_host_t *vha, int tmo)
301{
302 int rval;
303 struct mbx_cmd_32 mc;
304 struct mbx_cmd_32 *mcp = &mc;
305
306 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1166,
307 "Entered %s.\n", __func__);
308
309 mcp->mb[0] = MBC_MR_DRV_SHUTDOWN;
310 mcp->out_mb = MBX_0;
311 mcp->in_mb = MBX_0;
312 if (tmo)
313 mcp->tov = tmo;
314 else
315 mcp->tov = MBX_TOV_SECONDS;
316 mcp->flags = 0;
317 rval = qlafx00_mailbox_command(vha, mcp);
318
319 if (rval != QLA_SUCCESS) {
320 ql_dbg(ql_dbg_mbx, vha, 0x1167,
321 "Failed=%x.\n", rval);
322 } else {
323 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1168,
324 "Done %s.\n", __func__);
325 }
326
327 return rval;
328}
329
330/*
331 * qlafx00_get_firmware_state
332 * Get adapter firmware state.
333 *
334 * Input:
335 * ha = adapter block pointer.
336 * TARGET_QUEUE_LOCK must be released.
337 * ADAPTER_STATE_LOCK must be released.
338 *
339 * Returns:
340 * qla7xxx local function return status code.
341 *
342 * Context:
343 * Kernel context.
344 */
345static int
346qlafx00_get_firmware_state(scsi_qla_host_t *vha, uint32_t *states)
347{
348 int rval;
349 struct mbx_cmd_32 mc;
350 struct mbx_cmd_32 *mcp = &mc;
351
352 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1169,
353 "Entered %s.\n", __func__);
354
355 mcp->mb[0] = MBC_GET_FIRMWARE_STATE;
356 mcp->out_mb = MBX_0;
357 mcp->in_mb = MBX_1|MBX_0;
358 mcp->tov = MBX_TOV_SECONDS;
359 mcp->flags = 0;
360 rval = qlafx00_mailbox_command(vha, mcp);
361
362 /* Return firmware states. */
363 states[0] = mcp->mb[1];
364
365 if (rval != QLA_SUCCESS) {
366 ql_dbg(ql_dbg_mbx, vha, 0x116a,
367 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
368 } else {
369 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x116b,
370 "Done %s.\n", __func__);
371 }
372 return rval;
373}
374
375/*
376 * qlafx00_init_firmware
377 * Initialize adapter firmware.
378 *
379 * Input:
380 * ha = adapter block pointer.
381 * dptr = Initialization control block pointer.
382 * size = size of initialization control block.
383 * TARGET_QUEUE_LOCK must be released.
384 * ADAPTER_STATE_LOCK must be released.
385 *
386 * Returns:
387 * qlafx00 local function return status code.
388 *
389 * Context:
390 * Kernel context.
391 */
392int
393qlafx00_init_firmware(scsi_qla_host_t *vha, uint16_t size)
394{
395 int rval;
396 struct mbx_cmd_32 mc;
397 struct mbx_cmd_32 *mcp = &mc;
398 struct qla_hw_data *ha = vha->hw;
399
400 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x116c,
401 "Entered %s.\n", __func__);
402
403 mcp->mb[0] = MBC_INITIALIZE_FIRMWARE;
404
405 mcp->mb[1] = 0;
406 mcp->mb[2] = MSD(ha->init_cb_dma);
407 mcp->mb[3] = LSD(ha->init_cb_dma);
408
409 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
410 mcp->in_mb = MBX_0;
411 mcp->buf_size = size;
412 mcp->flags = MBX_DMA_OUT;
413 mcp->tov = MBX_TOV_SECONDS;
414 rval = qlafx00_mailbox_command(vha, mcp);
415
416 if (rval != QLA_SUCCESS) {
417 ql_dbg(ql_dbg_mbx, vha, 0x116d,
418 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
419 } else {
420 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x116e,
421 "Done %s.\n", __func__);
422 }
423 return rval;
424}
425
426/*
427 * qlafx00_mbx_reg_test
428 */
429static int
430qlafx00_mbx_reg_test(scsi_qla_host_t *vha)
431{
432 int rval;
433 struct mbx_cmd_32 mc;
434 struct mbx_cmd_32 *mcp = &mc;
435
436 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x116f,
437 "Entered %s.\n", __func__);
438
439
440 mcp->mb[0] = MBC_MAILBOX_REGISTER_TEST;
441 mcp->mb[1] = 0xAAAA;
442 mcp->mb[2] = 0x5555;
443 mcp->mb[3] = 0xAA55;
444 mcp->mb[4] = 0x55AA;
445 mcp->mb[5] = 0xA5A5;
446 mcp->mb[6] = 0x5A5A;
447 mcp->mb[7] = 0x2525;
448 mcp->mb[8] = 0xBBBB;
449 mcp->mb[9] = 0x6666;
450 mcp->mb[10] = 0xBB66;
451 mcp->mb[11] = 0x66BB;
452 mcp->mb[12] = 0xB6B6;
453 mcp->mb[13] = 0x6B6B;
454 mcp->mb[14] = 0x3636;
455 mcp->mb[15] = 0xCCCC;
456
457
458 mcp->out_mb = MBX_15|MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8|
459 MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
460 mcp->in_mb = MBX_15|MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8|
461 MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
462 mcp->buf_size = 0;
463 mcp->flags = MBX_DMA_OUT;
464 mcp->tov = MBX_TOV_SECONDS;
465 rval = qlafx00_mailbox_command(vha, mcp);
466 if (rval == QLA_SUCCESS) {
467 if (mcp->mb[17] != 0xAAAA || mcp->mb[18] != 0x5555 ||
468 mcp->mb[19] != 0xAA55 || mcp->mb[20] != 0x55AA)
469 rval = QLA_FUNCTION_FAILED;
470 if (mcp->mb[21] != 0xA5A5 || mcp->mb[22] != 0x5A5A ||
471 mcp->mb[23] != 0x2525 || mcp->mb[24] != 0xBBBB)
472 rval = QLA_FUNCTION_FAILED;
473 if (mcp->mb[25] != 0x6666 || mcp->mb[26] != 0xBB66 ||
474 mcp->mb[27] != 0x66BB || mcp->mb[28] != 0xB6B6)
475 rval = QLA_FUNCTION_FAILED;
476 if (mcp->mb[29] != 0x6B6B || mcp->mb[30] != 0x3636 ||
477 mcp->mb[31] != 0xCCCC)
478 rval = QLA_FUNCTION_FAILED;
479 }
480
481 if (rval != QLA_SUCCESS) {
482 ql_dbg(ql_dbg_mbx, vha, 0x1170,
483 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
484 } else {
485 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1171,
486 "Done %s.\n", __func__);
487 }
488 return rval;
489}
490
491/**
492 * qlafx00_pci_config() - Setup ISPFx00 PCI configuration registers.
Bart Van Assche2db62282018-01-23 16:33:51 -0800493 * @vha: HA context
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -0400494 *
495 * Returns 0 on success.
496 */
497int
498qlafx00_pci_config(scsi_qla_host_t *vha)
499{
500 uint16_t w;
501 struct qla_hw_data *ha = vha->hw;
502
503 pci_set_master(ha->pdev);
504 pci_try_set_mwi(ha->pdev);
505
506 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
507 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
508 w &= ~PCI_COMMAND_INTX_DISABLE;
509 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
510
511 /* PCIe -- adjust Maximum Read Request Size (2048). */
Yijing Wangce9f7ed2013-09-05 15:55:30 +0800512 if (pci_is_pcie(ha->pdev))
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -0400513 pcie_set_readrq(ha->pdev, 2048);
514
515 ha->chip_revision = ha->pdev->revision;
516
517 return QLA_SUCCESS;
518}
519
520/**
521 * qlafx00_warm_reset() - Perform warm reset of iSA(CPUs being reset on SOC).
Bart Van Assche2db62282018-01-23 16:33:51 -0800522 * @vha: HA context
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -0400523 *
Bart Van Assche2db62282018-01-23 16:33:51 -0800524 */
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -0400525static inline void
526qlafx00_soc_cpu_reset(scsi_qla_host_t *vha)
527{
528 unsigned long flags = 0;
529 struct qla_hw_data *ha = vha->hw;
530 int i, core;
531 uint32_t cnt;
Armen Baloyan42543fb2014-04-11 16:54:32 -0400532 uint32_t reg_val;
533
534 spin_lock_irqsave(&ha->hardware_lock, flags);
535
536 QLAFX00_SET_HBA_SOC_REG(ha, 0x80004, 0);
537 QLAFX00_SET_HBA_SOC_REG(ha, 0x82004, 0);
538
539 /* stop the XOR DMA engines */
540 QLAFX00_SET_HBA_SOC_REG(ha, 0x60920, 0x02);
541 QLAFX00_SET_HBA_SOC_REG(ha, 0x60924, 0x02);
542 QLAFX00_SET_HBA_SOC_REG(ha, 0xf0920, 0x02);
543 QLAFX00_SET_HBA_SOC_REG(ha, 0xf0924, 0x02);
544
545 /* stop the IDMA engines */
546 reg_val = QLAFX00_GET_HBA_SOC_REG(ha, 0x60840);
547 reg_val &= ~(1<<12);
548 QLAFX00_SET_HBA_SOC_REG(ha, 0x60840, reg_val);
549
550 reg_val = QLAFX00_GET_HBA_SOC_REG(ha, 0x60844);
551 reg_val &= ~(1<<12);
552 QLAFX00_SET_HBA_SOC_REG(ha, 0x60844, reg_val);
553
554 reg_val = QLAFX00_GET_HBA_SOC_REG(ha, 0x60848);
555 reg_val &= ~(1<<12);
556 QLAFX00_SET_HBA_SOC_REG(ha, 0x60848, reg_val);
557
558 reg_val = QLAFX00_GET_HBA_SOC_REG(ha, 0x6084C);
559 reg_val &= ~(1<<12);
560 QLAFX00_SET_HBA_SOC_REG(ha, 0x6084C, reg_val);
561
562 for (i = 0; i < 100000; i++) {
563 if ((QLAFX00_GET_HBA_SOC_REG(ha, 0xd0000) & 0x10000000) == 0 &&
564 (QLAFX00_GET_HBA_SOC_REG(ha, 0x10600) & 0x1) == 0)
565 break;
566 udelay(100);
567 }
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -0400568
569 /* Set all 4 cores in reset */
570 for (i = 0; i < 4; i++) {
571 QLAFX00_SET_HBA_SOC_REG(ha,
572 (SOC_SW_RST_CONTROL_REG_CORE0 + 8*i), (0xF01));
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -0400573 QLAFX00_SET_HBA_SOC_REG(ha,
574 (SOC_SW_RST_CONTROL_REG_CORE0 + 4 + 8*i), (0x01010101));
575 }
576
577 /* Reset all units in Fabric */
Armen Baloyan42543fb2014-04-11 16:54:32 -0400578 QLAFX00_SET_HBA_SOC_REG(ha, SOC_FABRIC_RST_CONTROL_REG, (0x011f0101));
579
580 /* */
581 QLAFX00_SET_HBA_SOC_REG(ha, 0x10610, 1);
582 QLAFX00_SET_HBA_SOC_REG(ha, 0x10600, 0);
583
584 /* Set all 4 core Memory Power Down Registers */
585 for (i = 0; i < 5; i++) {
586 QLAFX00_SET_HBA_SOC_REG(ha,
587 (SOC_PWR_MANAGEMENT_PWR_DOWN_REG + 4*i), (0x0));
588 }
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -0400589
590 /* Reset all interrupt control registers */
591 for (i = 0; i < 115; i++) {
592 QLAFX00_SET_HBA_SOC_REG(ha,
593 (SOC_INTERRUPT_SOURCE_I_CONTROL_REG + 4*i), (0x0));
594 }
595
596 /* Reset Timers control registers. per core */
597 for (core = 0; core < 4; core++)
598 for (i = 0; i < 8; i++)
599 QLAFX00_SET_HBA_SOC_REG(ha,
600 (SOC_CORE_TIMER_REG + 0x100*core + 4*i), (0x0));
601
602 /* Reset per core IRQ ack register */
603 for (core = 0; core < 4; core++)
604 QLAFX00_SET_HBA_SOC_REG(ha,
605 (SOC_IRQ_ACK_REG + 0x100*core), (0x3FF));
606
607 /* Set Fabric control and config to defaults */
608 QLAFX00_SET_HBA_SOC_REG(ha, SOC_FABRIC_CONTROL_REG, (0x2));
609 QLAFX00_SET_HBA_SOC_REG(ha, SOC_FABRIC_CONFIG_REG, (0x3));
610
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -0400611 /* Kick in Fabric units */
612 QLAFX00_SET_HBA_SOC_REG(ha, SOC_FABRIC_RST_CONTROL_REG, (0x0));
613
614 /* Kick in Core0 to start boot process */
615 QLAFX00_SET_HBA_SOC_REG(ha, SOC_SW_RST_CONTROL_REG_CORE0, (0xF00));
616
Saurav Kashyapec1937a2014-04-11 16:54:06 -0400617 spin_unlock_irqrestore(&ha->hardware_lock, flags);
618
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -0400619 /* Wait 10secs for soft-reset to complete. */
620 for (cnt = 10; cnt; cnt--) {
621 msleep(1000);
622 barrier();
623 }
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -0400624}
625
626/**
627 * qlafx00_soft_reset() - Soft Reset ISPFx00.
Bart Van Assche2db62282018-01-23 16:33:51 -0800628 * @vha: HA context
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -0400629 *
630 * Returns 0 on success.
631 */
Michael Hernandez3f006ac2019-03-12 11:08:22 -0700632int
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -0400633qlafx00_soft_reset(scsi_qla_host_t *vha)
634{
635 struct qla_hw_data *ha = vha->hw;
Michael Hernandez3f006ac2019-03-12 11:08:22 -0700636 int rval = QLA_FUNCTION_FAILED;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -0400637
638 if (unlikely(pci_channel_offline(ha->pdev) &&
639 ha->flags.pci_channel_io_perm_failure))
Michael Hernandez3f006ac2019-03-12 11:08:22 -0700640 return rval;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -0400641
642 ha->isp_ops->disable_intrs(ha);
643 qlafx00_soc_cpu_reset(vha);
Michael Hernandez3f006ac2019-03-12 11:08:22 -0700644
645 return QLA_SUCCESS;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -0400646}
647
648/**
649 * qlafx00_chip_diag() - Test ISPFx00 for proper operation.
Bart Van Assche2db62282018-01-23 16:33:51 -0800650 * @vha: HA context
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -0400651 *
652 * Returns 0 on success.
653 */
654int
655qlafx00_chip_diag(scsi_qla_host_t *vha)
656{
657 int rval = 0;
658 struct qla_hw_data *ha = vha->hw;
659 struct req_que *req = ha->req_q_map[0];
660
661 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
662
663 rval = qlafx00_mbx_reg_test(vha);
664 if (rval) {
665 ql_log(ql_log_warn, vha, 0x1165,
666 "Failed mailbox send register test\n");
667 } else {
668 /* Flag a successful rval */
669 rval = QLA_SUCCESS;
670 }
671 return rval;
672}
673
674void
675qlafx00_config_rings(struct scsi_qla_host *vha)
676{
677 struct qla_hw_data *ha = vha->hw;
678 struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -0400679
680 WRT_REG_DWORD(&reg->req_q_in, 0);
681 WRT_REG_DWORD(&reg->req_q_out, 0);
682
683 WRT_REG_DWORD(&reg->rsp_q_in, 0);
684 WRT_REG_DWORD(&reg->rsp_q_out, 0);
685
686 /* PCI posting */
687 RD_REG_DWORD(&reg->rsp_q_out);
688}
689
690char *
691qlafx00_pci_info_str(struct scsi_qla_host *vha, char *str)
692{
693 struct qla_hw_data *ha = vha->hw;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -0400694
Yijing Wangce9f7ed2013-09-05 15:55:30 +0800695 if (pci_is_pcie(ha->pdev)) {
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -0400696 strcpy(str, "PCIe iSA");
697 return str;
698 }
699 return str;
700}
701
702char *
Himanshu Madhanidf57cab2014-09-25 05:16:46 -0400703qlafx00_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -0400704{
705 struct qla_hw_data *ha = vha->hw;
706
Himanshu Madhanidf57cab2014-09-25 05:16:46 -0400707 snprintf(str, size, "%s", ha->mr.fw_version);
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -0400708 return str;
709}
710
711void
712qlafx00_enable_intrs(struct qla_hw_data *ha)
713{
714 unsigned long flags = 0;
715
716 spin_lock_irqsave(&ha->hardware_lock, flags);
717 ha->interrupts_on = 1;
718 QLAFX00_ENABLE_ICNTRL_REG(ha);
719 spin_unlock_irqrestore(&ha->hardware_lock, flags);
720}
721
722void
723qlafx00_disable_intrs(struct qla_hw_data *ha)
724{
725 unsigned long flags = 0;
726
727 spin_lock_irqsave(&ha->hardware_lock, flags);
728 ha->interrupts_on = 0;
729 QLAFX00_DISABLE_ICNTRL_REG(ha);
730 spin_unlock_irqrestore(&ha->hardware_lock, flags);
731}
732
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -0400733int
Hannes Reinecke9cb78c12014-06-25 15:27:36 +0200734qlafx00_abort_target(fc_port_t *fcport, uint64_t l, int tag)
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -0400735{
Armen Baloyanfaef62d2014-02-26 04:15:17 -0500736 return qla2x00_async_tm_cmd(fcport, TCF_TARGET_RESET, l, tag);
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -0400737}
738
739int
Hannes Reinecke9cb78c12014-06-25 15:27:36 +0200740qlafx00_lun_reset(fc_port_t *fcport, uint64_t l, int tag)
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -0400741{
Armen Baloyanfaef62d2014-02-26 04:15:17 -0500742 return qla2x00_async_tm_cmd(fcport, TCF_LUN_RESET, l, tag);
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -0400743}
744
745int
Armen Baloyan58547712013-08-27 01:37:33 -0400746qlafx00_loop_reset(scsi_qla_host_t *vha)
747{
748 int ret;
749 struct fc_port *fcport;
750 struct qla_hw_data *ha = vha->hw;
751
752 if (ql2xtargetreset) {
753 list_for_each_entry(fcport, &vha->vp_fcports, list) {
754 if (fcport->port_type != FCT_TARGET)
755 continue;
756
757 ret = ha->isp_ops->target_reset(fcport, 0, 0);
758 if (ret != QLA_SUCCESS) {
759 ql_dbg(ql_dbg_taskm, vha, 0x803d,
760 "Bus Reset failed: Reset=%d "
761 "d_id=%x.\n", ret, fcport->d_id.b24);
762 }
763 }
764 }
765 return QLA_SUCCESS;
766}
767
768int
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -0400769qlafx00_iospace_config(struct qla_hw_data *ha)
770{
771 if (pci_request_selected_regions(ha->pdev, ha->bars,
772 QLA2XXX_DRIVER_NAME)) {
773 ql_log_pci(ql_log_fatal, ha->pdev, 0x014e,
774 "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
775 pci_name(ha->pdev));
776 goto iospace_error_exit;
777 }
778
779 /* Use MMIO operations for all accesses. */
780 if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) {
781 ql_log_pci(ql_log_warn, ha->pdev, 0x014f,
782 "Invalid pci I/O region size (%s).\n",
783 pci_name(ha->pdev));
784 goto iospace_error_exit;
785 }
786 if (pci_resource_len(ha->pdev, 0) < BAR0_LEN_FX00) {
787 ql_log_pci(ql_log_warn, ha->pdev, 0x0127,
788 "Invalid PCI mem BAR0 region size (%s), aborting\n",
789 pci_name(ha->pdev));
790 goto iospace_error_exit;
791 }
792
793 ha->cregbase =
794 ioremap_nocache(pci_resource_start(ha->pdev, 0), BAR0_LEN_FX00);
795 if (!ha->cregbase) {
796 ql_log_pci(ql_log_fatal, ha->pdev, 0x0128,
797 "cannot remap MMIO (%s), aborting\n", pci_name(ha->pdev));
798 goto iospace_error_exit;
799 }
800
801 if (!(pci_resource_flags(ha->pdev, 2) & IORESOURCE_MEM)) {
802 ql_log_pci(ql_log_warn, ha->pdev, 0x0129,
803 "region #2 not an MMIO resource (%s), aborting\n",
804 pci_name(ha->pdev));
805 goto iospace_error_exit;
806 }
807 if (pci_resource_len(ha->pdev, 2) < BAR2_LEN_FX00) {
808 ql_log_pci(ql_log_warn, ha->pdev, 0x012a,
809 "Invalid PCI mem BAR2 region size (%s), aborting\n",
810 pci_name(ha->pdev));
811 goto iospace_error_exit;
812 }
813
814 ha->iobase =
815 ioremap_nocache(pci_resource_start(ha->pdev, 2), BAR2_LEN_FX00);
816 if (!ha->iobase) {
817 ql_log_pci(ql_log_fatal, ha->pdev, 0x012b,
818 "cannot remap MMIO (%s), aborting\n", pci_name(ha->pdev));
819 goto iospace_error_exit;
820 }
821
822 /* Determine queue resources */
823 ha->max_req_queues = ha->max_rsp_queues = 1;
824
825 ql_log_pci(ql_log_info, ha->pdev, 0x012c,
826 "Bars 0x%x, iobase0 0x%p, iobase2 0x%p\n",
827 ha->bars, ha->cregbase, ha->iobase);
828
829 return 0;
830
831iospace_error_exit:
832 return -ENOMEM;
833}
834
835static void
836qlafx00_save_queue_ptrs(struct scsi_qla_host *vha)
837{
838 struct qla_hw_data *ha = vha->hw;
839 struct req_que *req = ha->req_q_map[0];
840 struct rsp_que *rsp = ha->rsp_q_map[0];
841
842 req->length_fx00 = req->length;
843 req->ring_fx00 = req->ring;
844 req->dma_fx00 = req->dma;
845
846 rsp->length_fx00 = rsp->length;
847 rsp->ring_fx00 = rsp->ring;
848 rsp->dma_fx00 = rsp->dma;
849
850 ql_dbg(ql_dbg_init, vha, 0x012d,
851 "req: %p, ring_fx00: %p, length_fx00: 0x%x,"
852 "req->dma_fx00: 0x%llx\n", req, req->ring_fx00,
853 req->length_fx00, (u64)req->dma_fx00);
854
855 ql_dbg(ql_dbg_init, vha, 0x012e,
856 "rsp: %p, ring_fx00: %p, length_fx00: 0x%x,"
857 "rsp->dma_fx00: 0x%llx\n", rsp, rsp->ring_fx00,
858 rsp->length_fx00, (u64)rsp->dma_fx00);
859}
860
861static int
862qlafx00_config_queues(struct scsi_qla_host *vha)
863{
864 struct qla_hw_data *ha = vha->hw;
865 struct req_que *req = ha->req_q_map[0];
866 struct rsp_que *rsp = ha->rsp_q_map[0];
867 dma_addr_t bar2_hdl = pci_resource_start(ha->pdev, 2);
868
869 req->length = ha->req_que_len;
Bart Van Assche8dfa4b5a2015-07-09 07:24:50 -0700870 req->ring = (void __force *)ha->iobase + ha->req_que_off;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -0400871 req->dma = bar2_hdl + ha->req_que_off;
872 if ((!req->ring) || (req->length == 0)) {
873 ql_log_pci(ql_log_info, ha->pdev, 0x012f,
874 "Unable to allocate memory for req_ring\n");
875 return QLA_FUNCTION_FAILED;
876 }
877
878 ql_dbg(ql_dbg_init, vha, 0x0130,
879 "req: %p req_ring pointer %p req len 0x%x "
880 "req off 0x%x\n, req->dma: 0x%llx",
881 req, req->ring, req->length,
882 ha->req_que_off, (u64)req->dma);
883
884 rsp->length = ha->rsp_que_len;
Bart Van Assche8dfa4b5a2015-07-09 07:24:50 -0700885 rsp->ring = (void __force *)ha->iobase + ha->rsp_que_off;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -0400886 rsp->dma = bar2_hdl + ha->rsp_que_off;
887 if ((!rsp->ring) || (rsp->length == 0)) {
888 ql_log_pci(ql_log_info, ha->pdev, 0x0131,
889 "Unable to allocate memory for rsp_ring\n");
890 return QLA_FUNCTION_FAILED;
891 }
892
893 ql_dbg(ql_dbg_init, vha, 0x0132,
894 "rsp: %p rsp_ring pointer %p rsp len 0x%x "
895 "rsp off 0x%x, rsp->dma: 0x%llx\n",
896 rsp, rsp->ring, rsp->length,
897 ha->rsp_que_off, (u64)rsp->dma);
898
899 return QLA_SUCCESS;
900}
901
902static int
903qlafx00_init_fw_ready(scsi_qla_host_t *vha)
904{
905 int rval = 0;
906 unsigned long wtime;
907 uint16_t wait_time; /* Wait time */
908 struct qla_hw_data *ha = vha->hw;
909 struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00;
910 uint32_t aenmbx, aenmbx7 = 0;
Armen Baloyanf9a2a542013-08-27 01:37:42 -0400911 uint32_t pseudo_aen;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -0400912 uint32_t state[5];
913 bool done = false;
914
915 /* 30 seconds wait - Adjust if required */
916 wait_time = 30;
917
Armen Baloyanf9a2a542013-08-27 01:37:42 -0400918 pseudo_aen = RD_REG_DWORD(&reg->pseudoaen);
919 if (pseudo_aen == 1) {
920 aenmbx7 = RD_REG_DWORD(&reg->initval7);
921 ha->mbx_intr_code = MSW(aenmbx7);
922 ha->rqstq_intr_code = LSW(aenmbx7);
923 rval = qlafx00_driver_shutdown(vha, 10);
924 if (rval != QLA_SUCCESS)
925 qlafx00_soft_reset(vha);
926 }
927
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -0400928 /* wait time before firmware ready */
929 wtime = jiffies + (wait_time * HZ);
930 do {
931 aenmbx = RD_REG_DWORD(&reg->aenmailbox0);
932 barrier();
933 ql_dbg(ql_dbg_mbx, vha, 0x0133,
934 "aenmbx: 0x%x\n", aenmbx);
935
936 switch (aenmbx) {
937 case MBA_FW_NOT_STARTED:
938 case MBA_FW_STARTING:
939 break;
940
941 case MBA_SYSTEM_ERR:
942 case MBA_REQ_TRANSFER_ERR:
943 case MBA_RSP_TRANSFER_ERR:
944 case MBA_FW_INIT_FAILURE:
945 qlafx00_soft_reset(vha);
946 break;
947
948 case MBA_FW_RESTART_CMPLT:
949 /* Set the mbx and rqstq intr code */
950 aenmbx7 = RD_REG_DWORD(&reg->aenmailbox7);
951 ha->mbx_intr_code = MSW(aenmbx7);
952 ha->rqstq_intr_code = LSW(aenmbx7);
953 ha->req_que_off = RD_REG_DWORD(&reg->aenmailbox1);
954 ha->rsp_que_off = RD_REG_DWORD(&reg->aenmailbox3);
955 ha->req_que_len = RD_REG_DWORD(&reg->aenmailbox5);
956 ha->rsp_que_len = RD_REG_DWORD(&reg->aenmailbox6);
957 WRT_REG_DWORD(&reg->aenmailbox0, 0);
958 RD_REG_DWORD_RELAXED(&reg->aenmailbox0);
959 ql_dbg(ql_dbg_init, vha, 0x0134,
960 "f/w returned mbx_intr_code: 0x%x, "
961 "rqstq_intr_code: 0x%x\n",
962 ha->mbx_intr_code, ha->rqstq_intr_code);
963 QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS);
964 rval = QLA_SUCCESS;
965 done = true;
966 break;
967
968 default:
Armen Baloyan0f8cdff2014-02-26 04:14:57 -0500969 if ((aenmbx & 0xFF00) == MBA_FW_INIT_INPROGRESS)
970 break;
971
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -0400972 /* If fw is apparently not ready. In order to continue,
973 * we might need to issue Mbox cmd, but the problem is
974 * that the DoorBell vector values that come with the
975 * 8060 AEN are most likely gone by now (and thus no
976 * bell would be rung on the fw side when mbox cmd is
977 * issued). We have to therefore grab the 8060 AEN
978 * shadow regs (filled in by FW when the last 8060
979 * AEN was being posted).
980 * Do the following to determine what is needed in
981 * order to get the FW ready:
982 * 1. reload the 8060 AEN values from the shadow regs
983 * 2. clear int status to get rid of possible pending
984 * interrupts
985 * 3. issue Get FW State Mbox cmd to determine fw state
986 * Set the mbx and rqstq intr code from Shadow Regs
987 */
988 aenmbx7 = RD_REG_DWORD(&reg->initval7);
989 ha->mbx_intr_code = MSW(aenmbx7);
990 ha->rqstq_intr_code = LSW(aenmbx7);
991 ha->req_que_off = RD_REG_DWORD(&reg->initval1);
992 ha->rsp_que_off = RD_REG_DWORD(&reg->initval3);
993 ha->req_que_len = RD_REG_DWORD(&reg->initval5);
994 ha->rsp_que_len = RD_REG_DWORD(&reg->initval6);
995 ql_dbg(ql_dbg_init, vha, 0x0135,
996 "f/w returned mbx_intr_code: 0x%x, "
997 "rqstq_intr_code: 0x%x\n",
998 ha->mbx_intr_code, ha->rqstq_intr_code);
999 QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS);
1000
1001 /* Get the FW state */
1002 rval = qlafx00_get_firmware_state(vha, state);
1003 if (rval != QLA_SUCCESS) {
1004 /* Retry if timer has not expired */
1005 break;
1006 }
1007
1008 if (state[0] == FSTATE_FX00_CONFIG_WAIT) {
1009 /* Firmware is waiting to be
1010 * initialized by driver
1011 */
1012 rval = QLA_SUCCESS;
1013 done = true;
1014 break;
1015 }
1016
1017 /* Issue driver shutdown and wait until f/w recovers.
1018 * Driver should continue to poll until 8060 AEN is
1019 * received indicating firmware recovery.
1020 */
1021 ql_dbg(ql_dbg_init, vha, 0x0136,
1022 "Sending Driver shutdown fw_state 0x%x\n",
1023 state[0]);
1024
1025 rval = qlafx00_driver_shutdown(vha, 10);
1026 if (rval != QLA_SUCCESS) {
1027 rval = QLA_FUNCTION_FAILED;
1028 break;
1029 }
1030 msleep(500);
1031
1032 wtime = jiffies + (wait_time * HZ);
1033 break;
1034 }
1035
1036 if (!done) {
1037 if (time_after_eq(jiffies, wtime)) {
1038 ql_dbg(ql_dbg_init, vha, 0x0137,
1039 "Init f/w failed: aen[7]: 0x%x\n",
1040 RD_REG_DWORD(&reg->aenmailbox7));
1041 rval = QLA_FUNCTION_FAILED;
1042 done = true;
1043 break;
1044 }
1045 /* Delay for a while */
1046 msleep(500);
1047 }
1048 } while (!done);
1049
1050 if (rval)
1051 ql_dbg(ql_dbg_init, vha, 0x0138,
1052 "%s **** FAILED ****.\n", __func__);
1053 else
1054 ql_dbg(ql_dbg_init, vha, 0x0139,
1055 "%s **** SUCCESS ****.\n", __func__);
1056
1057 return rval;
1058}
1059
1060/*
1061 * qlafx00_fw_ready() - Waits for firmware ready.
1062 * @ha: HA context
1063 *
1064 * Returns 0 on success.
1065 */
1066int
1067qlafx00_fw_ready(scsi_qla_host_t *vha)
1068{
1069 int rval;
1070 unsigned long wtime;
1071 uint16_t wait_time; /* Wait time if loop is coming ready */
1072 uint32_t state[5];
1073
1074 rval = QLA_SUCCESS;
1075
1076 wait_time = 10;
1077
1078 /* wait time before firmware ready */
1079 wtime = jiffies + (wait_time * HZ);
1080
1081 /* Wait for ISP to finish init */
1082 if (!vha->flags.init_done)
1083 ql_dbg(ql_dbg_init, vha, 0x013a,
1084 "Waiting for init to complete...\n");
1085
1086 do {
1087 rval = qlafx00_get_firmware_state(vha, state);
1088
1089 if (rval == QLA_SUCCESS) {
1090 if (state[0] == FSTATE_FX00_INITIALIZED) {
1091 ql_dbg(ql_dbg_init, vha, 0x013b,
1092 "fw_state=%x\n", state[0]);
1093 rval = QLA_SUCCESS;
1094 break;
1095 }
1096 }
1097 rval = QLA_FUNCTION_FAILED;
1098
1099 if (time_after_eq(jiffies, wtime))
1100 break;
1101
1102 /* Delay for a while */
1103 msleep(500);
1104
1105 ql_dbg(ql_dbg_init, vha, 0x013c,
1106 "fw_state=%x curr time=%lx.\n", state[0], jiffies);
1107 } while (1);
1108
1109
1110 if (rval)
1111 ql_dbg(ql_dbg_init, vha, 0x013d,
1112 "Firmware ready **** FAILED ****.\n");
1113 else
1114 ql_dbg(ql_dbg_init, vha, 0x013e,
1115 "Firmware ready **** SUCCESS ****.\n");
1116
1117 return rval;
1118}
1119
1120static int
1121qlafx00_find_all_targets(scsi_qla_host_t *vha,
1122 struct list_head *new_fcports)
1123{
1124 int rval;
1125 uint16_t tgt_id;
1126 fc_port_t *fcport, *new_fcport;
1127 int found;
1128 struct qla_hw_data *ha = vha->hw;
1129
1130 rval = QLA_SUCCESS;
1131
1132 if (!test_bit(LOOP_RESYNC_ACTIVE, &vha->dpc_flags))
1133 return QLA_FUNCTION_FAILED;
1134
1135 if ((atomic_read(&vha->loop_down_timer) ||
1136 STATE_TRANSITION(vha))) {
1137 atomic_set(&vha->loop_down_timer, 0);
1138 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1139 return QLA_FUNCTION_FAILED;
1140 }
1141
1142 ql_dbg(ql_dbg_disc + ql_dbg_init, vha, 0x2088,
1143 "Listing Target bit map...\n");
Joe Carnucciof8f97b02019-03-12 11:08:16 -07001144 ql_dump_buffer(ql_dbg_disc + ql_dbg_init, vha, 0x2089,
1145 ha->gid_list, 32);
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04001146
1147 /* Allocate temporary rmtport for any new rmtports discovered. */
1148 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
1149 if (new_fcport == NULL)
1150 return QLA_MEMORY_ALLOC_FAILED;
1151
1152 for_each_set_bit(tgt_id, (void *)ha->gid_list,
1153 QLAFX00_TGT_NODE_LIST_SIZE) {
1154
1155 /* Send get target node info */
1156 new_fcport->tgt_id = tgt_id;
1157 rval = qlafx00_fx_disc(vha, new_fcport,
1158 FXDISC_GET_TGT_NODE_INFO);
1159 if (rval != QLA_SUCCESS) {
1160 ql_log(ql_log_warn, vha, 0x208a,
1161 "Target info scan failed -- assuming zero-entry "
1162 "result...\n");
1163 continue;
1164 }
1165
1166 /* Locate matching device in database. */
1167 found = 0;
1168 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1169 if (memcmp(new_fcport->port_name,
1170 fcport->port_name, WWN_SIZE))
1171 continue;
1172
1173 found++;
1174
1175 /*
1176 * If tgt_id is same and state FCS_ONLINE, nothing
1177 * changed.
1178 */
1179 if (fcport->tgt_id == new_fcport->tgt_id &&
1180 atomic_read(&fcport->state) == FCS_ONLINE)
1181 break;
1182
1183 /*
1184 * Tgt ID changed or device was marked to be updated.
1185 */
1186 ql_dbg(ql_dbg_disc + ql_dbg_init, vha, 0x208b,
1187 "TGT-ID Change(%s): Present tgt id: "
1188 "0x%x state: 0x%x "
1189 "wwnn = %llx wwpn = %llx.\n",
1190 __func__, fcport->tgt_id,
1191 atomic_read(&fcport->state),
1192 (unsigned long long)wwn_to_u64(fcport->node_name),
1193 (unsigned long long)wwn_to_u64(fcport->port_name));
1194
1195 ql_log(ql_log_info, vha, 0x208c,
1196 "TGT-ID Announce(%s): Discovered tgt "
1197 "id 0x%x wwnn = %llx "
1198 "wwpn = %llx.\n", __func__, new_fcport->tgt_id,
1199 (unsigned long long)
1200 wwn_to_u64(new_fcport->node_name),
1201 (unsigned long long)
1202 wwn_to_u64(new_fcport->port_name));
1203
1204 if (atomic_read(&fcport->state) != FCS_ONLINE) {
1205 fcport->old_tgt_id = fcport->tgt_id;
1206 fcport->tgt_id = new_fcport->tgt_id;
1207 ql_log(ql_log_info, vha, 0x208d,
1208 "TGT-ID: New fcport Added: %p\n", fcport);
1209 qla2x00_update_fcport(vha, fcport);
1210 } else {
1211 ql_log(ql_log_info, vha, 0x208e,
1212 " Existing TGT-ID %x did not get "
1213 " offline event from firmware.\n",
1214 fcport->old_tgt_id);
1215 qla2x00_mark_device_lost(vha, fcport, 0, 0);
1216 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1217 kfree(new_fcport);
1218 return rval;
1219 }
1220 break;
1221 }
1222
1223 if (found)
1224 continue;
1225
1226 /* If device was not in our fcports list, then add it. */
1227 list_add_tail(&new_fcport->list, new_fcports);
1228
1229 /* Allocate a new replacement fcport. */
1230 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
1231 if (new_fcport == NULL)
1232 return QLA_MEMORY_ALLOC_FAILED;
1233 }
1234
1235 kfree(new_fcport);
1236 return rval;
1237}
1238
1239/*
1240 * qlafx00_configure_all_targets
1241 * Setup target devices with node ID's.
1242 *
1243 * Input:
1244 * ha = adapter block pointer.
1245 *
1246 * Returns:
1247 * 0 = success.
1248 * BIT_0 = error
1249 */
1250static int
1251qlafx00_configure_all_targets(scsi_qla_host_t *vha)
1252{
1253 int rval;
1254 fc_port_t *fcport, *rmptemp;
1255 LIST_HEAD(new_fcports);
1256
1257 rval = qlafx00_fx_disc(vha, &vha->hw->mr.fcport,
1258 FXDISC_GET_TGT_NODE_LIST);
1259 if (rval != QLA_SUCCESS) {
1260 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1261 return rval;
1262 }
1263
1264 rval = qlafx00_find_all_targets(vha, &new_fcports);
1265 if (rval != QLA_SUCCESS) {
1266 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1267 return rval;
1268 }
1269
1270 /*
1271 * Delete all previous devices marked lost.
1272 */
1273 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1274 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
1275 break;
1276
1277 if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) {
1278 if (fcport->port_type != FCT_INITIATOR)
1279 qla2x00_mark_device_lost(vha, fcport, 0, 0);
1280 }
1281 }
1282
1283 /*
1284 * Add the new devices to our devices list.
1285 */
1286 list_for_each_entry_safe(fcport, rmptemp, &new_fcports, list) {
1287 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
1288 break;
1289
1290 qla2x00_update_fcport(vha, fcport);
1291 list_move_tail(&fcport->list, &vha->vp_fcports);
1292 ql_log(ql_log_info, vha, 0x208f,
1293 "Attach new target id 0x%x wwnn = %llx "
1294 "wwpn = %llx.\n",
1295 fcport->tgt_id,
1296 (unsigned long long)wwn_to_u64(fcport->node_name),
1297 (unsigned long long)wwn_to_u64(fcport->port_name));
1298 }
1299
1300 /* Free all new device structures not processed. */
1301 list_for_each_entry_safe(fcport, rmptemp, &new_fcports, list) {
1302 list_del(&fcport->list);
1303 kfree(fcport);
1304 }
1305
1306 return rval;
1307}
1308
1309/*
1310 * qlafx00_configure_devices
1311 * Updates Fibre Channel Device Database with what is actually on loop.
1312 *
1313 * Input:
1314 * ha = adapter block pointer.
1315 *
1316 * Returns:
1317 * 0 = success.
1318 * 1 = error.
1319 * 2 = database was full and device was not configured.
1320 */
1321int
1322qlafx00_configure_devices(scsi_qla_host_t *vha)
1323{
1324 int rval;
Bart Van Assche52c82822015-07-09 07:23:26 -07001325 unsigned long flags;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04001326 rval = QLA_SUCCESS;
1327
Bart Van Assche52c82822015-07-09 07:23:26 -07001328 flags = vha->dpc_flags;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04001329
1330 ql_dbg(ql_dbg_disc, vha, 0x2090,
1331 "Configure devices -- dpc flags =0x%lx\n", flags);
1332
1333 rval = qlafx00_configure_all_targets(vha);
1334
1335 if (rval == QLA_SUCCESS) {
1336 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
1337 rval = QLA_FUNCTION_FAILED;
1338 } else {
1339 atomic_set(&vha->loop_state, LOOP_READY);
1340 ql_log(ql_log_info, vha, 0x2091,
1341 "Device Ready\n");
1342 }
1343 }
1344
1345 if (rval) {
1346 ql_dbg(ql_dbg_disc, vha, 0x2092,
1347 "%s *** FAILED ***.\n", __func__);
1348 } else {
1349 ql_dbg(ql_dbg_disc, vha, 0x2093,
1350 "%s: exiting normally.\n", __func__);
1351 }
1352 return rval;
1353}
1354
1355static void
Armen Baloyan71e56002013-08-27 01:37:38 -04001356qlafx00_abort_isp_cleanup(scsi_qla_host_t *vha, bool critemp)
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04001357{
1358 struct qla_hw_data *ha = vha->hw;
1359 fc_port_t *fcport;
1360
1361 vha->flags.online = 0;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04001362 ha->mr.fw_hbt_en = 0;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04001363
Armen Baloyan71e56002013-08-27 01:37:38 -04001364 if (!critemp) {
1365 ha->flags.chip_reset_done = 0;
1366 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1367 vha->qla_stats.total_isp_aborts++;
1368 ql_log(ql_log_info, vha, 0x013f,
1369 "Performing ISP error recovery - ha = %p.\n", ha);
1370 ha->isp_ops->reset_chip(vha);
1371 }
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04001372
1373 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
1374 atomic_set(&vha->loop_state, LOOP_DOWN);
1375 atomic_set(&vha->loop_down_timer,
1376 QLAFX00_LOOP_DOWN_TIME);
1377 } else {
1378 if (!atomic_read(&vha->loop_down_timer))
1379 atomic_set(&vha->loop_down_timer,
1380 QLAFX00_LOOP_DOWN_TIME);
1381 }
1382
1383 /* Clear all async request states across all VPs. */
1384 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1385 fcport->flags = 0;
1386 if (atomic_read(&fcport->state) == FCS_ONLINE)
1387 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
1388 }
1389
1390 if (!ha->flags.eeh_busy) {
Armen Baloyan71e56002013-08-27 01:37:38 -04001391 if (critemp) {
1392 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
1393 } else {
1394 /* Requeue all commands in outstanding command list. */
1395 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
1396 }
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04001397 }
1398
1399 qla2x00_free_irqs(vha);
Armen Baloyan71e56002013-08-27 01:37:38 -04001400 if (critemp)
1401 set_bit(FX00_CRITEMP_RECOVERY, &vha->dpc_flags);
1402 else
1403 set_bit(FX00_RESET_RECOVERY, &vha->dpc_flags);
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04001404
1405 /* Clear the Interrupts */
1406 QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS);
1407
1408 ql_log(ql_log_info, vha, 0x0140,
1409 "%s Done done - ha=%p.\n", __func__, ha);
1410}
1411
1412/**
1413 * qlafx00_init_response_q_entries() - Initializes response queue entries.
Bart Van Assche2db62282018-01-23 16:33:51 -08001414 * @rsp: response queue
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04001415 *
1416 * Beginning of request ring has initialization control block already built
1417 * by nvram config routine.
1418 *
1419 * Returns 0 on success.
1420 */
1421void
1422qlafx00_init_response_q_entries(struct rsp_que *rsp)
1423{
1424 uint16_t cnt;
1425 response_t *pkt;
1426
1427 rsp->ring_ptr = rsp->ring;
1428 rsp->ring_index = 0;
1429 rsp->status_srb = NULL;
1430 pkt = rsp->ring_ptr;
1431 for (cnt = 0; cnt < rsp->length; cnt++) {
1432 pkt->signature = RESPONSE_PROCESSED;
Bart Van Assche8dfa4b5a2015-07-09 07:24:50 -07001433 WRT_REG_DWORD((void __force __iomem *)&pkt->signature,
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04001434 RESPONSE_PROCESSED);
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04001435 pkt++;
1436 }
1437}
1438
1439int
1440qlafx00_rescan_isp(scsi_qla_host_t *vha)
1441{
1442 uint32_t status = QLA_FUNCTION_FAILED;
1443 struct qla_hw_data *ha = vha->hw;
1444 struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00;
1445 uint32_t aenmbx7;
1446
1447 qla2x00_request_irqs(ha, ha->rsp_q_map[0]);
1448
1449 aenmbx7 = RD_REG_DWORD(&reg->aenmailbox7);
1450 ha->mbx_intr_code = MSW(aenmbx7);
1451 ha->rqstq_intr_code = LSW(aenmbx7);
1452 ha->req_que_off = RD_REG_DWORD(&reg->aenmailbox1);
1453 ha->rsp_que_off = RD_REG_DWORD(&reg->aenmailbox3);
1454 ha->req_que_len = RD_REG_DWORD(&reg->aenmailbox5);
1455 ha->rsp_que_len = RD_REG_DWORD(&reg->aenmailbox6);
1456
1457 ql_dbg(ql_dbg_disc, vha, 0x2094,
1458 "fw returned mbx_intr_code: 0x%x, rqstq_intr_code: 0x%x "
1459 " Req que offset 0x%x Rsp que offset 0x%x\n",
1460 ha->mbx_intr_code, ha->rqstq_intr_code,
1461 ha->req_que_off, ha->rsp_que_len);
1462
1463 /* Clear the Interrupts */
1464 QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS);
1465
1466 status = qla2x00_init_rings(vha);
1467 if (!status) {
1468 vha->flags.online = 1;
1469
1470 /* if no cable then assume it's good */
1471 if ((vha->device_flags & DFLG_NO_CABLE))
1472 status = 0;
1473 /* Register system information */
1474 if (qlafx00_fx_disc(vha,
1475 &vha->hw->mr.fcport, FXDISC_REG_HOST_INFO))
1476 ql_dbg(ql_dbg_disc, vha, 0x2095,
1477 "failed to register host info\n");
1478 }
1479 scsi_unblock_requests(vha->host);
1480 return status;
1481}
1482
1483void
1484qlafx00_timer_routine(scsi_qla_host_t *vha)
1485{
1486 struct qla_hw_data *ha = vha->hw;
1487 uint32_t fw_heart_beat;
1488 uint32_t aenmbx0;
1489 struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00;
Armen Baloyan71e56002013-08-27 01:37:38 -04001490 uint32_t tempc;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04001491
1492 /* Check firmware health */
1493 if (ha->mr.fw_hbt_cnt)
1494 ha->mr.fw_hbt_cnt--;
1495 else {
1496 if ((!ha->flags.mr_reset_hdlr_active) &&
1497 (!test_bit(UNLOADING, &vha->dpc_flags)) &&
1498 (!test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) &&
1499 (ha->mr.fw_hbt_en)) {
1500 fw_heart_beat = RD_REG_DWORD(&reg->fwheartbeat);
1501 if (fw_heart_beat != ha->mr.old_fw_hbt_cnt) {
1502 ha->mr.old_fw_hbt_cnt = fw_heart_beat;
1503 ha->mr.fw_hbt_miss_cnt = 0;
1504 } else {
1505 ha->mr.fw_hbt_miss_cnt++;
1506 if (ha->mr.fw_hbt_miss_cnt ==
1507 QLAFX00_HEARTBEAT_MISS_CNT) {
1508 set_bit(ISP_ABORT_NEEDED,
1509 &vha->dpc_flags);
1510 qla2xxx_wake_dpc(vha);
1511 ha->mr.fw_hbt_miss_cnt = 0;
1512 }
1513 }
1514 }
1515 ha->mr.fw_hbt_cnt = QLAFX00_HEARTBEAT_INTERVAL;
1516 }
1517
1518 if (test_bit(FX00_RESET_RECOVERY, &vha->dpc_flags)) {
1519 /* Reset recovery to be performed in timer routine */
1520 aenmbx0 = RD_REG_DWORD(&reg->aenmailbox0);
1521 if (ha->mr.fw_reset_timer_exp) {
1522 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1523 qla2xxx_wake_dpc(vha);
1524 ha->mr.fw_reset_timer_exp = 0;
1525 } else if (aenmbx0 == MBA_FW_RESTART_CMPLT) {
1526 /* Wake up DPC to rescan the targets */
1527 set_bit(FX00_TARGET_SCAN, &vha->dpc_flags);
1528 clear_bit(FX00_RESET_RECOVERY, &vha->dpc_flags);
1529 qla2xxx_wake_dpc(vha);
1530 ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL;
1531 } else if ((aenmbx0 == MBA_FW_STARTING) &&
1532 (!ha->mr.fw_hbt_en)) {
1533 ha->mr.fw_hbt_en = 1;
1534 } else if (!ha->mr.fw_reset_timer_tick) {
1535 if (aenmbx0 == ha->mr.old_aenmbx0_state)
1536 ha->mr.fw_reset_timer_exp = 1;
1537 ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL;
1538 } else if (aenmbx0 == 0xFFFFFFFF) {
1539 uint32_t data0, data1;
1540
1541 data0 = QLAFX00_RD_REG(ha,
1542 QLAFX00_BAR1_BASE_ADDR_REG);
1543 data1 = QLAFX00_RD_REG(ha,
1544 QLAFX00_PEX0_WIN0_BASE_ADDR_REG);
1545
1546 data0 &= 0xffff0000;
1547 data1 &= 0x0000ffff;
1548
1549 QLAFX00_WR_REG(ha,
1550 QLAFX00_PEX0_WIN0_BASE_ADDR_REG,
1551 (data0 | data1));
1552 } else if ((aenmbx0 & 0xFF00) == MBA_FW_POLL_STATE) {
1553 ha->mr.fw_reset_timer_tick =
1554 QLAFX00_MAX_RESET_INTERVAL;
Armen Baloyanb6511d92013-08-27 01:37:31 -04001555 } else if (aenmbx0 == MBA_FW_RESET_FCT) {
1556 ha->mr.fw_reset_timer_tick =
1557 QLAFX00_MAX_RESET_INTERVAL;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04001558 }
Jan Kuliche475f9c2014-09-25 05:16:45 -04001559 if (ha->mr.old_aenmbx0_state != aenmbx0) {
1560 ha->mr.old_aenmbx0_state = aenmbx0;
1561 ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL;
1562 }
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04001563 ha->mr.fw_reset_timer_tick--;
1564 }
Armen Baloyan71e56002013-08-27 01:37:38 -04001565 if (test_bit(FX00_CRITEMP_RECOVERY, &vha->dpc_flags)) {
1566 /*
1567 * Critical temperature recovery to be
1568 * performed in timer routine
1569 */
1570 if (ha->mr.fw_critemp_timer_tick == 0) {
1571 tempc = QLAFX00_GET_TEMPERATURE(ha);
Saurav Kashyap6ddcfef2013-08-27 01:37:53 -04001572 ql_dbg(ql_dbg_timer, vha, 0x6012,
Armen Baloyan71e56002013-08-27 01:37:38 -04001573 "ISPFx00(%s): Critical temp timer, "
1574 "current SOC temperature: %d\n",
1575 __func__, tempc);
1576 if (tempc < ha->mr.critical_temperature) {
1577 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1578 clear_bit(FX00_CRITEMP_RECOVERY,
1579 &vha->dpc_flags);
1580 qla2xxx_wake_dpc(vha);
1581 }
1582 ha->mr.fw_critemp_timer_tick =
1583 QLAFX00_CRITEMP_INTERVAL;
1584 } else {
1585 ha->mr.fw_critemp_timer_tick--;
1586 }
1587 }
Armen Baloyane8f5e952013-10-30 03:38:17 -04001588 if (ha->mr.host_info_resend) {
1589 /*
1590 * Incomplete host info might be sent to firmware
1591 * durinng system boot - info should be resend
1592 */
1593 if (ha->mr.hinfo_resend_timer_tick == 0) {
1594 ha->mr.host_info_resend = false;
1595 set_bit(FX00_HOST_INFO_RESEND, &vha->dpc_flags);
1596 ha->mr.hinfo_resend_timer_tick =
1597 QLAFX00_HINFO_RESEND_INTERVAL;
1598 qla2xxx_wake_dpc(vha);
1599 } else {
1600 ha->mr.hinfo_resend_timer_tick--;
1601 }
1602 }
1603
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04001604}
1605
1606/*
1607 * qlfx00a_reset_initialize
1608 * Re-initialize after a iSA device reset.
1609 *
1610 * Input:
1611 * ha = adapter block pointer.
1612 *
1613 * Returns:
1614 * 0 = success
1615 */
1616int
1617qlafx00_reset_initialize(scsi_qla_host_t *vha)
1618{
1619 struct qla_hw_data *ha = vha->hw;
1620
1621 if (vha->device_flags & DFLG_DEV_FAILED) {
1622 ql_dbg(ql_dbg_init, vha, 0x0142,
1623 "Device in failed state\n");
1624 return QLA_SUCCESS;
1625 }
1626
1627 ha->flags.mr_reset_hdlr_active = 1;
1628
1629 if (vha->flags.online) {
1630 scsi_block_requests(vha->host);
Armen Baloyan71e56002013-08-27 01:37:38 -04001631 qlafx00_abort_isp_cleanup(vha, false);
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04001632 }
1633
1634 ql_log(ql_log_info, vha, 0x0143,
1635 "(%s): succeeded.\n", __func__);
1636 ha->flags.mr_reset_hdlr_active = 0;
1637 return QLA_SUCCESS;
1638}
1639
1640/*
1641 * qlafx00_abort_isp
1642 * Resets ISP and aborts all outstanding commands.
1643 *
1644 * Input:
1645 * ha = adapter block pointer.
1646 *
1647 * Returns:
1648 * 0 = success
1649 */
1650int
1651qlafx00_abort_isp(scsi_qla_host_t *vha)
1652{
1653 struct qla_hw_data *ha = vha->hw;
1654
1655 if (vha->flags.online) {
1656 if (unlikely(pci_channel_offline(ha->pdev) &&
1657 ha->flags.pci_channel_io_perm_failure)) {
1658 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
1659 return QLA_SUCCESS;
1660 }
1661
1662 scsi_block_requests(vha->host);
Armen Baloyan71e56002013-08-27 01:37:38 -04001663 qlafx00_abort_isp_cleanup(vha, false);
Armen Baloyane601d772013-08-27 01:37:32 -04001664 } else {
1665 scsi_block_requests(vha->host);
1666 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1667 vha->qla_stats.total_isp_aborts++;
1668 ha->isp_ops->reset_chip(vha);
1669 set_bit(FX00_RESET_RECOVERY, &vha->dpc_flags);
1670 /* Clear the Interrupts */
1671 QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS);
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04001672 }
1673
1674 ql_log(ql_log_info, vha, 0x0145,
1675 "(%s): succeeded.\n", __func__);
1676
1677 return QLA_SUCCESS;
1678}
1679
1680static inline fc_port_t*
1681qlafx00_get_fcport(struct scsi_qla_host *vha, int tgt_id)
1682{
1683 fc_port_t *fcport;
1684
1685 /* Check for matching device in remote port list. */
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04001686 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1687 if (fcport->tgt_id == tgt_id) {
1688 ql_dbg(ql_dbg_async, vha, 0x5072,
1689 "Matching fcport(%p) found with TGT-ID: 0x%x "
1690 "and Remote TGT_ID: 0x%x\n",
1691 fcport, fcport->tgt_id, tgt_id);
Joe Carnuccio24a42d502014-09-25 05:16:44 -04001692 return fcport;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04001693 }
1694 }
Joe Carnuccio24a42d502014-09-25 05:16:44 -04001695 return NULL;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04001696}
1697
1698static void
1699qlafx00_tgt_detach(struct scsi_qla_host *vha, int tgt_id)
1700{
1701 fc_port_t *fcport;
1702
1703 ql_log(ql_log_info, vha, 0x5073,
1704 "Detach TGT-ID: 0x%x\n", tgt_id);
1705
1706 fcport = qlafx00_get_fcport(vha, tgt_id);
1707 if (!fcport)
1708 return;
1709
1710 qla2x00_mark_device_lost(vha, fcport, 0, 0);
1711
1712 return;
1713}
1714
1715int
1716qlafx00_process_aen(struct scsi_qla_host *vha, struct qla_work_evt *evt)
1717{
1718 int rval = 0;
1719 uint32_t aen_code, aen_data;
1720
1721 aen_code = FCH_EVT_VENDOR_UNIQUE;
1722 aen_data = evt->u.aenfx.evtcode;
1723
1724 switch (evt->u.aenfx.evtcode) {
1725 case QLAFX00_MBA_PORT_UPDATE: /* Port database update */
1726 if (evt->u.aenfx.mbx[1] == 0) {
1727 if (evt->u.aenfx.mbx[2] == 1) {
1728 if (!vha->flags.fw_tgt_reported)
1729 vha->flags.fw_tgt_reported = 1;
1730 atomic_set(&vha->loop_down_timer, 0);
1731 atomic_set(&vha->loop_state, LOOP_UP);
1732 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1733 qla2xxx_wake_dpc(vha);
1734 } else if (evt->u.aenfx.mbx[2] == 2) {
1735 qlafx00_tgt_detach(vha, evt->u.aenfx.mbx[3]);
1736 }
1737 } else if (evt->u.aenfx.mbx[1] == 0xffff) {
1738 if (evt->u.aenfx.mbx[2] == 1) {
1739 if (!vha->flags.fw_tgt_reported)
1740 vha->flags.fw_tgt_reported = 1;
1741 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1742 } else if (evt->u.aenfx.mbx[2] == 2) {
1743 vha->device_flags |= DFLG_NO_CABLE;
1744 qla2x00_mark_all_devices_lost(vha, 1);
1745 }
1746 }
1747 break;
1748 case QLAFX00_MBA_LINK_UP:
1749 aen_code = FCH_EVT_LINKUP;
1750 aen_data = 0;
1751 break;
1752 case QLAFX00_MBA_LINK_DOWN:
1753 aen_code = FCH_EVT_LINKDOWN;
1754 aen_data = 0;
1755 break;
Armen Baloyan71e56002013-08-27 01:37:38 -04001756 case QLAFX00_MBA_TEMP_CRIT: /* Critical temperature event */
1757 ql_log(ql_log_info, vha, 0x5082,
1758 "Process critical temperature event "
1759 "aenmb[0]: %x\n",
1760 evt->u.aenfx.evtcode);
1761 scsi_block_requests(vha->host);
1762 qlafx00_abort_isp_cleanup(vha, true);
1763 scsi_unblock_requests(vha->host);
1764 break;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04001765 }
1766
1767 fc_host_post_event(vha->host, fc_get_event_number(),
1768 aen_code, aen_data);
1769
1770 return rval;
1771}
1772
1773static void
1774qlafx00_update_host_attr(scsi_qla_host_t *vha, struct port_info_data *pinfo)
1775{
1776 u64 port_name = 0, node_name = 0;
1777
1778 port_name = (unsigned long long)wwn_to_u64(pinfo->port_name);
1779 node_name = (unsigned long long)wwn_to_u64(pinfo->node_name);
1780
1781 fc_host_node_name(vha->host) = node_name;
1782 fc_host_port_name(vha->host) = port_name;
1783 if (!pinfo->port_type)
1784 vha->hw->current_topology = ISP_CFG_F;
1785 if (pinfo->link_status == QLAFX00_LINK_STATUS_UP)
1786 atomic_set(&vha->loop_state, LOOP_READY);
1787 else if (pinfo->link_status == QLAFX00_LINK_STATUS_DOWN)
1788 atomic_set(&vha->loop_state, LOOP_DOWN);
1789 vha->hw->link_data_rate = (uint16_t)pinfo->link_config;
1790}
1791
1792static void
1793qla2x00_fxdisc_iocb_timeout(void *data)
1794{
Joe Carnuccio25ff6af2017-01-19 22:28:04 -08001795 srb_t *sp = data;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04001796 struct srb_iocb *lio = &sp->u.iocb_cmd;
1797
1798 complete(&lio->u.fxiocb.fxiocb_comp);
1799}
1800
1801static void
Joe Carnuccio25ff6af2017-01-19 22:28:04 -08001802qla2x00_fxdisc_sp_done(void *ptr, int res)
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04001803{
Joe Carnuccio25ff6af2017-01-19 22:28:04 -08001804 srb_t *sp = ptr;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04001805 struct srb_iocb *lio = &sp->u.iocb_cmd;
1806
1807 complete(&lio->u.fxiocb.fxiocb_comp);
1808}
1809
1810int
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04001811qlafx00_fx_disc(scsi_qla_host_t *vha, fc_port_t *fcport, uint16_t fx_type)
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04001812{
1813 srb_t *sp;
1814 struct srb_iocb *fdisc;
1815 int rval = QLA_FUNCTION_FAILED;
1816 struct qla_hw_data *ha = vha->hw;
1817 struct host_system_info *phost_info;
1818 struct register_host_info *preg_hsi;
1819 struct new_utsname *p_sysid = NULL;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04001820
1821 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1822 if (!sp)
1823 goto done;
1824
Joe Carnuccioe0824e62017-08-23 15:05:08 -07001825 sp->type = SRB_FXIOCB_DCMD;
1826 sp->name = "fxdisc";
Joe Carnuccioe0824e62017-08-23 15:05:08 -07001827
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04001828 fdisc = &sp->u.iocb_cmd;
Ben Hutchingse74e7d92018-03-20 21:36:14 +00001829 fdisc->timeout = qla2x00_fxdisc_iocb_timeout;
1830 qla2x00_init_timer(sp, FXDISC_TIMEOUT);
1831
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04001832 switch (fx_type) {
1833 case FXDISC_GET_CONFIG_INFO:
1834 fdisc->u.fxiocb.flags =
1835 SRB_FXDISC_RESP_DMA_VALID;
1836 fdisc->u.fxiocb.rsp_len = sizeof(struct config_info_data);
1837 break;
1838 case FXDISC_GET_PORT_INFO:
1839 fdisc->u.fxiocb.flags =
1840 SRB_FXDISC_RESP_DMA_VALID | SRB_FXDISC_REQ_DWRD_VALID;
1841 fdisc->u.fxiocb.rsp_len = QLAFX00_PORT_DATA_INFO;
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04001842 fdisc->u.fxiocb.req_data = cpu_to_le32(fcport->port_id);
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04001843 break;
1844 case FXDISC_GET_TGT_NODE_INFO:
1845 fdisc->u.fxiocb.flags =
1846 SRB_FXDISC_RESP_DMA_VALID | SRB_FXDISC_REQ_DWRD_VALID;
1847 fdisc->u.fxiocb.rsp_len = QLAFX00_TGT_NODE_INFO;
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04001848 fdisc->u.fxiocb.req_data = cpu_to_le32(fcport->tgt_id);
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04001849 break;
1850 case FXDISC_GET_TGT_NODE_LIST:
1851 fdisc->u.fxiocb.flags =
1852 SRB_FXDISC_RESP_DMA_VALID | SRB_FXDISC_REQ_DWRD_VALID;
1853 fdisc->u.fxiocb.rsp_len = QLAFX00_TGT_NODE_LIST_SIZE;
1854 break;
1855 case FXDISC_REG_HOST_INFO:
1856 fdisc->u.fxiocb.flags = SRB_FXDISC_REQ_DMA_VALID;
1857 fdisc->u.fxiocb.req_len = sizeof(struct register_host_info);
1858 p_sysid = utsname();
1859 if (!p_sysid) {
1860 ql_log(ql_log_warn, vha, 0x303c,
Masanari Iida0b1587b2013-07-17 04:37:44 +09001861 "Not able to get the system information\n");
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04001862 goto done_free_sp;
1863 }
1864 break;
Armen Baloyan767157c2013-10-30 03:38:21 -04001865 case FXDISC_ABORT_IOCTL:
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04001866 default:
1867 break;
1868 }
1869
1870 if (fdisc->u.fxiocb.flags & SRB_FXDISC_REQ_DMA_VALID) {
1871 fdisc->u.fxiocb.req_addr = dma_alloc_coherent(&ha->pdev->dev,
1872 fdisc->u.fxiocb.req_len,
1873 &fdisc->u.fxiocb.req_dma_handle, GFP_KERNEL);
1874 if (!fdisc->u.fxiocb.req_addr)
1875 goto done_free_sp;
1876
1877 if (fx_type == FXDISC_REG_HOST_INFO) {
1878 preg_hsi = (struct register_host_info *)
1879 fdisc->u.fxiocb.req_addr;
1880 phost_info = &preg_hsi->hsi;
1881 memset(preg_hsi, 0, sizeof(struct register_host_info));
1882 phost_info->os_type = OS_TYPE_LINUX;
1883 strncpy(phost_info->sysname,
1884 p_sysid->sysname, SYSNAME_LENGTH);
1885 strncpy(phost_info->nodename,
1886 p_sysid->nodename, NODENAME_LENGTH);
Armen Baloyane8f5e952013-10-30 03:38:17 -04001887 if (!strcmp(phost_info->nodename, "(none)"))
1888 ha->mr.host_info_resend = true;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04001889 strncpy(phost_info->release,
1890 p_sysid->release, RELEASE_LENGTH);
1891 strncpy(phost_info->version,
1892 p_sysid->version, VERSION_LENGTH);
1893 strncpy(phost_info->machine,
1894 p_sysid->machine, MACHINE_LENGTH);
1895 strncpy(phost_info->domainname,
1896 p_sysid->domainname, DOMNAME_LENGTH);
1897 strncpy(phost_info->hostdriver,
1898 QLA2XXX_VERSION, VERSION_LENGTH);
Tina Ruchandani5ea33eb2016-01-25 23:00:20 +01001899 preg_hsi->utc = (uint64_t)ktime_get_real_seconds();
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04001900 ql_dbg(ql_dbg_init, vha, 0x0149,
1901 "ISP%04X: Host registration with firmware\n",
1902 ha->pdev->device);
1903 ql_dbg(ql_dbg_init, vha, 0x014a,
1904 "os_type = '%d', sysname = '%s', nodname = '%s'\n",
1905 phost_info->os_type,
1906 phost_info->sysname,
1907 phost_info->nodename);
1908 ql_dbg(ql_dbg_init, vha, 0x014b,
1909 "release = '%s', version = '%s'\n",
1910 phost_info->release,
1911 phost_info->version);
1912 ql_dbg(ql_dbg_init, vha, 0x014c,
1913 "machine = '%s' "
1914 "domainname = '%s', hostdriver = '%s'\n",
1915 phost_info->machine,
1916 phost_info->domainname,
1917 phost_info->hostdriver);
1918 ql_dump_buffer(ql_dbg_init + ql_dbg_disc, vha, 0x014d,
Joe Carnucciof8f97b02019-03-12 11:08:16 -07001919 phost_info, sizeof(*phost_info));
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04001920 }
1921 }
1922
1923 if (fdisc->u.fxiocb.flags & SRB_FXDISC_RESP_DMA_VALID) {
1924 fdisc->u.fxiocb.rsp_addr = dma_alloc_coherent(&ha->pdev->dev,
1925 fdisc->u.fxiocb.rsp_len,
1926 &fdisc->u.fxiocb.rsp_dma_handle, GFP_KERNEL);
1927 if (!fdisc->u.fxiocb.rsp_addr)
1928 goto done_unmap_req;
1929 }
1930
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04001931 fdisc->u.fxiocb.req_func_type = cpu_to_le16(fx_type);
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04001932 sp->done = qla2x00_fxdisc_sp_done;
1933
1934 rval = qla2x00_start_sp(sp);
1935 if (rval != QLA_SUCCESS)
1936 goto done_unmap_dma;
1937
1938 wait_for_completion(&fdisc->u.fxiocb.fxiocb_comp);
1939
1940 if (fx_type == FXDISC_GET_CONFIG_INFO) {
1941 struct config_info_data *pinfo =
1942 (struct config_info_data *) fdisc->u.fxiocb.rsp_addr;
Armen Baloyan03eb9122013-10-30 03:38:22 -04001943 strcpy(vha->hw->model_number, pinfo->model_num);
1944 strcpy(vha->hw->model_desc, pinfo->model_description);
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04001945 memcpy(&vha->hw->mr.symbolic_name, pinfo->symbolic_name,
1946 sizeof(vha->hw->mr.symbolic_name));
1947 memcpy(&vha->hw->mr.serial_num, pinfo->serial_num,
1948 sizeof(vha->hw->mr.serial_num));
1949 memcpy(&vha->hw->mr.hw_version, pinfo->hw_version,
1950 sizeof(vha->hw->mr.hw_version));
1951 memcpy(&vha->hw->mr.fw_version, pinfo->fw_version,
1952 sizeof(vha->hw->mr.fw_version));
1953 strim(vha->hw->mr.fw_version);
1954 memcpy(&vha->hw->mr.uboot_version, pinfo->uboot_version,
1955 sizeof(vha->hw->mr.uboot_version));
1956 memcpy(&vha->hw->mr.fru_serial_num, pinfo->fru_serial_num,
1957 sizeof(vha->hw->mr.fru_serial_num));
Armen Baloyanf875cd42013-08-27 01:37:47 -04001958 vha->hw->mr.critical_temperature =
1959 (pinfo->nominal_temp_value) ?
1960 pinfo->nominal_temp_value : QLAFX00_CRITEMP_THRSHLD;
Armen Baloyan1fe19ee2013-08-27 01:37:41 -04001961 ha->mr.extended_io_enabled = (pinfo->enabled_capabilities &
1962 QLAFX00_EXTENDED_IO_EN_MASK) != 0;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04001963 } else if (fx_type == FXDISC_GET_PORT_INFO) {
1964 struct port_info_data *pinfo =
1965 (struct port_info_data *) fdisc->u.fxiocb.rsp_addr;
1966 memcpy(vha->node_name, pinfo->node_name, WWN_SIZE);
1967 memcpy(vha->port_name, pinfo->port_name, WWN_SIZE);
1968 vha->d_id.b.domain = pinfo->port_id[0];
1969 vha->d_id.b.area = pinfo->port_id[1];
1970 vha->d_id.b.al_pa = pinfo->port_id[2];
1971 qlafx00_update_host_attr(vha, pinfo);
1972 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0141,
Joe Carnucciof8f97b02019-03-12 11:08:16 -07001973 pinfo, 16);
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04001974 } else if (fx_type == FXDISC_GET_TGT_NODE_INFO) {
1975 struct qlafx00_tgt_node_info *pinfo =
1976 (struct qlafx00_tgt_node_info *) fdisc->u.fxiocb.rsp_addr;
1977 memcpy(fcport->node_name, pinfo->tgt_node_wwnn, WWN_SIZE);
1978 memcpy(fcport->port_name, pinfo->tgt_node_wwpn, WWN_SIZE);
1979 fcport->port_type = FCT_TARGET;
1980 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0144,
Joe Carnucciof8f97b02019-03-12 11:08:16 -07001981 pinfo, 16);
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04001982 } else if (fx_type == FXDISC_GET_TGT_NODE_LIST) {
1983 struct qlafx00_tgt_node_info *pinfo =
1984 (struct qlafx00_tgt_node_info *) fdisc->u.fxiocb.rsp_addr;
1985 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0146,
Joe Carnucciof8f97b02019-03-12 11:08:16 -07001986 pinfo, 16);
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04001987 memcpy(vha->hw->gid_list, pinfo, QLAFX00_TGT_NODE_LIST_SIZE);
Armen Baloyan767157c2013-10-30 03:38:21 -04001988 } else if (fx_type == FXDISC_ABORT_IOCTL)
1989 fdisc->u.fxiocb.result =
Armen Baloyanb5939312014-02-26 04:14:58 -05001990 (fdisc->u.fxiocb.result ==
1991 cpu_to_le32(QLAFX00_IOCTL_ICOB_ABORT_SUCCESS)) ?
Armen Baloyan767157c2013-10-30 03:38:21 -04001992 cpu_to_le32(QLA_SUCCESS) : cpu_to_le32(QLA_FUNCTION_FAILED);
1993
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04001994 rval = le32_to_cpu(fdisc->u.fxiocb.result);
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04001995
1996done_unmap_dma:
1997 if (fdisc->u.fxiocb.rsp_addr)
1998 dma_free_coherent(&ha->pdev->dev, fdisc->u.fxiocb.rsp_len,
1999 fdisc->u.fxiocb.rsp_addr, fdisc->u.fxiocb.rsp_dma_handle);
2000
2001done_unmap_req:
2002 if (fdisc->u.fxiocb.req_addr)
2003 dma_free_coherent(&ha->pdev->dev, fdisc->u.fxiocb.req_len,
2004 fdisc->u.fxiocb.req_addr, fdisc->u.fxiocb.req_dma_handle);
2005done_free_sp:
Joe Carnuccio25ff6af2017-01-19 22:28:04 -08002006 sp->free(sp);
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002007done:
2008 return rval;
2009}
2010
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002011/*
2012 * qlafx00_initialize_adapter
2013 * Initialize board.
2014 *
2015 * Input:
2016 * ha = adapter block pointer.
2017 *
2018 * Returns:
2019 * 0 = success
2020 */
2021int
2022qlafx00_initialize_adapter(scsi_qla_host_t *vha)
2023{
2024 int rval;
2025 struct qla_hw_data *ha = vha->hw;
Armen Baloyan71e56002013-08-27 01:37:38 -04002026 uint32_t tempc;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002027
2028 /* Clear adapter flags. */
2029 vha->flags.online = 0;
2030 ha->flags.chip_reset_done = 0;
2031 vha->flags.reset_active = 0;
2032 ha->flags.pci_channel_io_perm_failure = 0;
2033 ha->flags.eeh_busy = 0;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002034 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
2035 atomic_set(&vha->loop_state, LOOP_DOWN);
2036 vha->device_flags = DFLG_NO_CABLE;
2037 vha->dpc_flags = 0;
2038 vha->flags.management_server_logged_in = 0;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002039 ha->isp_abort_cnt = 0;
2040 ha->beacon_blink_led = 0;
2041
2042 set_bit(0, ha->req_qid_map);
2043 set_bit(0, ha->rsp_qid_map);
2044
2045 ql_dbg(ql_dbg_init, vha, 0x0147,
2046 "Configuring PCI space...\n");
2047
2048 rval = ha->isp_ops->pci_config(vha);
2049 if (rval) {
2050 ql_log(ql_log_warn, vha, 0x0148,
2051 "Unable to configure PCI space.\n");
2052 return rval;
2053 }
2054
2055 rval = qlafx00_init_fw_ready(vha);
2056 if (rval != QLA_SUCCESS)
2057 return rval;
2058
2059 qlafx00_save_queue_ptrs(vha);
2060
2061 rval = qlafx00_config_queues(vha);
2062 if (rval != QLA_SUCCESS)
2063 return rval;
2064
2065 /*
2066 * Allocate the array of outstanding commands
2067 * now that we know the firmware resources.
2068 */
2069 rval = qla2x00_alloc_outstanding_cmds(ha, vha->req);
2070 if (rval != QLA_SUCCESS)
2071 return rval;
2072
2073 rval = qla2x00_init_rings(vha);
2074 ha->flags.chip_reset_done = 1;
2075
Armen Baloyan71e56002013-08-27 01:37:38 -04002076 tempc = QLAFX00_GET_TEMPERATURE(ha);
2077 ql_dbg(ql_dbg_init, vha, 0x0152,
2078 "ISPFx00(%s): Critical temp timer, current SOC temperature: 0x%x\n",
2079 __func__, tempc);
2080
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002081 return rval;
2082}
2083
2084uint32_t
2085qlafx00_fw_state_show(struct device *dev, struct device_attribute *attr,
2086 char *buf)
2087{
2088 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
2089 int rval = QLA_FUNCTION_FAILED;
2090 uint32_t state[1];
2091
2092 if (qla2x00_reset_active(vha))
2093 ql_log(ql_log_warn, vha, 0x70ce,
2094 "ISP reset active.\n");
2095 else if (!vha->hw->flags.eeh_busy) {
2096 rval = qlafx00_get_firmware_state(vha, state);
2097 }
2098 if (rval != QLA_SUCCESS)
2099 memset(state, -1, sizeof(state));
2100
2101 return state[0];
2102}
2103
2104void
2105qlafx00_get_host_speed(struct Scsi_Host *shost)
2106{
2107 struct qla_hw_data *ha = ((struct scsi_qla_host *)
2108 (shost_priv(shost)))->hw;
2109 u32 speed = FC_PORTSPEED_UNKNOWN;
2110
2111 switch (ha->link_data_rate) {
2112 case QLAFX00_PORT_SPEED_2G:
2113 speed = FC_PORTSPEED_2GBIT;
2114 break;
2115 case QLAFX00_PORT_SPEED_4G:
2116 speed = FC_PORTSPEED_4GBIT;
2117 break;
2118 case QLAFX00_PORT_SPEED_8G:
2119 speed = FC_PORTSPEED_8GBIT;
2120 break;
2121 case QLAFX00_PORT_SPEED_10G:
2122 speed = FC_PORTSPEED_10GBIT;
2123 break;
2124 }
2125 fc_host_speed(shost) = speed;
2126}
2127
2128/** QLAFX00 specific ISR implementation functions */
2129
2130static inline void
2131qlafx00_handle_sense(srb_t *sp, uint8_t *sense_data, uint32_t par_sense_len,
2132 uint32_t sense_len, struct rsp_que *rsp, int res)
2133{
Joe Carnuccio25ff6af2017-01-19 22:28:04 -08002134 struct scsi_qla_host *vha = sp->vha;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002135 struct scsi_cmnd *cp = GET_CMD_SP(sp);
2136 uint32_t track_sense_len;
2137
2138 SET_FW_SENSE_LEN(sp, sense_len);
2139
2140 if (sense_len >= SCSI_SENSE_BUFFERSIZE)
2141 sense_len = SCSI_SENSE_BUFFERSIZE;
2142
2143 SET_CMD_SENSE_LEN(sp, sense_len);
2144 SET_CMD_SENSE_PTR(sp, cp->sense_buffer);
2145 track_sense_len = sense_len;
2146
2147 if (sense_len > par_sense_len)
2148 sense_len = par_sense_len;
2149
2150 memcpy(cp->sense_buffer, sense_data, sense_len);
2151
2152 SET_FW_SENSE_LEN(sp, GET_FW_SENSE_LEN(sp) - sense_len);
2153
2154 SET_CMD_SENSE_PTR(sp, cp->sense_buffer + sense_len);
2155 track_sense_len -= sense_len;
2156 SET_CMD_SENSE_LEN(sp, track_sense_len);
2157
2158 ql_dbg(ql_dbg_io, vha, 0x304d,
2159 "sense_len=0x%x par_sense_len=0x%x track_sense_len=0x%x.\n",
2160 sense_len, par_sense_len, track_sense_len);
2161 if (GET_FW_SENSE_LEN(sp) > 0) {
2162 rsp->status_srb = sp;
2163 cp->result = res;
2164 }
2165
2166 if (sense_len) {
2167 ql_dbg(ql_dbg_io + ql_dbg_buffer, vha, 0x3039,
Hannes Reinecke9cb78c12014-06-25 15:27:36 +02002168 "Check condition Sense data, nexus%ld:%d:%llu cmd=%p.\n",
Joe Carnuccio25ff6af2017-01-19 22:28:04 -08002169 sp->vha->host_no, cp->device->id, cp->device->lun,
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002170 cp);
2171 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x3049,
2172 cp->sense_buffer, sense_len);
2173 }
2174}
2175
2176static void
2177qlafx00_tm_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
2178 struct tsk_mgmt_entry_fx00 *pkt, srb_t *sp,
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04002179 __le16 sstatus, __le16 cpstatus)
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002180{
2181 struct srb_iocb *tmf;
2182
2183 tmf = &sp->u.iocb_cmd;
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04002184 if (cpstatus != cpu_to_le16((uint16_t)CS_COMPLETE) ||
2185 (sstatus & cpu_to_le16((uint16_t)SS_RESPONSE_INFO_LEN_VALID)))
2186 cpstatus = cpu_to_le16((uint16_t)CS_INCOMPLETE);
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002187 tmf->u.tmf.comp_status = cpstatus;
Joe Carnuccio25ff6af2017-01-19 22:28:04 -08002188 sp->done(sp, 0);
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002189}
2190
2191static void
2192qlafx00_abort_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
2193 struct abort_iocb_entry_fx00 *pkt)
2194{
2195 const char func[] = "ABT_IOCB";
2196 srb_t *sp;
2197 struct srb_iocb *abt;
2198
2199 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
2200 if (!sp)
2201 return;
2202
2203 abt = &sp->u.iocb_cmd;
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04002204 abt->u.abt.comp_status = pkt->tgt_id_sts;
Joe Carnuccio25ff6af2017-01-19 22:28:04 -08002205 sp->done(sp, 0);
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002206}
2207
2208static void
2209qlafx00_ioctl_iosb_entry(scsi_qla_host_t *vha, struct req_que *req,
2210 struct ioctl_iocb_entry_fx00 *pkt)
2211{
2212 const char func[] = "IOSB_IOCB";
2213 srb_t *sp;
Johannes Thumshirn75cc8cf2016-11-17 10:31:19 +01002214 struct bsg_job *bsg_job;
Johannes Thumshirn01e0e152016-11-17 10:31:12 +01002215 struct fc_bsg_reply *bsg_reply;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002216 struct srb_iocb *iocb_job;
Bart Van Assche5b0af472018-10-18 15:45:45 -07002217 int res = 0;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002218 struct qla_mt_iocb_rsp_fx00 fstatus;
2219 uint8_t *fw_sts_ptr;
2220
2221 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
2222 if (!sp)
2223 return;
2224
2225 if (sp->type == SRB_FXIOCB_DCMD) {
2226 iocb_job = &sp->u.iocb_cmd;
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04002227 iocb_job->u.fxiocb.seq_number = pkt->seq_no;
2228 iocb_job->u.fxiocb.fw_flags = pkt->fw_iotcl_flags;
2229 iocb_job->u.fxiocb.result = pkt->status;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002230 if (iocb_job->u.fxiocb.flags & SRB_FXDISC_RSP_DWRD_VALID)
2231 iocb_job->u.fxiocb.req_data =
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04002232 pkt->dataword_r;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002233 } else {
2234 bsg_job = sp->u.bsg_job;
Johannes Thumshirn01e0e152016-11-17 10:31:12 +01002235 bsg_reply = bsg_job->reply;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002236
2237 memset(&fstatus, 0, sizeof(struct qla_mt_iocb_rsp_fx00));
2238
2239 fstatus.reserved_1 = pkt->reserved_0;
2240 fstatus.func_type = pkt->comp_func_num;
2241 fstatus.ioctl_flags = pkt->fw_iotcl_flags;
2242 fstatus.ioctl_data = pkt->dataword_r;
2243 fstatus.adapid = pkt->adapid;
Armen Baloyand68b3e02014-02-26 04:15:09 -05002244 fstatus.reserved_2 = pkt->dataword_r_extra;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002245 fstatus.res_count = pkt->residuallen;
2246 fstatus.status = pkt->status;
2247 fstatus.seq_number = pkt->seq_no;
2248 memcpy(fstatus.reserved_3,
2249 pkt->reserved_2, 20 * sizeof(uint8_t));
2250
Christoph Hellwig05231a32017-10-03 12:48:40 +02002251 fw_sts_ptr = bsg_job->reply + sizeof(struct fc_bsg_reply);
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002252
Joe Carnucciof8f97b02019-03-12 11:08:16 -07002253 memcpy(fw_sts_ptr, &fstatus, sizeof(fstatus));
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002254 bsg_job->reply_len = sizeof(struct fc_bsg_reply) +
2255 sizeof(struct qla_mt_iocb_rsp_fx00) + sizeof(uint8_t);
2256
2257 ql_dump_buffer(ql_dbg_user + ql_dbg_verbose,
Joe Carnucciof8f97b02019-03-12 11:08:16 -07002258 sp->vha, 0x5080, pkt, sizeof(*pkt));
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002259
2260 ql_dump_buffer(ql_dbg_user + ql_dbg_verbose,
Joe Carnucciof8f97b02019-03-12 11:08:16 -07002261 sp->vha, 0x5074,
2262 fw_sts_ptr, sizeof(fstatus));
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002263
Johannes Thumshirn01e0e152016-11-17 10:31:12 +01002264 res = bsg_reply->result = DID_OK << 16;
2265 bsg_reply->reply_payload_rcv_len =
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002266 bsg_job->reply_payload.payload_len;
2267 }
Joe Carnuccio25ff6af2017-01-19 22:28:04 -08002268 sp->done(sp, res);
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002269}
2270
2271/**
2272 * qlafx00_status_entry() - Process a Status IOCB entry.
Bart Van Assche2db62282018-01-23 16:33:51 -08002273 * @vha: SCSI driver HA context
2274 * @rsp: response queue
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002275 * @pkt: Entry pointer
2276 */
2277static void
2278qlafx00_status_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, void *pkt)
2279{
2280 srb_t *sp;
2281 fc_port_t *fcport;
2282 struct scsi_cmnd *cp;
2283 struct sts_entry_fx00 *sts;
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04002284 __le16 comp_status;
2285 __le16 scsi_status;
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04002286 __le16 lscsi_status;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002287 int32_t resid;
2288 uint32_t sense_len, par_sense_len, rsp_info_len, resid_len,
2289 fw_resid_len;
2290 uint8_t *rsp_info = NULL, *sense_data = NULL;
2291 struct qla_hw_data *ha = vha->hw;
2292 uint32_t hindex, handle;
2293 uint16_t que;
2294 struct req_que *req;
2295 int logit = 1;
2296 int res = 0;
2297
2298 sts = (struct sts_entry_fx00 *) pkt;
2299
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04002300 comp_status = sts->comp_status;
2301 scsi_status = sts->scsi_status & cpu_to_le16((uint16_t)SS_MASK);
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002302 hindex = sts->handle;
2303 handle = LSW(hindex);
2304
2305 que = MSW(hindex);
2306 req = ha->req_q_map[que];
2307
2308 /* Validate handle. */
2309 if (handle < req->num_outstanding_cmds)
2310 sp = req->outstanding_cmds[handle];
2311 else
2312 sp = NULL;
2313
2314 if (sp == NULL) {
2315 ql_dbg(ql_dbg_io, vha, 0x3034,
2316 "Invalid status handle (0x%x).\n", handle);
2317
2318 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2319 qla2xxx_wake_dpc(vha);
2320 return;
2321 }
2322
2323 if (sp->type == SRB_TM_CMD) {
2324 req->outstanding_cmds[handle] = NULL;
2325 qlafx00_tm_iocb_entry(vha, req, pkt, sp,
2326 scsi_status, comp_status);
2327 return;
2328 }
2329
2330 /* Fast path completion. */
2331 if (comp_status == CS_COMPLETE && scsi_status == 0) {
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002332 qla2x00_process_completed_request(vha, req, handle);
2333 return;
2334 }
2335
2336 req->outstanding_cmds[handle] = NULL;
2337 cp = GET_CMD_SP(sp);
2338 if (cp == NULL) {
2339 ql_dbg(ql_dbg_io, vha, 0x3048,
2340 "Command already returned (0x%x/%p).\n",
2341 handle, sp);
2342
2343 return;
2344 }
2345
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04002346 lscsi_status = scsi_status & cpu_to_le16((uint16_t)STATUS_MASK);
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002347
2348 fcport = sp->fcport;
2349
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002350 sense_len = par_sense_len = rsp_info_len = resid_len =
2351 fw_resid_len = 0;
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04002352 if (scsi_status & cpu_to_le16((uint16_t)SS_SENSE_LEN_VALID))
2353 sense_len = sts->sense_len;
2354 if (scsi_status & cpu_to_le16(((uint16_t)SS_RESIDUAL_UNDER
2355 | (uint16_t)SS_RESIDUAL_OVER)))
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002356 resid_len = le32_to_cpu(sts->residual_len);
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04002357 if (comp_status == cpu_to_le16((uint16_t)CS_DATA_UNDERRUN))
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002358 fw_resid_len = le32_to_cpu(sts->residual_len);
2359 rsp_info = sense_data = sts->data;
2360 par_sense_len = sizeof(sts->data);
2361
2362 /* Check for overrun. */
2363 if (comp_status == CS_COMPLETE &&
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04002364 scsi_status & cpu_to_le16((uint16_t)SS_RESIDUAL_OVER))
2365 comp_status = cpu_to_le16((uint16_t)CS_DATA_OVERRUN);
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002366
2367 /*
2368 * Based on Host and scsi status generate status code for Linux
2369 */
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04002370 switch (le16_to_cpu(comp_status)) {
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002371 case CS_COMPLETE:
2372 case CS_QUEUE_FULL:
2373 if (scsi_status == 0) {
2374 res = DID_OK << 16;
2375 break;
2376 }
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04002377 if (scsi_status & cpu_to_le16(((uint16_t)SS_RESIDUAL_UNDER
2378 | (uint16_t)SS_RESIDUAL_OVER))) {
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002379 resid = resid_len;
2380 scsi_set_resid(cp, resid);
2381
2382 if (!lscsi_status &&
2383 ((unsigned)(scsi_bufflen(cp) - resid) <
2384 cp->underflow)) {
2385 ql_dbg(ql_dbg_io, fcport->vha, 0x3050,
2386 "Mid-layer underflow "
2387 "detected (0x%x of 0x%x bytes).\n",
2388 resid, scsi_bufflen(cp));
2389
2390 res = DID_ERROR << 16;
2391 break;
2392 }
2393 }
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04002394 res = DID_OK << 16 | le16_to_cpu(lscsi_status);
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002395
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04002396 if (lscsi_status ==
2397 cpu_to_le16((uint16_t)SAM_STAT_TASK_SET_FULL)) {
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002398 ql_dbg(ql_dbg_io, fcport->vha, 0x3051,
2399 "QUEUE FULL detected.\n");
2400 break;
2401 }
2402 logit = 0;
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04002403 if (lscsi_status != cpu_to_le16((uint16_t)SS_CHECK_CONDITION))
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002404 break;
2405
2406 memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04002407 if (!(scsi_status & cpu_to_le16((uint16_t)SS_SENSE_LEN_VALID)))
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002408 break;
2409
2410 qlafx00_handle_sense(sp, sense_data, par_sense_len, sense_len,
2411 rsp, res);
2412 break;
2413
2414 case CS_DATA_UNDERRUN:
2415 /* Use F/W calculated residual length. */
2416 if (IS_FWI2_CAPABLE(ha) || IS_QLAFX00(ha))
2417 resid = fw_resid_len;
2418 else
2419 resid = resid_len;
2420 scsi_set_resid(cp, resid);
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04002421 if (scsi_status & cpu_to_le16((uint16_t)SS_RESIDUAL_UNDER)) {
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002422 if ((IS_FWI2_CAPABLE(ha) || IS_QLAFX00(ha))
2423 && fw_resid_len != resid_len) {
2424 ql_dbg(ql_dbg_io, fcport->vha, 0x3052,
2425 "Dropped frame(s) detected "
2426 "(0x%x of 0x%x bytes).\n",
2427 resid, scsi_bufflen(cp));
2428
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04002429 res = DID_ERROR << 16 |
2430 le16_to_cpu(lscsi_status);
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002431 goto check_scsi_status;
2432 }
2433
2434 if (!lscsi_status &&
2435 ((unsigned)(scsi_bufflen(cp) - resid) <
2436 cp->underflow)) {
2437 ql_dbg(ql_dbg_io, fcport->vha, 0x3053,
2438 "Mid-layer underflow "
2439 "detected (0x%x of 0x%x bytes, "
2440 "cp->underflow: 0x%x).\n",
2441 resid, scsi_bufflen(cp), cp->underflow);
2442
2443 res = DID_ERROR << 16;
2444 break;
2445 }
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04002446 } else if (lscsi_status !=
2447 cpu_to_le16((uint16_t)SAM_STAT_TASK_SET_FULL) &&
2448 lscsi_status != cpu_to_le16((uint16_t)SAM_STAT_BUSY)) {
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002449 /*
2450 * scsi status of task set and busy are considered
2451 * to be task not completed.
2452 */
2453
2454 ql_dbg(ql_dbg_io, fcport->vha, 0x3054,
2455 "Dropped frame(s) detected (0x%x "
2456 "of 0x%x bytes).\n", resid,
2457 scsi_bufflen(cp));
2458
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04002459 res = DID_ERROR << 16 | le16_to_cpu(lscsi_status);
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002460 goto check_scsi_status;
2461 } else {
2462 ql_dbg(ql_dbg_io, fcport->vha, 0x3055,
2463 "scsi_status: 0x%x, lscsi_status: 0x%x\n",
2464 scsi_status, lscsi_status);
2465 }
2466
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04002467 res = DID_OK << 16 | le16_to_cpu(lscsi_status);
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002468 logit = 0;
2469
2470check_scsi_status:
2471 /*
2472 * Check to see if SCSI Status is non zero. If so report SCSI
2473 * Status.
2474 */
2475 if (lscsi_status != 0) {
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04002476 if (lscsi_status ==
2477 cpu_to_le16((uint16_t)SAM_STAT_TASK_SET_FULL)) {
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002478 ql_dbg(ql_dbg_io, fcport->vha, 0x3056,
2479 "QUEUE FULL detected.\n");
2480 logit = 1;
2481 break;
2482 }
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04002483 if (lscsi_status !=
2484 cpu_to_le16((uint16_t)SS_CHECK_CONDITION))
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002485 break;
2486
2487 memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04002488 if (!(scsi_status &
2489 cpu_to_le16((uint16_t)SS_SENSE_LEN_VALID)))
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002490 break;
2491
2492 qlafx00_handle_sense(sp, sense_data, par_sense_len,
2493 sense_len, rsp, res);
2494 }
2495 break;
2496
2497 case CS_PORT_LOGGED_OUT:
2498 case CS_PORT_CONFIG_CHG:
2499 case CS_PORT_BUSY:
2500 case CS_INCOMPLETE:
2501 case CS_PORT_UNAVAILABLE:
2502 case CS_TIMEOUT:
2503 case CS_RESET:
2504
2505 /*
2506 * We are going to have the fc class block the rport
2507 * while we try to recover so instruct the mid layer
2508 * to requeue until the class decides how to handle this.
2509 */
2510 res = DID_TRANSPORT_DISRUPTED << 16;
2511
2512 ql_dbg(ql_dbg_io, fcport->vha, 0x3057,
2513 "Port down status: port-state=0x%x.\n",
2514 atomic_read(&fcport->state));
2515
2516 if (atomic_read(&fcport->state) == FCS_ONLINE)
2517 qla2x00_mark_device_lost(fcport->vha, fcport, 1, 1);
2518 break;
2519
2520 case CS_ABORTED:
2521 res = DID_RESET << 16;
2522 break;
2523
2524 default:
2525 res = DID_ERROR << 16;
2526 break;
2527 }
2528
2529 if (logit)
2530 ql_dbg(ql_dbg_io, fcport->vha, 0x3058,
Hannes Reinecke9cb78c12014-06-25 15:27:36 +02002531 "FCP command status: 0x%x-0x%x (0x%x) nexus=%ld:%d:%llu "
Oleksandr Khoshaba7b8335582013-08-27 01:37:27 -04002532 "tgt_id: 0x%x lscsi_status: 0x%x cdb=%10phN len=0x%x "
Bart Van Asschec3ff3562015-07-09 07:22:38 -07002533 "rsp_info=%p resid=0x%x fw_resid=0x%x sense_len=0x%x, "
Oleksandr Khoshaba7b8335582013-08-27 01:37:27 -04002534 "par_sense_len=0x%x, rsp_info_len=0x%x\n",
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002535 comp_status, scsi_status, res, vha->host_no,
2536 cp->device->id, cp->device->lun, fcport->tgt_id,
Oleksandr Khoshaba7b8335582013-08-27 01:37:27 -04002537 lscsi_status, cp->cmnd, scsi_bufflen(cp),
Bart Van Asschec3ff3562015-07-09 07:22:38 -07002538 rsp_info, resid_len, fw_resid_len, sense_len,
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002539 par_sense_len, rsp_info_len);
2540
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002541 if (rsp->status_srb == NULL)
Joe Carnuccio25ff6af2017-01-19 22:28:04 -08002542 sp->done(sp, res);
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002543}
2544
2545/**
2546 * qlafx00_status_cont_entry() - Process a Status Continuations entry.
Bart Van Assche2db62282018-01-23 16:33:51 -08002547 * @rsp: response queue
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002548 * @pkt: Entry pointer
2549 *
2550 * Extended sense data.
2551 */
2552static void
2553qlafx00_status_cont_entry(struct rsp_que *rsp, sts_cont_entry_t *pkt)
2554{
2555 uint8_t sense_sz = 0;
2556 struct qla_hw_data *ha = rsp->hw;
2557 struct scsi_qla_host *vha = pci_get_drvdata(ha->pdev);
2558 srb_t *sp = rsp->status_srb;
2559 struct scsi_cmnd *cp;
2560 uint32_t sense_len;
2561 uint8_t *sense_ptr;
2562
2563 if (!sp) {
2564 ql_dbg(ql_dbg_io, vha, 0x3037,
2565 "no SP, sp = %p\n", sp);
2566 return;
2567 }
2568
2569 if (!GET_FW_SENSE_LEN(sp)) {
2570 ql_dbg(ql_dbg_io, vha, 0x304b,
2571 "no fw sense data, sp = %p\n", sp);
2572 return;
2573 }
2574 cp = GET_CMD_SP(sp);
2575 if (cp == NULL) {
2576 ql_log(ql_log_warn, vha, 0x303b,
2577 "cmd is NULL: already returned to OS (sp=%p).\n", sp);
2578
2579 rsp->status_srb = NULL;
2580 return;
2581 }
2582
2583 if (!GET_CMD_SENSE_LEN(sp)) {
2584 ql_dbg(ql_dbg_io, vha, 0x304c,
2585 "no sense data, sp = %p\n", sp);
2586 } else {
2587 sense_len = GET_CMD_SENSE_LEN(sp);
2588 sense_ptr = GET_CMD_SENSE_PTR(sp);
2589 ql_dbg(ql_dbg_io, vha, 0x304f,
2590 "sp=%p sense_len=0x%x sense_ptr=%p.\n",
2591 sp, sense_len, sense_ptr);
2592
2593 if (sense_len > sizeof(pkt->data))
2594 sense_sz = sizeof(pkt->data);
2595 else
2596 sense_sz = sense_len;
2597
2598 /* Move sense data. */
2599 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x304e,
Joe Carnucciof8f97b02019-03-12 11:08:16 -07002600 pkt, sizeof(*pkt));
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002601 memcpy(sense_ptr, pkt->data, sense_sz);
2602 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x304a,
2603 sense_ptr, sense_sz);
2604
2605 sense_len -= sense_sz;
2606 sense_ptr += sense_sz;
2607
2608 SET_CMD_SENSE_PTR(sp, sense_ptr);
2609 SET_CMD_SENSE_LEN(sp, sense_len);
2610 }
2611 sense_len = GET_FW_SENSE_LEN(sp);
2612 sense_len = (sense_len > sizeof(pkt->data)) ?
2613 (sense_len - sizeof(pkt->data)) : 0;
2614 SET_FW_SENSE_LEN(sp, sense_len);
2615
2616 /* Place command on done queue. */
2617 if (sense_len == 0) {
2618 rsp->status_srb = NULL;
Joe Carnuccio25ff6af2017-01-19 22:28:04 -08002619 sp->done(sp, cp->result);
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002620 }
2621}
2622
2623/**
2624 * qlafx00_multistatus_entry() - Process Multi response queue entries.
Bart Van Assche2db62282018-01-23 16:33:51 -08002625 * @vha: SCSI driver HA context
2626 * @rsp: response queue
Bart Van Assche807eb902018-10-18 15:45:41 -07002627 * @pkt: received packet
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002628 */
2629static void
2630qlafx00_multistatus_entry(struct scsi_qla_host *vha,
2631 struct rsp_que *rsp, void *pkt)
2632{
2633 srb_t *sp;
2634 struct multi_sts_entry_fx00 *stsmfx;
2635 struct qla_hw_data *ha = vha->hw;
2636 uint32_t handle, hindex, handle_count, i;
2637 uint16_t que;
2638 struct req_que *req;
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04002639 __le32 *handle_ptr;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002640
2641 stsmfx = (struct multi_sts_entry_fx00 *) pkt;
2642
2643 handle_count = stsmfx->handle_count;
2644
2645 if (handle_count > MAX_HANDLE_COUNT) {
2646 ql_dbg(ql_dbg_io, vha, 0x3035,
2647 "Invalid handle count (0x%x).\n", handle_count);
2648 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2649 qla2xxx_wake_dpc(vha);
2650 return;
2651 }
2652
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04002653 handle_ptr = &stsmfx->handles[0];
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002654
2655 for (i = 0; i < handle_count; i++) {
2656 hindex = le32_to_cpu(*handle_ptr);
2657 handle = LSW(hindex);
2658 que = MSW(hindex);
2659 req = ha->req_q_map[que];
2660
2661 /* Validate handle. */
2662 if (handle < req->num_outstanding_cmds)
2663 sp = req->outstanding_cmds[handle];
2664 else
2665 sp = NULL;
2666
2667 if (sp == NULL) {
2668 ql_dbg(ql_dbg_io, vha, 0x3044,
2669 "Invalid status handle (0x%x).\n", handle);
2670 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2671 qla2xxx_wake_dpc(vha);
2672 return;
2673 }
2674 qla2x00_process_completed_request(vha, req, handle);
2675 handle_ptr++;
2676 }
2677}
2678
2679/**
2680 * qlafx00_error_entry() - Process an error entry.
Bart Van Assche2db62282018-01-23 16:33:51 -08002681 * @vha: SCSI driver HA context
2682 * @rsp: response queue
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002683 * @pkt: Entry pointer
2684 */
2685static void
2686qlafx00_error_entry(scsi_qla_host_t *vha, struct rsp_que *rsp,
Bart Van Assche2c309ae2018-10-18 15:45:46 -07002687 struct sts_entry_fx00 *pkt)
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002688{
2689 srb_t *sp;
2690 struct qla_hw_data *ha = vha->hw;
2691 const char func[] = "ERROR-IOCB";
Saurav Kashyapd550dd22014-02-26 04:15:01 -05002692 uint16_t que = 0;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002693 struct req_que *req = NULL;
2694 int res = DID_ERROR << 16;
2695
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002696 req = ha->req_q_map[que];
2697
2698 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
2699 if (sp) {
Joe Carnuccio25ff6af2017-01-19 22:28:04 -08002700 sp->done(sp, res);
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002701 return;
2702 }
2703
2704 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2705 qla2xxx_wake_dpc(vha);
2706}
2707
2708/**
2709 * qlafx00_process_response_queue() - Process response queue entries.
Bart Van Assche2db62282018-01-23 16:33:51 -08002710 * @vha: SCSI driver HA context
2711 * @rsp: response queue
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002712 */
2713static void
2714qlafx00_process_response_queue(struct scsi_qla_host *vha,
2715 struct rsp_que *rsp)
2716{
2717 struct sts_entry_fx00 *pkt;
2718 response_t *lptr;
Saurav Kashyap6ac1f3b2014-02-26 04:15:10 -05002719 uint16_t lreq_q_in = 0;
2720 uint16_t lreq_q_out = 0;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002721
Saurav Kashyap6ac1f3b2014-02-26 04:15:10 -05002722 lreq_q_in = RD_REG_DWORD(rsp->rsp_q_in);
Armen Baloyan9929c472014-04-11 16:54:25 -04002723 lreq_q_out = rsp->ring_index;
Saurav Kashyap6ac1f3b2014-02-26 04:15:10 -05002724
2725 while (lreq_q_in != lreq_q_out) {
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002726 lptr = rsp->ring_ptr;
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04002727 memcpy_fromio(rsp->rsp_pkt, (void __iomem *)lptr,
2728 sizeof(rsp->rsp_pkt));
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002729 pkt = (struct sts_entry_fx00 *)rsp->rsp_pkt;
2730
2731 rsp->ring_index++;
Saurav Kashyap6ac1f3b2014-02-26 04:15:10 -05002732 lreq_q_out++;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002733 if (rsp->ring_index == rsp->length) {
Saurav Kashyap6ac1f3b2014-02-26 04:15:10 -05002734 lreq_q_out = 0;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002735 rsp->ring_index = 0;
2736 rsp->ring_ptr = rsp->ring;
2737 } else {
2738 rsp->ring_ptr++;
2739 }
2740
2741 if (pkt->entry_status != 0 &&
2742 pkt->entry_type != IOCTL_IOSB_TYPE_FX00) {
Bart Van Assche2c309ae2018-10-18 15:45:46 -07002743 ql_dbg(ql_dbg_async, vha, 0x507f,
2744 "type of error status in response: 0x%x\n",
2745 pkt->entry_status);
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002746 qlafx00_error_entry(vha, rsp,
Bart Van Assche2c309ae2018-10-18 15:45:46 -07002747 (struct sts_entry_fx00 *)pkt);
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002748 continue;
2749 }
2750
2751 switch (pkt->entry_type) {
2752 case STATUS_TYPE_FX00:
2753 qlafx00_status_entry(vha, rsp, pkt);
2754 break;
2755
2756 case STATUS_CONT_TYPE_FX00:
2757 qlafx00_status_cont_entry(rsp, (sts_cont_entry_t *)pkt);
2758 break;
2759
2760 case MULTI_STATUS_TYPE_FX00:
2761 qlafx00_multistatus_entry(vha, rsp, pkt);
2762 break;
2763
2764 case ABORT_IOCB_TYPE_FX00:
2765 qlafx00_abort_iocb_entry(vha, rsp->req,
2766 (struct abort_iocb_entry_fx00 *)pkt);
2767 break;
2768
2769 case IOCTL_IOSB_TYPE_FX00:
2770 qlafx00_ioctl_iosb_entry(vha, rsp->req,
2771 (struct ioctl_iocb_entry_fx00 *)pkt);
2772 break;
2773 default:
2774 /* Type Not Supported. */
2775 ql_dbg(ql_dbg_async, vha, 0x5081,
2776 "Received unknown response pkt type %x "
2777 "entry status=%x.\n",
2778 pkt->entry_type, pkt->entry_status);
2779 break;
2780 }
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002781 }
2782
2783 /* Adjust ring index */
2784 WRT_REG_DWORD(rsp->rsp_q_out, rsp->ring_index);
2785}
2786
2787/**
2788 * qlafx00_async_event() - Process aynchronous events.
Bart Van Assche2db62282018-01-23 16:33:51 -08002789 * @vha: SCSI driver HA context
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002790 */
2791static void
2792qlafx00_async_event(scsi_qla_host_t *vha)
2793{
2794 struct qla_hw_data *ha = vha->hw;
2795 struct device_reg_fx00 __iomem *reg;
2796 int data_size = 1;
2797
2798 reg = &ha->iobase->ispfx00;
2799 /* Setup to process RIO completion. */
2800 switch (ha->aenmb[0]) {
2801 case QLAFX00_MBA_SYSTEM_ERR: /* System Error */
2802 ql_log(ql_log_warn, vha, 0x5079,
2803 "ISP System Error - mbx1=%x\n", ha->aenmb[0]);
2804 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2805 break;
2806
2807 case QLAFX00_MBA_SHUTDOWN_RQSTD: /* Shutdown requested */
2808 ql_dbg(ql_dbg_async, vha, 0x5076,
2809 "Asynchronous FW shutdown requested.\n");
2810 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2811 qla2xxx_wake_dpc(vha);
2812 break;
2813
2814 case QLAFX00_MBA_PORT_UPDATE: /* Port database update */
Saurav Kashyap965c77a2014-02-26 04:15:03 -05002815 ha->aenmb[1] = RD_REG_DWORD(&reg->aenmailbox1);
2816 ha->aenmb[2] = RD_REG_DWORD(&reg->aenmailbox2);
2817 ha->aenmb[3] = RD_REG_DWORD(&reg->aenmailbox3);
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002818 ql_dbg(ql_dbg_async, vha, 0x5077,
2819 "Asynchronous port Update received "
2820 "aenmb[0]: %x, aenmb[1]: %x, aenmb[2]: %x, aenmb[3]: %x\n",
2821 ha->aenmb[0], ha->aenmb[1], ha->aenmb[2], ha->aenmb[3]);
2822 data_size = 4;
2823 break;
Armen Baloyan71e56002013-08-27 01:37:38 -04002824
2825 case QLAFX00_MBA_TEMP_OVER: /* Over temperature event */
Armen Baloyan4881d092013-08-27 01:37:46 -04002826 ql_log(ql_log_info, vha, 0x5085,
2827 "Asynchronous over temperature event received "
2828 "aenmb[0]: %x\n",
2829 ha->aenmb[0]);
2830 break;
2831
2832 case QLAFX00_MBA_TEMP_NORM: /* Normal temperature event */
2833 ql_log(ql_log_info, vha, 0x5086,
2834 "Asynchronous normal temperature event received "
2835 "aenmb[0]: %x\n",
2836 ha->aenmb[0]);
2837 break;
2838
Armen Baloyan71e56002013-08-27 01:37:38 -04002839 case QLAFX00_MBA_TEMP_CRIT: /* Critical temperature event */
2840 ql_log(ql_log_info, vha, 0x5083,
2841 "Asynchronous critical temperature event received "
2842 "aenmb[0]: %x\n",
2843 ha->aenmb[0]);
Armen Baloyan71e56002013-08-27 01:37:38 -04002844 break;
2845
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002846 default:
2847 ha->aenmb[1] = RD_REG_WORD(&reg->aenmailbox1);
2848 ha->aenmb[2] = RD_REG_WORD(&reg->aenmailbox2);
2849 ha->aenmb[3] = RD_REG_WORD(&reg->aenmailbox3);
2850 ha->aenmb[4] = RD_REG_WORD(&reg->aenmailbox4);
2851 ha->aenmb[5] = RD_REG_WORD(&reg->aenmailbox5);
2852 ha->aenmb[6] = RD_REG_WORD(&reg->aenmailbox6);
2853 ha->aenmb[7] = RD_REG_WORD(&reg->aenmailbox7);
2854 ql_dbg(ql_dbg_async, vha, 0x5078,
2855 "AEN:%04x %04x %04x %04x :%04x %04x %04x %04x\n",
2856 ha->aenmb[0], ha->aenmb[1], ha->aenmb[2], ha->aenmb[3],
2857 ha->aenmb[4], ha->aenmb[5], ha->aenmb[6], ha->aenmb[7]);
2858 break;
2859 }
2860 qlafx00_post_aenfx_work(vha, ha->aenmb[0],
2861 (uint32_t *)ha->aenmb, data_size);
2862}
2863
2864/**
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002865 * qlafx00x_mbx_completion() - Process mailbox command completions.
Bart Van Assche2db62282018-01-23 16:33:51 -08002866 * @vha: SCSI driver HA context
Bart Van Assche807eb902018-10-18 15:45:41 -07002867 * @mb0: value to be written into mailbox register 0
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002868 */
2869static void
2870qlafx00_mbx_completion(scsi_qla_host_t *vha, uint32_t mb0)
2871{
2872 uint16_t cnt;
Saurav Kashyap965c77a2014-02-26 04:15:03 -05002873 uint32_t __iomem *wptr;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002874 struct qla_hw_data *ha = vha->hw;
2875 struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00;
2876
2877 if (!ha->mcp32)
2878 ql_dbg(ql_dbg_async, vha, 0x507e, "MBX pointer ERROR.\n");
2879
2880 /* Load return mailbox registers. */
2881 ha->flags.mbox_int = 1;
2882 ha->mailbox_out32[0] = mb0;
Saurav Kashyap965c77a2014-02-26 04:15:03 -05002883 wptr = (uint32_t __iomem *)&reg->mailbox17;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002884
2885 for (cnt = 1; cnt < ha->mbx_count; cnt++) {
Saurav Kashyap965c77a2014-02-26 04:15:03 -05002886 ha->mailbox_out32[cnt] = RD_REG_DWORD(wptr);
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002887 wptr++;
2888 }
2889}
2890
2891/**
2892 * qlafx00_intr_handler() - Process interrupts for the ISPFX00.
Bart Van Assche807eb902018-10-18 15:45:41 -07002893 * @irq: interrupt number
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002894 * @dev_id: SCSI driver HA context
2895 *
2896 * Called by system whenever the host adapter generates an interrupt.
2897 *
2898 * Returns handled flag.
2899 */
2900irqreturn_t
2901qlafx00_intr_handler(int irq, void *dev_id)
2902{
2903 scsi_qla_host_t *vha;
2904 struct qla_hw_data *ha;
2905 struct device_reg_fx00 __iomem *reg;
2906 int status;
2907 unsigned long iter;
2908 uint32_t stat;
2909 uint32_t mb[8];
2910 struct rsp_que *rsp;
2911 unsigned long flags;
2912 uint32_t clr_intr = 0;
Saurav Kashyapfbe9c542014-02-26 04:15:11 -05002913 uint32_t intr_stat = 0;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002914
2915 rsp = (struct rsp_que *) dev_id;
2916 if (!rsp) {
2917 ql_log(ql_log_info, NULL, 0x507d,
2918 "%s: NULL response queue pointer.\n", __func__);
2919 return IRQ_NONE;
2920 }
2921
2922 ha = rsp->hw;
2923 reg = &ha->iobase->ispfx00;
2924 status = 0;
2925
2926 if (unlikely(pci_channel_offline(ha->pdev)))
2927 return IRQ_HANDLED;
2928
2929 spin_lock_irqsave(&ha->hardware_lock, flags);
2930 vha = pci_get_drvdata(ha->pdev);
2931 for (iter = 50; iter--; clr_intr = 0) {
2932 stat = QLAFX00_RD_INTR_REG(ha);
Joe Lawrencec821e0d2014-08-26 17:11:41 -04002933 if (qla2x00_check_reg32_for_disconnect(vha, stat))
Chad Dupuisf3ddac12013-10-30 03:38:16 -04002934 break;
Saurav Kashyapfbe9c542014-02-26 04:15:11 -05002935 intr_stat = stat & QLAFX00_HST_INT_STS_BITS;
2936 if (!intr_stat)
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002937 break;
2938
Saurav Kashyapfbe9c542014-02-26 04:15:11 -05002939 if (stat & QLAFX00_INTR_MB_CMPLT) {
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002940 mb[0] = RD_REG_WORD(&reg->mailbox16);
2941 qlafx00_mbx_completion(vha, mb[0]);
2942 status |= MBX_INTERRUPT;
2943 clr_intr |= QLAFX00_INTR_MB_CMPLT;
Saurav Kashyapfbe9c542014-02-26 04:15:11 -05002944 }
2945 if (intr_stat & QLAFX00_INTR_ASYNC_CMPLT) {
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002946 ha->aenmb[0] = RD_REG_WORD(&reg->aenmailbox0);
2947 qlafx00_async_event(vha);
2948 clr_intr |= QLAFX00_INTR_ASYNC_CMPLT;
Saurav Kashyapfbe9c542014-02-26 04:15:11 -05002949 }
2950 if (intr_stat & QLAFX00_INTR_RSP_CMPLT) {
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002951 qlafx00_process_response_queue(vha, rsp);
2952 clr_intr |= QLAFX00_INTR_RSP_CMPLT;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002953 }
Saurav Kashyapfbe9c542014-02-26 04:15:11 -05002954
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002955 QLAFX00_CLR_INTR_REG(ha, clr_intr);
2956 QLAFX00_RD_INTR_REG(ha);
2957 }
gurinder.shergill@hp.com36439832013-04-23 10:13:17 -07002958
2959 qla2x00_handle_mbx_completion(ha, status);
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002960 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2961
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002962 return IRQ_HANDLED;
2963}
2964
2965/** QLAFX00 specific IOCB implementation functions */
2966
2967static inline cont_a64_entry_t *
2968qlafx00_prep_cont_type1_iocb(struct req_que *req,
2969 cont_a64_entry_t *lcont_pkt)
2970{
2971 cont_a64_entry_t *cont_pkt;
2972
2973 /* Adjust ring index. */
2974 req->ring_index++;
2975 if (req->ring_index == req->length) {
2976 req->ring_index = 0;
2977 req->ring_ptr = req->ring;
2978 } else {
2979 req->ring_ptr++;
2980 }
2981
2982 cont_pkt = (cont_a64_entry_t *)req->ring_ptr;
2983
2984 /* Load packet defaults. */
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04002985 lcont_pkt->entry_type = CONTINUE_A64_TYPE_FX00;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002986
2987 return cont_pkt;
2988}
2989
2990static inline void
2991qlafx00_build_scsi_iocbs(srb_t *sp, struct cmd_type_7_fx00 *cmd_pkt,
2992 uint16_t tot_dsds, struct cmd_type_7_fx00 *lcmd_pkt)
2993{
2994 uint16_t avail_dsds;
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04002995 __le32 *cur_dsd;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002996 scsi_qla_host_t *vha;
2997 struct scsi_cmnd *cmd;
2998 struct scatterlist *sg;
2999 int i, cont;
3000 struct req_que *req;
3001 cont_a64_entry_t lcont_pkt;
3002 cont_a64_entry_t *cont_pkt;
3003
Joe Carnuccio25ff6af2017-01-19 22:28:04 -08003004 vha = sp->vha;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04003005 req = vha->req;
3006
3007 cmd = GET_CMD_SP(sp);
3008 cont = 0;
3009 cont_pkt = NULL;
3010
3011 /* Update entry type to indicate Command Type 3 IOCB */
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04003012 lcmd_pkt->entry_type = FX00_COMMAND_TYPE_7;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04003013
3014 /* No data transfer */
3015 if (!scsi_bufflen(cmd) || cmd->sc_data_direction == DMA_NONE) {
Bart Van Asschead950362015-07-09 07:24:08 -07003016 lcmd_pkt->byte_count = cpu_to_le32(0);
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04003017 return;
3018 }
3019
3020 /* Set transfer direction */
3021 if (cmd->sc_data_direction == DMA_TO_DEVICE) {
Armen Baloyan378c5382013-04-25 01:29:18 -04003022 lcmd_pkt->cntrl_flags = TMF_WRITE_DATA;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04003023 vha->qla_stats.output_bytes += scsi_bufflen(cmd);
3024 } else if (cmd->sc_data_direction == DMA_FROM_DEVICE) {
Armen Baloyan378c5382013-04-25 01:29:18 -04003025 lcmd_pkt->cntrl_flags = TMF_READ_DATA;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04003026 vha->qla_stats.input_bytes += scsi_bufflen(cmd);
3027 }
3028
3029 /* One DSD is available in the Command Type 3 IOCB */
3030 avail_dsds = 1;
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04003031 cur_dsd = (__le32 *)&lcmd_pkt->dseg_0_address;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04003032
3033 /* Load data segments */
3034 scsi_for_each_sg(cmd, sg, tot_dsds, i) {
3035 dma_addr_t sle_dma;
3036
3037 /* Allocate additional continuation packets? */
3038 if (avail_dsds == 0) {
3039 /*
3040 * Five DSDs are available in the Continuation
3041 * Type 1 IOCB.
3042 */
3043 memset(&lcont_pkt, 0, REQUEST_ENTRY_SIZE);
3044 cont_pkt =
3045 qlafx00_prep_cont_type1_iocb(req, &lcont_pkt);
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04003046 cur_dsd = (__le32 *)lcont_pkt.dseg_0_address;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04003047 avail_dsds = 5;
3048 cont = 1;
3049 }
3050
3051 sle_dma = sg_dma_address(sg);
3052 *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
3053 *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
3054 *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
3055 avail_dsds--;
3056 if (avail_dsds == 0 && cont == 1) {
3057 cont = 0;
3058 memcpy_toio((void __iomem *)cont_pkt, &lcont_pkt,
Joe Carnucciof8f97b02019-03-12 11:08:16 -07003059 sizeof(lcont_pkt));
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04003060 }
3061
3062 }
3063 if (avail_dsds != 0 && cont == 1) {
3064 memcpy_toio((void __iomem *)cont_pkt, &lcont_pkt,
Joe Carnucciof8f97b02019-03-12 11:08:16 -07003065 sizeof(lcont_pkt));
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04003066 }
3067}
3068
3069/**
3070 * qlafx00_start_scsi() - Send a SCSI command to the ISP
3071 * @sp: command to send to the ISP
3072 *
3073 * Returns non-zero if a failure occurred, else zero.
3074 */
3075int
3076qlafx00_start_scsi(srb_t *sp)
3077{
Bart Van Assche52c82822015-07-09 07:23:26 -07003078 int nseg;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04003079 unsigned long flags;
3080 uint32_t index;
3081 uint32_t handle;
3082 uint16_t cnt;
3083 uint16_t req_cnt;
3084 uint16_t tot_dsds;
3085 struct req_que *req = NULL;
3086 struct rsp_que *rsp = NULL;
3087 struct scsi_cmnd *cmd = GET_CMD_SP(sp);
Joe Carnuccio25ff6af2017-01-19 22:28:04 -08003088 struct scsi_qla_host *vha = sp->vha;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04003089 struct qla_hw_data *ha = vha->hw;
3090 struct cmd_type_7_fx00 *cmd_pkt;
3091 struct cmd_type_7_fx00 lcmd_pkt;
3092 struct scsi_lun llun;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04003093
3094 /* Setup device pointers. */
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04003095 rsp = ha->rsp_q_map[0];
3096 req = vha->req;
3097
3098 /* So we know we haven't pci_map'ed anything yet */
3099 tot_dsds = 0;
3100
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04003101 /* Acquire ring specific lock */
3102 spin_lock_irqsave(&ha->hardware_lock, flags);
3103
3104 /* Check for room in outstanding command list. */
3105 handle = req->current_outstanding_cmd;
3106 for (index = 1; index < req->num_outstanding_cmds; index++) {
3107 handle++;
3108 if (handle == req->num_outstanding_cmds)
3109 handle = 1;
3110 if (!req->outstanding_cmds[handle])
3111 break;
3112 }
3113 if (index == req->num_outstanding_cmds)
3114 goto queuing_error;
3115
3116 /* Map the sg table so we have an accurate count of sg entries needed */
3117 if (scsi_sg_count(cmd)) {
3118 nseg = dma_map_sg(&ha->pdev->dev, scsi_sglist(cmd),
3119 scsi_sg_count(cmd), cmd->sc_data_direction);
3120 if (unlikely(!nseg))
3121 goto queuing_error;
3122 } else
3123 nseg = 0;
3124
3125 tot_dsds = nseg;
3126 req_cnt = qla24xx_calc_iocbs(vha, tot_dsds);
3127 if (req->cnt < (req_cnt + 2)) {
3128 cnt = RD_REG_DWORD_RELAXED(req->req_q_out);
3129
3130 if (req->ring_index < cnt)
3131 req->cnt = cnt - req->ring_index;
3132 else
3133 req->cnt = req->length -
3134 (req->ring_index - cnt);
3135 if (req->cnt < (req_cnt + 2))
3136 goto queuing_error;
3137 }
3138
3139 /* Build command packet. */
3140 req->current_outstanding_cmd = handle;
3141 req->outstanding_cmds[handle] = sp;
3142 sp->handle = handle;
3143 cmd->host_scribble = (unsigned char *)(unsigned long)handle;
3144 req->cnt -= req_cnt;
3145
3146 cmd_pkt = (struct cmd_type_7_fx00 *)req->ring_ptr;
3147
3148 memset(&lcmd_pkt, 0, REQUEST_ENTRY_SIZE);
3149
3150 lcmd_pkt.handle = MAKE_HANDLE(req->id, sp->handle);
Armen Baloyand68b3e02014-02-26 04:15:09 -05003151 lcmd_pkt.reserved_0 = 0;
3152 lcmd_pkt.port_path_ctrl = 0;
3153 lcmd_pkt.reserved_1 = 0;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04003154 lcmd_pkt.dseg_count = cpu_to_le16(tot_dsds);
3155 lcmd_pkt.tgt_idx = cpu_to_le16(sp->fcport->tgt_id);
3156
3157 int_to_scsilun(cmd->device->lun, &llun);
3158 host_to_adap((uint8_t *)&llun, (uint8_t *)&lcmd_pkt.lun,
3159 sizeof(lcmd_pkt.lun));
3160
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04003161 /* Load SCSI command packet. */
3162 host_to_adap(cmd->cmnd, lcmd_pkt.fcp_cdb, sizeof(lcmd_pkt.fcp_cdb));
3163 lcmd_pkt.byte_count = cpu_to_le32((uint32_t)scsi_bufflen(cmd));
3164
3165 /* Build IOCB segments */
3166 qlafx00_build_scsi_iocbs(sp, cmd_pkt, tot_dsds, &lcmd_pkt);
3167
3168 /* Set total data segment count. */
3169 lcmd_pkt.entry_count = (uint8_t)req_cnt;
3170
3171 /* Specify response queue number where completion should happen */
3172 lcmd_pkt.entry_status = (uint8_t) rsp->id;
3173
3174 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x302e,
Joe Carnucciof8f97b02019-03-12 11:08:16 -07003175 cmd->cmnd, cmd->cmd_len);
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04003176 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x3032,
Joe Carnucciof8f97b02019-03-12 11:08:16 -07003177 &lcmd_pkt, sizeof(lcmd_pkt));
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04003178
3179 memcpy_toio((void __iomem *)cmd_pkt, &lcmd_pkt, REQUEST_ENTRY_SIZE);
3180 wmb();
3181
3182 /* Adjust ring index. */
3183 req->ring_index++;
3184 if (req->ring_index == req->length) {
3185 req->ring_index = 0;
3186 req->ring_ptr = req->ring;
3187 } else
3188 req->ring_ptr++;
3189
3190 sp->flags |= SRB_DMA_VALID;
3191
3192 /* Set chip new ring index. */
3193 WRT_REG_DWORD(req->req_q_in, req->ring_index);
3194 QLAFX00_SET_HST_INTR(ha, ha->rqstq_intr_code);
3195
3196 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3197 return QLA_SUCCESS;
3198
3199queuing_error:
3200 if (tot_dsds)
3201 scsi_dma_unmap(cmd);
3202
3203 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3204
3205 return QLA_FUNCTION_FAILED;
3206}
3207
3208void
3209qlafx00_tm_iocb(srb_t *sp, struct tsk_mgmt_entry_fx00 *ptm_iocb)
3210{
3211 struct srb_iocb *fxio = &sp->u.iocb_cmd;
Joe Carnuccio25ff6af2017-01-19 22:28:04 -08003212 scsi_qla_host_t *vha = sp->vha;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04003213 struct req_que *req = vha->req;
3214 struct tsk_mgmt_entry_fx00 tm_iocb;
3215 struct scsi_lun llun;
3216
3217 memset(&tm_iocb, 0, sizeof(struct tsk_mgmt_entry_fx00));
3218 tm_iocb.entry_type = TSK_MGMT_IOCB_TYPE_FX00;
3219 tm_iocb.entry_count = 1;
3220 tm_iocb.handle = cpu_to_le32(MAKE_HANDLE(req->id, sp->handle));
Armen Baloyand68b3e02014-02-26 04:15:09 -05003221 tm_iocb.reserved_0 = 0;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04003222 tm_iocb.tgt_id = cpu_to_le16(sp->fcport->tgt_id);
3223 tm_iocb.control_flags = cpu_to_le32(fxio->u.tmf.flags);
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04003224 if (tm_iocb.control_flags == cpu_to_le32((uint32_t)TCF_LUN_RESET)) {
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04003225 int_to_scsilun(fxio->u.tmf.lun, &llun);
3226 host_to_adap((uint8_t *)&llun, (uint8_t *)&tm_iocb.lun,
3227 sizeof(struct scsi_lun));
3228 }
3229
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04003230 memcpy((void *)ptm_iocb, &tm_iocb,
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04003231 sizeof(struct tsk_mgmt_entry_fx00));
3232 wmb();
3233}
3234
3235void
3236qlafx00_abort_iocb(srb_t *sp, struct abort_iocb_entry_fx00 *pabt_iocb)
3237{
3238 struct srb_iocb *fxio = &sp->u.iocb_cmd;
Joe Carnuccio25ff6af2017-01-19 22:28:04 -08003239 scsi_qla_host_t *vha = sp->vha;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04003240 struct req_que *req = vha->req;
3241 struct abort_iocb_entry_fx00 abt_iocb;
3242
3243 memset(&abt_iocb, 0, sizeof(struct abort_iocb_entry_fx00));
3244 abt_iocb.entry_type = ABORT_IOCB_TYPE_FX00;
3245 abt_iocb.entry_count = 1;
3246 abt_iocb.handle = cpu_to_le32(MAKE_HANDLE(req->id, sp->handle));
3247 abt_iocb.abort_handle =
3248 cpu_to_le32(MAKE_HANDLE(req->id, fxio->u.abt.cmd_hndl));
3249 abt_iocb.tgt_id_sts = cpu_to_le16(sp->fcport->tgt_id);
3250 abt_iocb.req_que_no = cpu_to_le16(req->id);
3251
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04003252 memcpy((void *)pabt_iocb, &abt_iocb,
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04003253 sizeof(struct abort_iocb_entry_fx00));
3254 wmb();
3255}
3256
3257void
3258qlafx00_fxdisc_iocb(srb_t *sp, struct fxdisc_entry_fx00 *pfxiocb)
3259{
3260 struct srb_iocb *fxio = &sp->u.iocb_cmd;
3261 struct qla_mt_iocb_rqst_fx00 *piocb_rqst;
Johannes Thumshirn75cc8cf2016-11-17 10:31:19 +01003262 struct bsg_job *bsg_job;
Johannes Thumshirn01e0e152016-11-17 10:31:12 +01003263 struct fc_bsg_request *bsg_request;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04003264 struct fxdisc_entry_fx00 fx_iocb;
3265 uint8_t entry_cnt = 1;
3266
3267 memset(&fx_iocb, 0, sizeof(struct fxdisc_entry_fx00));
3268 fx_iocb.entry_type = FX00_IOCB_TYPE;
3269 fx_iocb.handle = cpu_to_le32(sp->handle);
3270 fx_iocb.entry_count = entry_cnt;
3271
3272 if (sp->type == SRB_FXIOCB_DCMD) {
3273 fx_iocb.func_num =
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04003274 sp->u.iocb_cmd.u.fxiocb.req_func_type;
3275 fx_iocb.adapid = fxio->u.fxiocb.adapter_id;
3276 fx_iocb.adapid_hi = fxio->u.fxiocb.adapter_id_hi;
3277 fx_iocb.reserved_0 = fxio->u.fxiocb.reserved_0;
3278 fx_iocb.reserved_1 = fxio->u.fxiocb.reserved_1;
3279 fx_iocb.dataword_extra = fxio->u.fxiocb.req_data_extra;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04003280
3281 if (fxio->u.fxiocb.flags & SRB_FXDISC_REQ_DMA_VALID) {
3282 fx_iocb.req_dsdcnt = cpu_to_le16(1);
3283 fx_iocb.req_xfrcnt =
3284 cpu_to_le16(fxio->u.fxiocb.req_len);
3285 fx_iocb.dseg_rq_address[0] =
3286 cpu_to_le32(LSD(fxio->u.fxiocb.req_dma_handle));
3287 fx_iocb.dseg_rq_address[1] =
3288 cpu_to_le32(MSD(fxio->u.fxiocb.req_dma_handle));
3289 fx_iocb.dseg_rq_len =
3290 cpu_to_le32(fxio->u.fxiocb.req_len);
3291 }
3292
3293 if (fxio->u.fxiocb.flags & SRB_FXDISC_RESP_DMA_VALID) {
3294 fx_iocb.rsp_dsdcnt = cpu_to_le16(1);
3295 fx_iocb.rsp_xfrcnt =
3296 cpu_to_le16(fxio->u.fxiocb.rsp_len);
3297 fx_iocb.dseg_rsp_address[0] =
3298 cpu_to_le32(LSD(fxio->u.fxiocb.rsp_dma_handle));
3299 fx_iocb.dseg_rsp_address[1] =
3300 cpu_to_le32(MSD(fxio->u.fxiocb.rsp_dma_handle));
3301 fx_iocb.dseg_rsp_len =
3302 cpu_to_le32(fxio->u.fxiocb.rsp_len);
3303 }
3304
3305 if (fxio->u.fxiocb.flags & SRB_FXDISC_REQ_DWRD_VALID) {
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04003306 fx_iocb.dataword = fxio->u.fxiocb.req_data;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04003307 }
3308 fx_iocb.flags = fxio->u.fxiocb.flags;
3309 } else {
3310 struct scatterlist *sg;
3311 bsg_job = sp->u.bsg_job;
Johannes Thumshirn01e0e152016-11-17 10:31:12 +01003312 bsg_request = bsg_job->request;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04003313 piocb_rqst = (struct qla_mt_iocb_rqst_fx00 *)
Johannes Thumshirn01e0e152016-11-17 10:31:12 +01003314 &bsg_request->rqst_data.h_vendor.vendor_cmd[1];
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04003315
3316 fx_iocb.func_num = piocb_rqst->func_type;
3317 fx_iocb.adapid = piocb_rqst->adapid;
3318 fx_iocb.adapid_hi = piocb_rqst->adapid_hi;
3319 fx_iocb.reserved_0 = piocb_rqst->reserved_0;
3320 fx_iocb.reserved_1 = piocb_rqst->reserved_1;
3321 fx_iocb.dataword_extra = piocb_rqst->dataword_extra;
3322 fx_iocb.dataword = piocb_rqst->dataword;
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04003323 fx_iocb.req_xfrcnt = piocb_rqst->req_len;
3324 fx_iocb.rsp_xfrcnt = piocb_rqst->rsp_len;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04003325
3326 if (piocb_rqst->flags & SRB_FXDISC_REQ_DMA_VALID) {
3327 int avail_dsds, tot_dsds;
3328 cont_a64_entry_t lcont_pkt;
3329 cont_a64_entry_t *cont_pkt = NULL;
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04003330 __le32 *cur_dsd;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04003331 int index = 0, cont = 0;
3332
3333 fx_iocb.req_dsdcnt =
3334 cpu_to_le16(bsg_job->request_payload.sg_cnt);
3335 tot_dsds =
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04003336 bsg_job->request_payload.sg_cnt;
3337 cur_dsd = (__le32 *)&fx_iocb.dseg_rq_address[0];
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04003338 avail_dsds = 1;
3339 for_each_sg(bsg_job->request_payload.sg_list, sg,
3340 tot_dsds, index) {
3341 dma_addr_t sle_dma;
3342
3343 /* Allocate additional continuation packets? */
3344 if (avail_dsds == 0) {
3345 /*
3346 * Five DSDs are available in the Cont.
3347 * Type 1 IOCB.
3348 */
3349 memset(&lcont_pkt, 0,
3350 REQUEST_ENTRY_SIZE);
3351 cont_pkt =
3352 qlafx00_prep_cont_type1_iocb(
Joe Carnuccio25ff6af2017-01-19 22:28:04 -08003353 sp->vha->req, &lcont_pkt);
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04003354 cur_dsd = (__le32 *)
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04003355 lcont_pkt.dseg_0_address;
3356 avail_dsds = 5;
3357 cont = 1;
3358 entry_cnt++;
3359 }
3360
3361 sle_dma = sg_dma_address(sg);
3362 *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
3363 *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
3364 *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
3365 avail_dsds--;
3366
3367 if (avail_dsds == 0 && cont == 1) {
3368 cont = 0;
3369 memcpy_toio(
3370 (void __iomem *)cont_pkt,
3371 &lcont_pkt, REQUEST_ENTRY_SIZE);
3372 ql_dump_buffer(
3373 ql_dbg_user + ql_dbg_verbose,
Joe Carnuccio25ff6af2017-01-19 22:28:04 -08003374 sp->vha, 0x3042,
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04003375 (uint8_t *)&lcont_pkt,
3376 REQUEST_ENTRY_SIZE);
3377 }
3378 }
3379 if (avail_dsds != 0 && cont == 1) {
3380 memcpy_toio((void __iomem *)cont_pkt,
3381 &lcont_pkt, REQUEST_ENTRY_SIZE);
3382 ql_dump_buffer(ql_dbg_user + ql_dbg_verbose,
Joe Carnuccio25ff6af2017-01-19 22:28:04 -08003383 sp->vha, 0x3043,
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04003384 (uint8_t *)&lcont_pkt, REQUEST_ENTRY_SIZE);
3385 }
3386 }
3387
3388 if (piocb_rqst->flags & SRB_FXDISC_RESP_DMA_VALID) {
3389 int avail_dsds, tot_dsds;
3390 cont_a64_entry_t lcont_pkt;
3391 cont_a64_entry_t *cont_pkt = NULL;
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04003392 __le32 *cur_dsd;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04003393 int index = 0, cont = 0;
3394
3395 fx_iocb.rsp_dsdcnt =
3396 cpu_to_le16(bsg_job->reply_payload.sg_cnt);
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04003397 tot_dsds = bsg_job->reply_payload.sg_cnt;
3398 cur_dsd = (__le32 *)&fx_iocb.dseg_rsp_address[0];
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04003399 avail_dsds = 1;
3400
3401 for_each_sg(bsg_job->reply_payload.sg_list, sg,
3402 tot_dsds, index) {
3403 dma_addr_t sle_dma;
3404
3405 /* Allocate additional continuation packets? */
3406 if (avail_dsds == 0) {
3407 /*
3408 * Five DSDs are available in the Cont.
3409 * Type 1 IOCB.
3410 */
3411 memset(&lcont_pkt, 0,
3412 REQUEST_ENTRY_SIZE);
3413 cont_pkt =
3414 qlafx00_prep_cont_type1_iocb(
Joe Carnuccio25ff6af2017-01-19 22:28:04 -08003415 sp->vha->req, &lcont_pkt);
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04003416 cur_dsd = (__le32 *)
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04003417 lcont_pkt.dseg_0_address;
3418 avail_dsds = 5;
3419 cont = 1;
3420 entry_cnt++;
3421 }
3422
3423 sle_dma = sg_dma_address(sg);
3424 *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
3425 *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
3426 *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
3427 avail_dsds--;
3428
3429 if (avail_dsds == 0 && cont == 1) {
3430 cont = 0;
3431 memcpy_toio((void __iomem *)cont_pkt,
3432 &lcont_pkt,
3433 REQUEST_ENTRY_SIZE);
3434 ql_dump_buffer(
3435 ql_dbg_user + ql_dbg_verbose,
Joe Carnuccio25ff6af2017-01-19 22:28:04 -08003436 sp->vha, 0x3045,
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04003437 (uint8_t *)&lcont_pkt,
3438 REQUEST_ENTRY_SIZE);
3439 }
3440 }
3441 if (avail_dsds != 0 && cont == 1) {
3442 memcpy_toio((void __iomem *)cont_pkt,
3443 &lcont_pkt, REQUEST_ENTRY_SIZE);
3444 ql_dump_buffer(ql_dbg_user + ql_dbg_verbose,
Joe Carnuccio25ff6af2017-01-19 22:28:04 -08003445 sp->vha, 0x3046,
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04003446 (uint8_t *)&lcont_pkt, REQUEST_ENTRY_SIZE);
3447 }
3448 }
3449
3450 if (piocb_rqst->flags & SRB_FXDISC_REQ_DWRD_VALID)
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04003451 fx_iocb.dataword = piocb_rqst->dataword;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04003452 fx_iocb.flags = piocb_rqst->flags;
3453 fx_iocb.entry_count = entry_cnt;
3454 }
3455
3456 ql_dump_buffer(ql_dbg_user + ql_dbg_verbose,
Joe Carnucciof8f97b02019-03-12 11:08:16 -07003457 sp->vha, 0x3047, &fx_iocb, sizeof(fx_iocb));
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04003458
Joe Carnucciof8f97b02019-03-12 11:08:16 -07003459 memcpy_toio((void __iomem *)pfxiocb, &fx_iocb, sizeof(fx_iocb));
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04003460 wmb();
3461}