Caesar Wang | 434242c | 2016-03-14 16:01:52 +0800 | [diff] [blame] | 1 | * ARC EMAC 10/100 Ethernet platform driver for Rockchip RK3036/RK3066/RK3188 SoCs |
Romain Perier | 40404e0 | 2014-09-08 17:14:48 +0000 | [diff] [blame] | 2 | |
| 3 | Required properties: |
Caesar Wang | 434242c | 2016-03-14 16:01:52 +0800 | [diff] [blame] | 4 | - compatible: should be "rockchip,<name>-emac" |
| 5 | "rockchip,rk3036-emac": found on RK3036 SoCs |
| 6 | "rockchip,rk3066-emac": found on RK3066 SoCs |
| 7 | "rockchip,rk3188-emac": found on RK3188 SoCs |
Romain Perier | 40404e0 | 2014-09-08 17:14:48 +0000 | [diff] [blame] | 8 | - reg: Address and length of the register set for the device |
| 9 | - interrupts: Should contain the EMAC interrupts |
| 10 | - rockchip,grf: phandle to the syscon grf used to control speed and mode |
| 11 | for emac. |
| 12 | - phy: see ethernet.txt file in the same directory. |
| 13 | - phy-mode: see ethernet.txt file in the same directory. |
| 14 | |
| 15 | Optional properties: |
| 16 | - phy-supply: phandle to a regulator if the PHY needs one |
| 17 | |
| 18 | Clock handling: |
| 19 | - clocks: Must contain an entry for each entry in clock-names. |
| 20 | - clock-names: Shall be "hclk" for the host clock needed to calculate and set |
| 21 | polling period of EMAC and "macref" for the reference clock needed to transfer |
| 22 | data to and from the phy. |
| 23 | |
| 24 | Child nodes of the driver are the individual PHY devices connected to the |
| 25 | MDIO bus. They must have a "reg" property given the PHY address on the MDIO bus. |
| 26 | |
| 27 | Examples: |
| 28 | |
| 29 | ethernet@10204000 { |
| 30 | compatible = "rockchip,rk3188-emac"; |
| 31 | reg = <0xc0fc2000 0x3c>; |
| 32 | interrupts = <6>; |
| 33 | mac-address = [ 00 11 22 33 44 55 ]; |
| 34 | |
| 35 | clocks = <&cru HCLK_EMAC>, <&cru SCLK_MAC>; |
| 36 | clock-names = "hclk", "macref"; |
| 37 | |
| 38 | pinctrl-names = "default"; |
| 39 | pinctrl-0 = <&emac_xfer>, <&emac_mdio>, <&phy_int>; |
| 40 | |
| 41 | rockchip,grf = <&grf>; |
| 42 | |
| 43 | phy = <&phy0>; |
| 44 | phy-mode = "rmii"; |
| 45 | phy-supply = <&vcc_rmii>; |
| 46 | |
| 47 | #address-cells = <1>; |
| 48 | #size-cells = <0>; |
| 49 | phy0: ethernet-phy@0 { |
| 50 | reg = <1>; |
| 51 | }; |
| 52 | }; |