Sascha Hauer | 6c7b06850 | 2012-03-07 21:01:28 +0100 | [diff] [blame] | 1 | #ifndef __MACH_IMX_CLK_H |
| 2 | #define __MACH_IMX_CLK_H |
| 3 | |
| 4 | #include <linux/spinlock.h> |
| 5 | #include <linux/clk-provider.h> |
Sascha Hauer | 3a84d17 | 2012-09-11 08:50:00 +0200 | [diff] [blame^] | 6 | |
| 7 | extern spinlock_t imx_ccm_lock; |
Sascha Hauer | 6c7b06850 | 2012-03-07 21:01:28 +0100 | [diff] [blame] | 8 | |
Sascha Hauer | 2af9e6d | 2012-03-09 09:11:55 +0100 | [diff] [blame] | 9 | struct clk *imx_clk_pllv1(const char *name, const char *parent, |
Sascha Hauer | 6c7b06850 | 2012-03-07 21:01:28 +0100 | [diff] [blame] | 10 | void __iomem *base); |
| 11 | |
Sascha Hauer | a547b81 | 2012-03-19 12:36:10 +0100 | [diff] [blame] | 12 | struct clk *imx_clk_pllv2(const char *name, const char *parent, |
| 13 | void __iomem *base); |
| 14 | |
Shawn Guo | a3f6b9d | 2012-04-04 16:02:28 +0800 | [diff] [blame] | 15 | enum imx_pllv3_type { |
| 16 | IMX_PLLV3_GENERIC, |
| 17 | IMX_PLLV3_SYS, |
| 18 | IMX_PLLV3_USB, |
| 19 | IMX_PLLV3_AV, |
| 20 | IMX_PLLV3_ENET, |
| 21 | IMX_PLLV3_MLB, |
| 22 | }; |
| 23 | |
| 24 | struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name, |
| 25 | const char *parent_name, void __iomem *base, u32 gate_mask, |
| 26 | u32 div_mask); |
| 27 | |
Sascha Hauer | b75c015 | 2011-04-19 08:33:45 +0200 | [diff] [blame] | 28 | struct clk *clk_register_gate2(struct device *dev, const char *name, |
| 29 | const char *parent_name, unsigned long flags, |
| 30 | void __iomem *reg, u8 bit_idx, |
| 31 | u8 clk_gate_flags, spinlock_t *lock); |
| 32 | |
| 33 | static inline struct clk *imx_clk_gate2(const char *name, const char *parent, |
| 34 | void __iomem *reg, u8 shift) |
| 35 | { |
| 36 | return clk_register_gate2(NULL, name, parent, CLK_SET_RATE_PARENT, reg, |
| 37 | shift, 0, &imx_ccm_lock); |
| 38 | } |
| 39 | |
Shawn Guo | a10bd67 | 2012-04-04 16:07:53 +0800 | [diff] [blame] | 40 | struct clk *imx_clk_pfd(const char *name, const char *parent_name, |
| 41 | void __iomem *reg, u8 idx); |
| 42 | |
Shawn Guo | 32af7a8 | 2012-04-04 16:20:56 +0800 | [diff] [blame] | 43 | struct clk *imx_clk_busy_divider(const char *name, const char *parent_name, |
| 44 | void __iomem *reg, u8 shift, u8 width, |
| 45 | void __iomem *busy_reg, u8 busy_shift); |
| 46 | |
| 47 | struct clk *imx_clk_busy_mux(const char *name, void __iomem *reg, u8 shift, |
| 48 | u8 width, void __iomem *busy_reg, u8 busy_shift, |
| 49 | const char **parent_names, int num_parents); |
| 50 | |
Sascha Hauer | 6c7b06850 | 2012-03-07 21:01:28 +0100 | [diff] [blame] | 51 | static inline struct clk *imx_clk_fixed(const char *name, int rate) |
| 52 | { |
| 53 | return clk_register_fixed_rate(NULL, name, NULL, CLK_IS_ROOT, rate); |
| 54 | } |
| 55 | |
| 56 | static inline struct clk *imx_clk_divider(const char *name, const char *parent, |
| 57 | void __iomem *reg, u8 shift, u8 width) |
| 58 | { |
| 59 | return clk_register_divider(NULL, name, parent, CLK_SET_RATE_PARENT, |
| 60 | reg, shift, width, 0, &imx_ccm_lock); |
| 61 | } |
| 62 | |
| 63 | static inline struct clk *imx_clk_gate(const char *name, const char *parent, |
| 64 | void __iomem *reg, u8 shift) |
| 65 | { |
| 66 | return clk_register_gate(NULL, name, parent, CLK_SET_RATE_PARENT, reg, |
| 67 | shift, 0, &imx_ccm_lock); |
| 68 | } |
| 69 | |
| 70 | static inline struct clk *imx_clk_mux(const char *name, void __iomem *reg, |
| 71 | u8 shift, u8 width, const char **parents, int num_parents) |
| 72 | { |
| 73 | return clk_register_mux(NULL, name, parents, num_parents, 0, reg, shift, |
| 74 | width, 0, &imx_ccm_lock); |
| 75 | } |
| 76 | |
| 77 | static inline struct clk *imx_clk_fixed_factor(const char *name, |
| 78 | const char *parent, unsigned int mult, unsigned int div) |
| 79 | { |
| 80 | return clk_register_fixed_factor(NULL, name, parent, |
| 81 | CLK_SET_RATE_PARENT, mult, div); |
| 82 | } |
| 83 | |
| 84 | #endif |