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Santosh Shilimkard5e9fe82013-06-10 11:33:31 -04001/*
2 * Copyright 2013 Texas Instruments, Inc.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
Santosh Shilimkareb788f42013-08-05 13:13:07 -04009#include <dt-bindings/interrupt-controller/arm-gic.h>
Grygorii Strashko970c2252014-02-10 18:41:18 +020010#include <dt-bindings/gpio/gpio.h>
Santosh Shilimkareb788f42013-08-05 13:13:07 -040011
Santosh Shilimkar226d1c52013-08-05 13:17:15 -040012#include "skeleton.dtsi"
Santosh Shilimkard5e9fe82013-06-10 11:33:31 -040013
14/ {
15 model = "Texas Instruments Keystone 2 SoC";
Santosh Shilimkard5e9fe82013-06-10 11:33:31 -040016 #address-cells = <2>;
17 #size-cells = <2>;
18 interrupt-parent = <&gic>;
19
20 aliases {
21 serial0 = &uart0;
22 };
23
24 memory {
25 reg = <0x00000000 0x80000000 0x00000000 0x40000000>;
26 };
27
Santosh Shilimkard5e9fe82013-06-10 11:33:31 -040028 gic: interrupt-controller {
29 compatible = "arm,cortex-a15-gic";
30 #interrupt-cells = <3>;
Santosh Shilimkard5e9fe82013-06-10 11:33:31 -040031 interrupt-controller;
32 reg = <0x0 0x02561000 0x0 0x1000>,
Santosh Shilimkara18b4aa2013-11-09 14:33:13 -050033 <0x0 0x02562000 0x0 0x2000>,
34 <0x0 0x02564000 0x0 0x1000>,
35 <0x0 0x02566000 0x0 0x2000>;
Santosh Shilimkar0ee15442013-11-09 14:36:00 -050036 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
37 IRQ_TYPE_LEVEL_HIGH)>;
Santosh Shilimkard5e9fe82013-06-10 11:33:31 -040038 };
39
40 timer {
41 compatible = "arm,armv7-timer";
Santosh Shilimkareb788f42013-08-05 13:13:07 -040042 interrupts =
43 <GIC_PPI 13
44 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
45 <GIC_PPI 14
46 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
47 <GIC_PPI 11
48 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
49 <GIC_PPI 10
50 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
Santosh Shilimkard5e9fe82013-06-10 11:33:31 -040051 };
52
53 pmu {
54 compatible = "arm,cortex-a15-pmu";
Santosh Shilimkareb788f42013-08-05 13:13:07 -040055 interrupts = <GIC_SPI 20 IRQ_TYPE_EDGE_RISING>,
56 <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>,
57 <GIC_SPI 22 IRQ_TYPE_EDGE_RISING>,
58 <GIC_SPI 23 IRQ_TYPE_EDGE_RISING>;
Santosh Shilimkard5e9fe82013-06-10 11:33:31 -040059 };
60
61 soc {
62 #address-cells = <1>;
63 #size-cells = <1>;
64 compatible = "ti,keystone","simple-bus";
65 interrupt-parent = <&gic>;
66 ranges = <0x0 0x0 0x0 0xc0000000>;
67
68 rstctrl: reset-controller {
69 compatible = "ti,keystone-reset";
70 reg = <0x023100e8 4>; /* pll reset control reg */
71 };
72
Santosh Shilimkarfeeea8f2013-07-09 12:51:51 -040073 /include/ "keystone-clocks.dtsi"
74
Santosh Shilimkard5e9fe82013-06-10 11:33:31 -040075 uart0: serial@02530c00 {
76 compatible = "ns16550a";
77 current-speed = <115200>;
78 reg-shift = <2>;
79 reg-io-width = <4>;
80 reg = <0x02530c00 0x100>;
Santosh Shilimkarf023bd12013-07-19 19:11:39 -040081 clocks = <&clkuart0>;
Santosh Shilimkareb788f42013-08-05 13:13:07 -040082 interrupts = <GIC_SPI 277 IRQ_TYPE_EDGE_RISING>;
Santosh Shilimkard5e9fe82013-06-10 11:33:31 -040083 };
84
85 uart1: serial@02531000 {
86 compatible = "ns16550a";
87 current-speed = <115200>;
88 reg-shift = <2>;
89 reg-io-width = <4>;
90 reg = <0x02531000 0x100>;
Santosh Shilimkarf023bd12013-07-19 19:11:39 -040091 clocks = <&clkuart1>;
Santosh Shilimkareb788f42013-08-05 13:13:07 -040092 interrupts = <GIC_SPI 280 IRQ_TYPE_EDGE_RISING>;
Santosh Shilimkard5e9fe82013-06-10 11:33:31 -040093 };
94
Santosh Shilimkar6120ac22013-07-23 20:07:07 -040095 i2c0: i2c@2530000 {
96 compatible = "ti,davinci-i2c";
97 reg = <0x02530000 0x400>;
98 clock-frequency = <100000>;
99 clocks = <&clki2c>;
100 interrupts = <GIC_SPI 283 IRQ_TYPE_EDGE_RISING>;
101 #address-cells = <1>;
102 #size-cells = <0>;
103
104 dtt@50 {
105 compatible = "at,24c1024";
106 reg = <0x50>;
107 };
108 };
109
110 i2c1: i2c@2530400 {
111 compatible = "ti,davinci-i2c";
112 reg = <0x02530400 0x400>;
113 clock-frequency = <100000>;
114 clocks = <&clki2c>;
115 interrupts = <GIC_SPI 286 IRQ_TYPE_EDGE_RISING>;
Grygorii Strashko39535052014-04-08 14:46:06 +0300116 #address-cells = <1>;
117 #size-cells = <0>;
Santosh Shilimkar6120ac22013-07-23 20:07:07 -0400118 };
119
120 i2c2: i2c@2530800 {
121 compatible = "ti,davinci-i2c";
122 reg = <0x02530800 0x400>;
123 clock-frequency = <100000>;
124 clocks = <&clki2c>;
125 interrupts = <GIC_SPI 289 IRQ_TYPE_EDGE_RISING>;
Grygorii Strashko39535052014-04-08 14:46:06 +0300126 #address-cells = <1>;
127 #size-cells = <0>;
Santosh Shilimkar6120ac22013-07-23 20:07:07 -0400128 };
Santosh Shilimkarb3bd6c52013-07-23 20:25:23 -0400129
130 spi0: spi@21000400 {
131 compatible = "ti,dm6441-spi";
132 reg = <0x21000400 0x200>;
133 num-cs = <4>;
134 ti,davinci-spi-intr-line = <0>;
135 interrupts = <GIC_SPI 292 IRQ_TYPE_EDGE_RISING>;
136 clocks = <&clkspi>;
137 };
138
139 spi1: spi@21000600 {
140 compatible = "ti,dm6441-spi";
141 reg = <0x21000600 0x200>;
142 num-cs = <4>;
143 ti,davinci-spi-intr-line = <0>;
144 interrupts = <GIC_SPI 296 IRQ_TYPE_EDGE_RISING>;
145 clocks = <&clkspi>;
146 };
147
148 spi2: spi@21000800 {
149 compatible = "ti,dm6441-spi";
150 reg = <0x21000800 0x200>;
151 num-cs = <4>;
152 ti,davinci-spi-intr-line = <0>;
153 interrupts = <GIC_SPI 300 IRQ_TYPE_EDGE_RISING>;
154 clocks = <&clkspi>;
155 };
WingMan Kwok08c36762013-12-09 14:43:23 -0500156
157 usb_phy: usb_phy@2620738 {
158 compatible = "ti,keystone-usbphy";
159 #address-cells = <1>;
160 #size-cells = <1>;
161 reg = <0x2620738 32>;
162 status = "disabled";
163 };
WingMan Kwok73207952013-12-09 17:25:12 -0500164
165 usb: usb@2680000 {
166 compatible = "ti,keystone-dwc3";
167 #address-cells = <1>;
168 #size-cells = <1>;
169 reg = <0x2680000 0x10000>;
170 clocks = <&clkusb>;
171 clock-names = "usb";
172 interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>;
173 ranges;
174 status = "disabled";
175
176 dwc3@2690000 {
177 compatible = "synopsys,dwc3";
178 reg = <0x2690000 0x70000>;
179 interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>;
180 usb-phy = <&usb_phy>, <&usb_phy>;
181 };
182 };
Ivan Khoronzhuk20d89312013-10-16 23:15:32 +0300183
184 wdt: wdt@022f0080 {
185 compatible = "ti,keystone-wdt","ti,davinci-wdt";
186 reg = <0x022f0080 0x80>;
187 clocks = <&clkwdtimer0>;
188 };
Ivan Khoronzhuk2b4f76b2013-11-28 21:23:56 +0200189
190 clock_event: timer@22f0000 {
191 compatible = "ti,keystone-timer";
192 reg = <0x022f0000 0x80>;
193 interrupts = <GIC_SPI 110 IRQ_TYPE_EDGE_RISING>;
194 clocks = <&clktimer15>;
195 };
Grygorii Strashko970c2252014-02-10 18:41:18 +0200196
197 gpio0: gpio@260bf00 {
198 compatible = "ti,keystone-gpio";
199 reg = <0x0260bf00 0x100>;
200 gpio-controller;
201 #gpio-cells = <2>;
202 /* HW Interrupts mapped to GPIO pins */
203 interrupts = <GIC_SPI 120 IRQ_TYPE_EDGE_RISING>,
204 <GIC_SPI 121 IRQ_TYPE_EDGE_RISING>,
205 <GIC_SPI 122 IRQ_TYPE_EDGE_RISING>,
206 <GIC_SPI 123 IRQ_TYPE_EDGE_RISING>,
207 <GIC_SPI 124 IRQ_TYPE_EDGE_RISING>,
208 <GIC_SPI 125 IRQ_TYPE_EDGE_RISING>,
209 <GIC_SPI 126 IRQ_TYPE_EDGE_RISING>,
210 <GIC_SPI 127 IRQ_TYPE_EDGE_RISING>,
211 <GIC_SPI 128 IRQ_TYPE_EDGE_RISING>,
212 <GIC_SPI 129 IRQ_TYPE_EDGE_RISING>,
213 <GIC_SPI 130 IRQ_TYPE_EDGE_RISING>,
214 <GIC_SPI 131 IRQ_TYPE_EDGE_RISING>,
215 <GIC_SPI 132 IRQ_TYPE_EDGE_RISING>,
216 <GIC_SPI 133 IRQ_TYPE_EDGE_RISING>,
217 <GIC_SPI 134 IRQ_TYPE_EDGE_RISING>,
218 <GIC_SPI 135 IRQ_TYPE_EDGE_RISING>,
219 <GIC_SPI 136 IRQ_TYPE_EDGE_RISING>,
220 <GIC_SPI 137 IRQ_TYPE_EDGE_RISING>,
221 <GIC_SPI 138 IRQ_TYPE_EDGE_RISING>,
222 <GIC_SPI 139 IRQ_TYPE_EDGE_RISING>,
223 <GIC_SPI 140 IRQ_TYPE_EDGE_RISING>,
224 <GIC_SPI 141 IRQ_TYPE_EDGE_RISING>,
225 <GIC_SPI 142 IRQ_TYPE_EDGE_RISING>,
226 <GIC_SPI 143 IRQ_TYPE_EDGE_RISING>,
227 <GIC_SPI 144 IRQ_TYPE_EDGE_RISING>,
228 <GIC_SPI 145 IRQ_TYPE_EDGE_RISING>,
229 <GIC_SPI 146 IRQ_TYPE_EDGE_RISING>,
230 <GIC_SPI 147 IRQ_TYPE_EDGE_RISING>,
231 <GIC_SPI 148 IRQ_TYPE_EDGE_RISING>,
232 <GIC_SPI 149 IRQ_TYPE_EDGE_RISING>,
233 <GIC_SPI 150 IRQ_TYPE_EDGE_RISING>,
234 <GIC_SPI 151 IRQ_TYPE_EDGE_RISING>;
235 clocks = <&clkgpio>;
236 clock-names = "gpio";
237 ti,ngpio = <32>;
238 ti,davinci-gpio-unbanked = <32>;
239 };
Ivan Khoronzhuk82c04f72014-02-28 21:05:24 -0500240
241 aemif: aemif@21000A00 {
242 compatible = "ti,keystone-aemif", "ti,davinci-aemif";
243 #address-cells = <2>;
244 #size-cells = <1>;
245 clocks = <&clkaemif>;
246 clock-names = "aemif";
247 clock-ranges;
248
249 reg = <0x21000A00 0x00000100>;
250 ranges = <0 0 0x30000000 0x10000000
251 1 0 0x21000A00 0x00000100>;
252 };
Santosh Shilimkard5e9fe82013-06-10 11:33:31 -0400253 };
254};