| Rafał Miłecki | 3f9f82b | 2018-09-26 21:31:02 +0200 | [diff] [blame] | 1 | Broadcom Northstar pins mux controller |
| 2 | |
| 3 | Some of Northstar SoCs's pins can be used for various purposes thanks to the mux |
| 4 | controller. This binding allows describing mux controller and listing available |
| 5 | functions. They can be referenced later by other bindings to let system |
| 6 | configure controller correctly. |
| 7 | |
| 8 | A list of pins varies across chipsets so few bindings are available. |
| 9 | |
| 10 | Required properties: |
| 11 | - compatible: must be one of: |
| 12 | "brcm,bcm4708-pinmux" |
| 13 | "brcm,bcm4709-pinmux" |
| 14 | "brcm,bcm53012-pinmux" |
| 15 | - reg: iomem address range of CRU (Central Resource Unit) pin registers |
| 16 | - reg-names: "cru_gpio_control" - the only needed & supported reg right now |
| 17 | |
| 18 | Functions and their groups available for all chipsets: |
| 19 | - "spi": "spi_grp" |
| 20 | - "i2c": "i2c_grp" |
| 21 | - "pwm": "pwm0_grp", "pwm1_grp", "pwm2_grp", "pwm3_grp" |
| 22 | - "uart1": "uart1_grp" |
| 23 | |
| 24 | Additionally available on BCM4709 and BCM53012: |
| 25 | - "mdio": "mdio_grp" |
| 26 | - "uart2": "uart2_grp" |
| 27 | - "sdio": "sdio_pwr_grp", "sdio_1p8v_grp" |
| 28 | |
| 29 | For documentation of subnodes see: |
| 30 | Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt |
| 31 | |
| 32 | Example: |
| Rafał Miłecki | 93d3973 | 2018-10-15 11:30:13 +0200 | [diff] [blame] | 33 | dmu@1800c000 { |
| 34 | compatible = "simple-bus"; |
| 35 | ranges = <0 0x1800c000 0x1000>; |
| 36 | #address-cells = <1>; |
| 37 | #size-cells = <1>; |
| Rafał Miłecki | 3f9f82b | 2018-09-26 21:31:02 +0200 | [diff] [blame] | 38 | |
| Rafał Miłecki | 93d3973 | 2018-10-15 11:30:13 +0200 | [diff] [blame] | 39 | cru@100 { |
| 40 | compatible = "simple-bus"; |
| 41 | reg = <0x100 0x1a4>; |
| 42 | ranges; |
| 43 | #address-cells = <1>; |
| 44 | #size-cells = <1>; |
| 45 | |
| 46 | pin-controller@1c0 { |
| 47 | compatible = "brcm,bcm4708-pinmux"; |
| 48 | reg = <0x1c0 0x24>; |
| 49 | reg-names = "cru_gpio_control"; |
| 50 | |
| 51 | spi-pins { |
| 52 | function = "spi"; |
| 53 | groups = "spi_grp"; |
| 54 | }; |
| 55 | }; |
| Rafał Miłecki | 3f9f82b | 2018-09-26 21:31:02 +0200 | [diff] [blame] | 56 | }; |
| 57 | }; |