blob: d81bb0bf28850f4ea734dedabec44d8478b12d44 [file] [log] [blame]
Jesse Barnes79e53942008-11-07 14:24:08 -08001/*
2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
24 *
25 * Authors:
26 * Eric Anholt <eric@anholt.net>
27 */
28#include <linux/i2c.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090029#include <linux/slab.h>
Jesse Barnes79e53942008-11-07 14:24:08 -080030#include <linux/delay.h>
Paul Gortmaker2d1a8a42011-08-30 18:16:33 -040031#include <linux/export.h>
Jesse Barnes79e53942008-11-07 14:24:08 -080032#include "drmP.h"
33#include "drm.h"
34#include "drm_crtc.h"
ling.ma@intel.com2b8d33f72009-07-29 11:31:18 +080035#include "drm_edid.h"
Chris Wilsonea5b2132010-08-04 13:50:23 +010036#include "intel_drv.h"
Jesse Barnes79e53942008-11-07 14:24:08 -080037#include "i915_drm.h"
38#include "i915_drv.h"
39#include "intel_sdvo_regs.h"
40
Zhenyu Wang14571b42010-03-30 14:06:33 +080041#define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
42#define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
43#define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
Chris Wilsona0b1c7a2011-09-30 22:56:41 +010044#define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
Zhenyu Wang14571b42010-03-30 14:06:33 +080045
46#define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
Akshay Joshi0206e352011-08-16 15:34:10 -040047 SDVO_TV_MASK)
Zhenyu Wang14571b42010-03-30 14:06:33 +080048
49#define IS_TV(c) (c->output_flag & SDVO_TV_MASK)
Chris Wilson139467432011-02-09 20:01:16 +000050#define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK)
Zhenyu Wang14571b42010-03-30 14:06:33 +080051#define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK)
Chris Wilson32aad862010-08-04 13:50:25 +010052#define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
Chris Wilson52220082011-06-20 14:45:50 +010053#define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
Zhenyu Wang14571b42010-03-30 14:06:33 +080054
Jesse Barnes79e53942008-11-07 14:24:08 -080055
Chris Wilson2e88e402010-08-07 11:01:27 +010056static const char *tv_format_names[] = {
Zhao Yakuice6feab2009-08-24 13:50:26 +080057 "NTSC_M" , "NTSC_J" , "NTSC_443",
58 "PAL_B" , "PAL_D" , "PAL_G" ,
59 "PAL_H" , "PAL_I" , "PAL_M" ,
60 "PAL_N" , "PAL_NC" , "PAL_60" ,
61 "SECAM_B" , "SECAM_D" , "SECAM_G" ,
62 "SECAM_K" , "SECAM_K1", "SECAM_L" ,
63 "SECAM_60"
64};
65
66#define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names))
67
Chris Wilsonea5b2132010-08-04 13:50:23 +010068struct intel_sdvo {
69 struct intel_encoder base;
70
Chris Wilsonf899fc62010-07-20 15:44:45 -070071 struct i2c_adapter *i2c;
Keith Packardf9c10a92009-05-30 12:16:25 -070072 u8 slave_addr;
Jesse Barnese2f0ba92009-02-02 15:11:52 -080073
Chris Wilsone957d772010-09-24 12:52:03 +010074 struct i2c_adapter ddc;
75
Jesse Barnese2f0ba92009-02-02 15:11:52 -080076 /* Register for the SDVO device: SDVOB or SDVOC */
Daniel Vettereef4eac2012-03-23 23:43:35 +010077 uint32_t sdvo_reg;
Jesse Barnes79e53942008-11-07 14:24:08 -080078
Jesse Barnese2f0ba92009-02-02 15:11:52 -080079 /* Active outputs controlled by this SDVO output */
80 uint16_t controlled_output;
Jesse Barnes79e53942008-11-07 14:24:08 -080081
Jesse Barnese2f0ba92009-02-02 15:11:52 -080082 /*
83 * Capabilities of the SDVO device returned by
84 * i830_sdvo_get_capabilities()
85 */
Jesse Barnes79e53942008-11-07 14:24:08 -080086 struct intel_sdvo_caps caps;
Jesse Barnese2f0ba92009-02-02 15:11:52 -080087
88 /* Pixel clock limitations reported by the SDVO device, in kHz */
Jesse Barnes79e53942008-11-07 14:24:08 -080089 int pixel_clock_min, pixel_clock_max;
90
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +080091 /*
92 * For multiple function SDVO device,
93 * this is for current attached outputs.
94 */
95 uint16_t attached_output;
96
Simon Farnsworthcc68c812011-09-21 17:13:30 +010097 /*
98 * Hotplug activation bits for this device
99 */
100 uint8_t hotplug_active[2];
101
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800102 /**
Chris Wilsone953fd72011-02-21 22:23:52 +0000103 * This is used to select the color range of RBG outputs in HDMI mode.
104 * It is only valid when using TMDS encoding and 8 bit per color mode.
105 */
106 uint32_t color_range;
107
108 /**
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800109 * This is set if we're going to treat the device as TV-out.
110 *
111 * While we have these nice friendly flags for output types that ought
112 * to decide this for us, the S-Video output on our HDMI+S-Video card
113 * shows up as RGB1 (VGA).
114 */
115 bool is_tv;
116
Daniel Vettereef4eac2012-03-23 23:43:35 +0100117 /* On different gens SDVOB is at different places. */
118 bool is_sdvob;
119
Zhao Yakuice6feab2009-08-24 13:50:26 +0800120 /* This is for current tv format name */
Chris Wilson40039752010-08-04 13:50:26 +0100121 int tv_format_index;
Zhao Yakuice6feab2009-08-24 13:50:26 +0800122
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800123 /**
124 * This is set if we treat the device as HDMI, instead of DVI.
125 */
126 bool is_hdmi;
Chris Wilsonda79de92010-11-22 11:12:46 +0000127 bool has_hdmi_monitor;
128 bool has_hdmi_audio;
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800129
Ma Ling7086c872009-05-13 11:20:06 +0800130 /**
Chris Wilson6c9547f2010-08-25 10:05:17 +0100131 * This is set if we detect output of sdvo device as LVDS and
132 * have a valid fixed mode to use with the panel.
Ma Ling7086c872009-05-13 11:20:06 +0800133 */
134 bool is_lvds;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800135
136 /**
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800137 * This is sdvo fixed pannel mode pointer
138 */
139 struct drm_display_mode *sdvo_lvds_fixed_mode;
140
Eric Anholtc751ce42010-03-25 11:48:48 -0700141 /* DDC bus used by this SDVO encoder */
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800142 uint8_t ddc_bus;
Zhenyu Wang14571b42010-03-30 14:06:33 +0800143};
144
145struct intel_sdvo_connector {
Chris Wilson615fb932010-08-04 13:50:24 +0100146 struct intel_connector base;
147
Zhenyu Wang14571b42010-03-30 14:06:33 +0800148 /* Mark the type of connector */
149 uint16_t output_flag;
150
Daniel Vetterc3e5f672012-02-23 17:14:47 +0100151 enum hdmi_force_audio force_audio;
Chris Wilson7f36e7e2010-09-19 09:29:33 +0100152
Zhenyu Wang14571b42010-03-30 14:06:33 +0800153 /* This contains all current supported TV format */
Chris Wilson40039752010-08-04 13:50:26 +0100154 u8 tv_format_supported[TV_FORMAT_NUM];
Zhenyu Wang14571b42010-03-30 14:06:33 +0800155 int format_supported_num;
Chris Wilsonc5521702010-08-04 13:50:28 +0100156 struct drm_property *tv_format;
Zhenyu Wang14571b42010-03-30 14:06:33 +0800157
Zhao Yakuib9219c52009-09-10 15:45:46 +0800158 /* add the property for the SDVO-TV */
Chris Wilsonc5521702010-08-04 13:50:28 +0100159 struct drm_property *left;
160 struct drm_property *right;
161 struct drm_property *top;
162 struct drm_property *bottom;
163 struct drm_property *hpos;
164 struct drm_property *vpos;
165 struct drm_property *contrast;
166 struct drm_property *saturation;
167 struct drm_property *hue;
168 struct drm_property *sharpness;
169 struct drm_property *flicker_filter;
170 struct drm_property *flicker_filter_adaptive;
171 struct drm_property *flicker_filter_2d;
172 struct drm_property *tv_chroma_filter;
173 struct drm_property *tv_luma_filter;
Chris Wilsone0442182010-08-04 13:50:29 +0100174 struct drm_property *dot_crawl;
Zhao Yakuib9219c52009-09-10 15:45:46 +0800175
176 /* add the property for the SDVO-TV/LVDS */
Chris Wilsonc5521702010-08-04 13:50:28 +0100177 struct drm_property *brightness;
Zhao Yakuib9219c52009-09-10 15:45:46 +0800178
179 /* Add variable to record current setting for the above property */
180 u32 left_margin, right_margin, top_margin, bottom_margin;
Chris Wilsonc5521702010-08-04 13:50:28 +0100181
Zhao Yakuib9219c52009-09-10 15:45:46 +0800182 /* this is to get the range of margin.*/
183 u32 max_hscan, max_vscan;
184 u32 max_hpos, cur_hpos;
185 u32 max_vpos, cur_vpos;
186 u32 cur_brightness, max_brightness;
187 u32 cur_contrast, max_contrast;
188 u32 cur_saturation, max_saturation;
189 u32 cur_hue, max_hue;
Chris Wilsonc5521702010-08-04 13:50:28 +0100190 u32 cur_sharpness, max_sharpness;
191 u32 cur_flicker_filter, max_flicker_filter;
192 u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive;
193 u32 cur_flicker_filter_2d, max_flicker_filter_2d;
194 u32 cur_tv_chroma_filter, max_tv_chroma_filter;
195 u32 cur_tv_luma_filter, max_tv_luma_filter;
Chris Wilsone0442182010-08-04 13:50:29 +0100196 u32 cur_dot_crawl, max_dot_crawl;
Jesse Barnes79e53942008-11-07 14:24:08 -0800197};
198
Chris Wilson890f3352010-09-14 16:46:59 +0100199static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder)
Chris Wilsonea5b2132010-08-04 13:50:23 +0100200{
Chris Wilson4ef69c72010-09-09 15:14:28 +0100201 return container_of(encoder, struct intel_sdvo, base.base);
Chris Wilsonea5b2132010-08-04 13:50:23 +0100202}
203
Chris Wilsondf0e9242010-09-09 16:20:55 +0100204static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
205{
206 return container_of(intel_attached_encoder(connector),
207 struct intel_sdvo, base);
208}
209
Chris Wilson615fb932010-08-04 13:50:24 +0100210static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
211{
212 return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
213}
214
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +0800215static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +0100216intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
Chris Wilson32aad862010-08-04 13:50:25 +0100217static bool
218intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
219 struct intel_sdvo_connector *intel_sdvo_connector,
220 int type);
221static bool
222intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
223 struct intel_sdvo_connector *intel_sdvo_connector);
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +0800224
Jesse Barnes79e53942008-11-07 14:24:08 -0800225/**
226 * Writes the SDVOB or SDVOC with the given value, but always writes both
227 * SDVOB and SDVOC to work around apparent hardware issues (according to
228 * comments in the BIOS).
229 */
Chris Wilsonea5b2132010-08-04 13:50:23 +0100230static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
Jesse Barnes79e53942008-11-07 14:24:08 -0800231{
Chris Wilson4ef69c72010-09-09 15:14:28 +0100232 struct drm_device *dev = intel_sdvo->base.base.dev;
Jesse Barnes79e53942008-11-07 14:24:08 -0800233 struct drm_i915_private *dev_priv = dev->dev_private;
Jesse Barnes79e53942008-11-07 14:24:08 -0800234 u32 bval = val, cval = val;
235 int i;
236
Chris Wilsonea5b2132010-08-04 13:50:23 +0100237 if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
238 I915_WRITE(intel_sdvo->sdvo_reg, val);
239 I915_READ(intel_sdvo->sdvo_reg);
Zhao Yakui461ed3c2010-03-30 15:11:33 +0800240 return;
241 }
242
Chris Wilsonea5b2132010-08-04 13:50:23 +0100243 if (intel_sdvo->sdvo_reg == SDVOB) {
Jesse Barnes79e53942008-11-07 14:24:08 -0800244 cval = I915_READ(SDVOC);
245 } else {
246 bval = I915_READ(SDVOB);
247 }
248 /*
249 * Write the registers twice for luck. Sometimes,
250 * writing them only once doesn't appear to 'stick'.
251 * The BIOS does this too. Yay, magic
252 */
253 for (i = 0; i < 2; i++)
254 {
255 I915_WRITE(SDVOB, bval);
256 I915_READ(SDVOB);
257 I915_WRITE(SDVOC, cval);
258 I915_READ(SDVOC);
259 }
260}
261
Chris Wilson32aad862010-08-04 13:50:25 +0100262static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
Jesse Barnes79e53942008-11-07 14:24:08 -0800263{
Jesse Barnes79e53942008-11-07 14:24:08 -0800264 struct i2c_msg msgs[] = {
265 {
Chris Wilsone957d772010-09-24 12:52:03 +0100266 .addr = intel_sdvo->slave_addr,
Jesse Barnes79e53942008-11-07 14:24:08 -0800267 .flags = 0,
268 .len = 1,
Chris Wilsone957d772010-09-24 12:52:03 +0100269 .buf = &addr,
Jesse Barnes79e53942008-11-07 14:24:08 -0800270 },
271 {
Chris Wilsone957d772010-09-24 12:52:03 +0100272 .addr = intel_sdvo->slave_addr,
Jesse Barnes79e53942008-11-07 14:24:08 -0800273 .flags = I2C_M_RD,
274 .len = 1,
Chris Wilsone957d772010-09-24 12:52:03 +0100275 .buf = ch,
Jesse Barnes79e53942008-11-07 14:24:08 -0800276 }
277 };
Chris Wilson32aad862010-08-04 13:50:25 +0100278 int ret;
Jesse Barnes79e53942008-11-07 14:24:08 -0800279
Chris Wilsonf899fc62010-07-20 15:44:45 -0700280 if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
Jesse Barnes79e53942008-11-07 14:24:08 -0800281 return true;
Jesse Barnes79e53942008-11-07 14:24:08 -0800282
Zhao Yakui8a4c47f2009-07-20 13:48:04 +0800283 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
Jesse Barnes79e53942008-11-07 14:24:08 -0800284 return false;
285}
286
Jesse Barnes79e53942008-11-07 14:24:08 -0800287#define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
288/** Mapping of command numbers to names, for debug output */
Tobias Klauser005568b2009-02-09 22:02:42 +0100289static const struct _sdvo_cmd_name {
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800290 u8 cmd;
Chris Wilson2e88e402010-08-07 11:01:27 +0100291 const char *name;
Jesse Barnes79e53942008-11-07 14:24:08 -0800292} sdvo_cmd_names[] = {
Akshay Joshi0206e352011-08-16 15:34:10 -0400293 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
294 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
295 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
296 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
297 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
298 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
299 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
300 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
301 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
302 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
303 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
304 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
305 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
306 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
307 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
308 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
309 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
310 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
311 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
312 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
313 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
314 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
315 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
316 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
317 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
318 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
319 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
320 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
321 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
322 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
323 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
324 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
325 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
326 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
327 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
328 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
329 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
330 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
331 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
332 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
333 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
334 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
335 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
Chris Wilsonc5521702010-08-04 13:50:28 +0100336
Akshay Joshi0206e352011-08-16 15:34:10 -0400337 /* Add the op code for SDVO enhancements */
338 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
339 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
340 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
341 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
342 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
343 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
344 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
345 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
346 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
347 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
348 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
349 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
350 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
351 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
353 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
354 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
355 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
356 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
357 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
358 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
359 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
360 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
361 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
362 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
363 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
364 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
365 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
366 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
367 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
368 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
369 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
370 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
371 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
372 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
373 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
374 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
375 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
376 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
377 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
378 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
379 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
380 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
381 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
Chris Wilsonc5521702010-08-04 13:50:28 +0100382
Akshay Joshi0206e352011-08-16 15:34:10 -0400383 /* HDMI op code */
384 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
385 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
386 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
387 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
388 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
389 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
390 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
391 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
392 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
393 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
394 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
395 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
396 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
397 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
398 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
399 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
400 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
401 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
402 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
403 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
Jesse Barnes79e53942008-11-07 14:24:08 -0800404};
405
Daniel Vettereef4eac2012-03-23 23:43:35 +0100406#define SDVO_NAME(svdo) ((svdo)->is_sdvob ? "SDVOB" : "SDVOC")
Jesse Barnes79e53942008-11-07 14:24:08 -0800407
Chris Wilsonea5b2132010-08-04 13:50:23 +0100408static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
Chris Wilson32aad862010-08-04 13:50:25 +0100409 const void *args, int args_len)
Jesse Barnes79e53942008-11-07 14:24:08 -0800410{
Jesse Barnes79e53942008-11-07 14:24:08 -0800411 int i;
412
Zhao Yakui8a4c47f2009-07-20 13:48:04 +0800413 DRM_DEBUG_KMS("%s: W: %02X ",
Chris Wilsonea5b2132010-08-04 13:50:23 +0100414 SDVO_NAME(intel_sdvo), cmd);
Jesse Barnes79e53942008-11-07 14:24:08 -0800415 for (i = 0; i < args_len; i++)
yakui_zhao342dc382009-06-02 14:12:00 +0800416 DRM_LOG_KMS("%02X ", ((u8 *)args)[i]);
Jesse Barnes79e53942008-11-07 14:24:08 -0800417 for (; i < 8; i++)
yakui_zhao342dc382009-06-02 14:12:00 +0800418 DRM_LOG_KMS(" ");
Kulikov Vasiliy04ad3272010-06-28 15:54:56 +0400419 for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
Jesse Barnes79e53942008-11-07 14:24:08 -0800420 if (cmd == sdvo_cmd_names[i].cmd) {
yakui_zhao342dc382009-06-02 14:12:00 +0800421 DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name);
Jesse Barnes79e53942008-11-07 14:24:08 -0800422 break;
423 }
424 }
Kulikov Vasiliy04ad3272010-06-28 15:54:56 +0400425 if (i == ARRAY_SIZE(sdvo_cmd_names))
yakui_zhao342dc382009-06-02 14:12:00 +0800426 DRM_LOG_KMS("(%02X)", cmd);
427 DRM_LOG_KMS("\n");
Jesse Barnes79e53942008-11-07 14:24:08 -0800428}
Jesse Barnes79e53942008-11-07 14:24:08 -0800429
Jesse Barnes79e53942008-11-07 14:24:08 -0800430static const char *cmd_status_names[] = {
431 "Power on",
432 "Success",
433 "Not supported",
434 "Invalid arg",
435 "Pending",
436 "Target not specified",
437 "Scaling not supported"
438};
439
Chris Wilsone957d772010-09-24 12:52:03 +0100440static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
441 const void *args, int args_len)
442{
Ben Widawsky3bf3f452012-04-16 14:07:41 -0700443 u8 *buf, status;
444 struct i2c_msg *msgs;
445 int i, ret = true;
446
Alan Cox0274df32012-07-25 13:51:04 +0100447 /* Would be simpler to allocate both in one go ? */
Ben Widawsky3bf3f452012-04-16 14:07:41 -0700448 buf = (u8 *)kzalloc(args_len * 2 + 2, GFP_KERNEL);
449 if (!buf)
450 return false;
451
452 msgs = kcalloc(args_len + 3, sizeof(*msgs), GFP_KERNEL);
Alan Cox0274df32012-07-25 13:51:04 +0100453 if (!msgs) {
454 kfree(buf);
Ben Widawsky3bf3f452012-04-16 14:07:41 -0700455 return false;
Alan Cox0274df32012-07-25 13:51:04 +0100456 }
Chris Wilsone957d772010-09-24 12:52:03 +0100457
458 intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
459
460 for (i = 0; i < args_len; i++) {
461 msgs[i].addr = intel_sdvo->slave_addr;
462 msgs[i].flags = 0;
463 msgs[i].len = 2;
464 msgs[i].buf = buf + 2 *i;
465 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
466 buf[2*i + 1] = ((u8*)args)[i];
467 }
468 msgs[i].addr = intel_sdvo->slave_addr;
469 msgs[i].flags = 0;
470 msgs[i].len = 2;
471 msgs[i].buf = buf + 2*i;
472 buf[2*i + 0] = SDVO_I2C_OPCODE;
473 buf[2*i + 1] = cmd;
474
475 /* the following two are to read the response */
476 status = SDVO_I2C_CMD_STATUS;
477 msgs[i+1].addr = intel_sdvo->slave_addr;
478 msgs[i+1].flags = 0;
479 msgs[i+1].len = 1;
480 msgs[i+1].buf = &status;
481
482 msgs[i+2].addr = intel_sdvo->slave_addr;
483 msgs[i+2].flags = I2C_M_RD;
484 msgs[i+2].len = 1;
485 msgs[i+2].buf = &status;
486
487 ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
488 if (ret < 0) {
489 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
Ben Widawsky3bf3f452012-04-16 14:07:41 -0700490 ret = false;
491 goto out;
Chris Wilsone957d772010-09-24 12:52:03 +0100492 }
493 if (ret != i+3) {
494 /* failure in I2C transfer */
495 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
Ben Widawsky3bf3f452012-04-16 14:07:41 -0700496 ret = false;
Chris Wilsone957d772010-09-24 12:52:03 +0100497 }
498
Ben Widawsky3bf3f452012-04-16 14:07:41 -0700499out:
500 kfree(msgs);
501 kfree(buf);
502 return ret;
Chris Wilsone957d772010-09-24 12:52:03 +0100503}
504
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100505static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
506 void *response, int response_len)
Jesse Barnes79e53942008-11-07 14:24:08 -0800507{
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100508 u8 retry = 5;
509 u8 status;
Zhenyu Wang33b52962009-03-24 14:02:40 +0800510 int i;
Jesse Barnes79e53942008-11-07 14:24:08 -0800511
Chris Wilsond121a5d2011-01-25 15:00:01 +0000512 DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
513
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100514 /*
515 * The documentation states that all commands will be
516 * processed within 15µs, and that we need only poll
517 * the status byte a maximum of 3 times in order for the
518 * command to be complete.
519 *
520 * Check 5 times in case the hardware failed to read the docs.
521 */
Chris Wilsond121a5d2011-01-25 15:00:01 +0000522 if (!intel_sdvo_read_byte(intel_sdvo,
523 SDVO_I2C_CMD_STATUS,
524 &status))
525 goto log_fail;
526
527 while (status == SDVO_CMD_STATUS_PENDING && retry--) {
528 udelay(15);
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100529 if (!intel_sdvo_read_byte(intel_sdvo,
530 SDVO_I2C_CMD_STATUS,
531 &status))
Chris Wilsond121a5d2011-01-25 15:00:01 +0000532 goto log_fail;
533 }
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100534
Jesse Barnes79e53942008-11-07 14:24:08 -0800535 if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
yakui_zhao342dc382009-06-02 14:12:00 +0800536 DRM_LOG_KMS("(%s)", cmd_status_names[status]);
Jesse Barnes79e53942008-11-07 14:24:08 -0800537 else
yakui_zhao342dc382009-06-02 14:12:00 +0800538 DRM_LOG_KMS("(??? %d)", status);
Jesse Barnes79e53942008-11-07 14:24:08 -0800539
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100540 if (status != SDVO_CMD_STATUS_SUCCESS)
541 goto log_fail;
Jesse Barnes79e53942008-11-07 14:24:08 -0800542
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100543 /* Read the command response */
544 for (i = 0; i < response_len; i++) {
545 if (!intel_sdvo_read_byte(intel_sdvo,
546 SDVO_I2C_RETURN_0 + i,
547 &((u8 *)response)[i]))
548 goto log_fail;
Chris Wilsone957d772010-09-24 12:52:03 +0100549 DRM_LOG_KMS(" %02X", ((u8 *)response)[i]);
Jesse Barnes79e53942008-11-07 14:24:08 -0800550 }
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100551 DRM_LOG_KMS("\n");
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100552 return true;
553
554log_fail:
Chris Wilsond121a5d2011-01-25 15:00:01 +0000555 DRM_LOG_KMS("... failed\n");
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100556 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -0800557}
558
Hannes Ederb358d0a2008-12-18 21:18:47 +0100559static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
Jesse Barnes79e53942008-11-07 14:24:08 -0800560{
561 if (mode->clock >= 100000)
562 return 1;
563 else if (mode->clock >= 50000)
564 return 2;
565 else
566 return 4;
567}
568
Chris Wilsone957d772010-09-24 12:52:03 +0100569static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
570 u8 ddc_bus)
Jesse Barnes79e53942008-11-07 14:24:08 -0800571{
Chris Wilsond121a5d2011-01-25 15:00:01 +0000572 /* This must be the immediately preceding write before the i2c xfer */
Chris Wilsone957d772010-09-24 12:52:03 +0100573 return intel_sdvo_write_cmd(intel_sdvo,
574 SDVO_CMD_SET_CONTROL_BUS_SWITCH,
575 &ddc_bus, 1);
Jesse Barnes79e53942008-11-07 14:24:08 -0800576}
577
Chris Wilson32aad862010-08-04 13:50:25 +0100578static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
579{
Chris Wilsond121a5d2011-01-25 15:00:01 +0000580 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
581 return false;
582
583 return intel_sdvo_read_response(intel_sdvo, NULL, 0);
Chris Wilson32aad862010-08-04 13:50:25 +0100584}
585
586static bool
587intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
588{
589 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
590 return false;
591
592 return intel_sdvo_read_response(intel_sdvo, value, len);
593}
594
595static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
Jesse Barnes79e53942008-11-07 14:24:08 -0800596{
597 struct intel_sdvo_set_target_input_args targets = {0};
Chris Wilson32aad862010-08-04 13:50:25 +0100598 return intel_sdvo_set_value(intel_sdvo,
599 SDVO_CMD_SET_TARGET_INPUT,
600 &targets, sizeof(targets));
Jesse Barnes79e53942008-11-07 14:24:08 -0800601}
602
603/**
604 * Return whether each input is trained.
605 *
606 * This function is making an assumption about the layout of the response,
607 * which should be checked against the docs.
608 */
Chris Wilsonea5b2132010-08-04 13:50:23 +0100609static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
Jesse Barnes79e53942008-11-07 14:24:08 -0800610{
611 struct intel_sdvo_get_trained_inputs_response response;
Jesse Barnes79e53942008-11-07 14:24:08 -0800612
Chris Wilson1a3665c2011-01-25 13:59:37 +0000613 BUILD_BUG_ON(sizeof(response) != 1);
Chris Wilson32aad862010-08-04 13:50:25 +0100614 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
615 &response, sizeof(response)))
Jesse Barnes79e53942008-11-07 14:24:08 -0800616 return false;
617
618 *input_1 = response.input0_trained;
619 *input_2 = response.input1_trained;
620 return true;
621}
622
Chris Wilsonea5b2132010-08-04 13:50:23 +0100623static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800624 u16 outputs)
625{
Chris Wilson32aad862010-08-04 13:50:25 +0100626 return intel_sdvo_set_value(intel_sdvo,
627 SDVO_CMD_SET_ACTIVE_OUTPUTS,
628 &outputs, sizeof(outputs));
Jesse Barnes79e53942008-11-07 14:24:08 -0800629}
630
Chris Wilsonea5b2132010-08-04 13:50:23 +0100631static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800632 int mode)
633{
Chris Wilson32aad862010-08-04 13:50:25 +0100634 u8 state = SDVO_ENCODER_STATE_ON;
Jesse Barnes79e53942008-11-07 14:24:08 -0800635
636 switch (mode) {
637 case DRM_MODE_DPMS_ON:
638 state = SDVO_ENCODER_STATE_ON;
639 break;
640 case DRM_MODE_DPMS_STANDBY:
641 state = SDVO_ENCODER_STATE_STANDBY;
642 break;
643 case DRM_MODE_DPMS_SUSPEND:
644 state = SDVO_ENCODER_STATE_SUSPEND;
645 break;
646 case DRM_MODE_DPMS_OFF:
647 state = SDVO_ENCODER_STATE_OFF;
648 break;
649 }
650
Chris Wilson32aad862010-08-04 13:50:25 +0100651 return intel_sdvo_set_value(intel_sdvo,
652 SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
Jesse Barnes79e53942008-11-07 14:24:08 -0800653}
654
Chris Wilsonea5b2132010-08-04 13:50:23 +0100655static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800656 int *clock_min,
657 int *clock_max)
658{
659 struct intel_sdvo_pixel_clock_range clocks;
Jesse Barnes79e53942008-11-07 14:24:08 -0800660
Chris Wilson1a3665c2011-01-25 13:59:37 +0000661 BUILD_BUG_ON(sizeof(clocks) != 4);
Chris Wilson32aad862010-08-04 13:50:25 +0100662 if (!intel_sdvo_get_value(intel_sdvo,
663 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
664 &clocks, sizeof(clocks)))
Jesse Barnes79e53942008-11-07 14:24:08 -0800665 return false;
666
667 /* Convert the values from units of 10 kHz to kHz. */
668 *clock_min = clocks.min * 10;
669 *clock_max = clocks.max * 10;
Jesse Barnes79e53942008-11-07 14:24:08 -0800670 return true;
671}
672
Chris Wilsonea5b2132010-08-04 13:50:23 +0100673static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800674 u16 outputs)
675{
Chris Wilson32aad862010-08-04 13:50:25 +0100676 return intel_sdvo_set_value(intel_sdvo,
677 SDVO_CMD_SET_TARGET_OUTPUT,
678 &outputs, sizeof(outputs));
Jesse Barnes79e53942008-11-07 14:24:08 -0800679}
680
Chris Wilsonea5b2132010-08-04 13:50:23 +0100681static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
Jesse Barnes79e53942008-11-07 14:24:08 -0800682 struct intel_sdvo_dtd *dtd)
683{
Chris Wilson32aad862010-08-04 13:50:25 +0100684 return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
685 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
Jesse Barnes79e53942008-11-07 14:24:08 -0800686}
687
Chris Wilsonea5b2132010-08-04 13:50:23 +0100688static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800689 struct intel_sdvo_dtd *dtd)
690{
Chris Wilsonea5b2132010-08-04 13:50:23 +0100691 return intel_sdvo_set_timing(intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800692 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
693}
694
Chris Wilsonea5b2132010-08-04 13:50:23 +0100695static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800696 struct intel_sdvo_dtd *dtd)
697{
Chris Wilsonea5b2132010-08-04 13:50:23 +0100698 return intel_sdvo_set_timing(intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800699 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
700}
701
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800702static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +0100703intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800704 uint16_t clock,
705 uint16_t width,
706 uint16_t height)
707{
708 struct intel_sdvo_preferred_input_timing_args args;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800709
Zhenyu Wange642c6f2009-03-24 14:02:42 +0800710 memset(&args, 0, sizeof(args));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800711 args.clock = clock;
712 args.width = width;
713 args.height = height;
Zhenyu Wange642c6f2009-03-24 14:02:42 +0800714 args.interlace = 0;
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800715
Chris Wilsonea5b2132010-08-04 13:50:23 +0100716 if (intel_sdvo->is_lvds &&
717 (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
718 intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800719 args.scaled = 1;
720
Chris Wilson32aad862010-08-04 13:50:25 +0100721 return intel_sdvo_set_value(intel_sdvo,
722 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
723 &args, sizeof(args));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800724}
725
Chris Wilsonea5b2132010-08-04 13:50:23 +0100726static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800727 struct intel_sdvo_dtd *dtd)
728{
Chris Wilson1a3665c2011-01-25 13:59:37 +0000729 BUILD_BUG_ON(sizeof(dtd->part1) != 8);
730 BUILD_BUG_ON(sizeof(dtd->part2) != 8);
Chris Wilson32aad862010-08-04 13:50:25 +0100731 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
732 &dtd->part1, sizeof(dtd->part1)) &&
733 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
734 &dtd->part2, sizeof(dtd->part2));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800735}
Jesse Barnes79e53942008-11-07 14:24:08 -0800736
Chris Wilsonea5b2132010-08-04 13:50:23 +0100737static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
Jesse Barnes79e53942008-11-07 14:24:08 -0800738{
Chris Wilson32aad862010-08-04 13:50:25 +0100739 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
Jesse Barnes79e53942008-11-07 14:24:08 -0800740}
741
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800742static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
Chris Wilson32aad862010-08-04 13:50:25 +0100743 const struct drm_display_mode *mode)
Jesse Barnes79e53942008-11-07 14:24:08 -0800744{
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800745 uint16_t width, height;
746 uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
747 uint16_t h_sync_offset, v_sync_offset;
Daniel Vetter66518192012-04-01 19:16:18 +0200748 int mode_clock;
Jesse Barnes79e53942008-11-07 14:24:08 -0800749
Daniel Vetterc6ebd4c2012-04-24 18:27:57 +0200750 width = mode->hdisplay;
751 height = mode->vdisplay;
Jesse Barnes79e53942008-11-07 14:24:08 -0800752
753 /* do some mode translations */
Daniel Vetterc6ebd4c2012-04-24 18:27:57 +0200754 h_blank_len = mode->htotal - mode->hdisplay;
755 h_sync_len = mode->hsync_end - mode->hsync_start;
Jesse Barnes79e53942008-11-07 14:24:08 -0800756
Daniel Vetterc6ebd4c2012-04-24 18:27:57 +0200757 v_blank_len = mode->vtotal - mode->vdisplay;
758 v_sync_len = mode->vsync_end - mode->vsync_start;
Jesse Barnes79e53942008-11-07 14:24:08 -0800759
Daniel Vetterc6ebd4c2012-04-24 18:27:57 +0200760 h_sync_offset = mode->hsync_start - mode->hdisplay;
761 v_sync_offset = mode->vsync_start - mode->vdisplay;
Jesse Barnes79e53942008-11-07 14:24:08 -0800762
Daniel Vetter66518192012-04-01 19:16:18 +0200763 mode_clock = mode->clock;
764 mode_clock /= intel_mode_get_pixel_multiplier(mode) ?: 1;
765 mode_clock /= 10;
766 dtd->part1.clock = mode_clock;
767
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800768 dtd->part1.h_active = width & 0xff;
769 dtd->part1.h_blank = h_blank_len & 0xff;
770 dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
Jesse Barnes79e53942008-11-07 14:24:08 -0800771 ((h_blank_len >> 8) & 0xf);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800772 dtd->part1.v_active = height & 0xff;
773 dtd->part1.v_blank = v_blank_len & 0xff;
774 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
Jesse Barnes79e53942008-11-07 14:24:08 -0800775 ((v_blank_len >> 8) & 0xf);
776
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800777 dtd->part2.h_sync_off = h_sync_offset & 0xff;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800778 dtd->part2.h_sync_width = h_sync_len & 0xff;
779 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
Jesse Barnes79e53942008-11-07 14:24:08 -0800780 (v_sync_len & 0xf);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800781 dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
Jesse Barnes79e53942008-11-07 14:24:08 -0800782 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
783 ((v_sync_len & 0x30) >> 4);
784
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800785 dtd->part2.dtd_flags = 0x18;
Daniel Vetter59d92bf2012-05-12 22:22:58 +0200786 if (mode->flags & DRM_MODE_FLAG_INTERLACE)
787 dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE;
Jesse Barnes79e53942008-11-07 14:24:08 -0800788 if (mode->flags & DRM_MODE_FLAG_PHSYNC)
Daniel Vetter59d92bf2012-05-12 22:22:58 +0200789 dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE;
Jesse Barnes79e53942008-11-07 14:24:08 -0800790 if (mode->flags & DRM_MODE_FLAG_PVSYNC)
Daniel Vetter59d92bf2012-05-12 22:22:58 +0200791 dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE;
Jesse Barnes79e53942008-11-07 14:24:08 -0800792
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800793 dtd->part2.sdvo_flags = 0;
794 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
795 dtd->part2.reserved = 0;
796}
Jesse Barnes79e53942008-11-07 14:24:08 -0800797
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800798static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
Chris Wilson32aad862010-08-04 13:50:25 +0100799 const struct intel_sdvo_dtd *dtd)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800800{
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800801 mode->hdisplay = dtd->part1.h_active;
802 mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
803 mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800804 mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800805 mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
806 mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
807 mode->htotal = mode->hdisplay + dtd->part1.h_blank;
808 mode->htotal += (dtd->part1.h_high & 0xf) << 8;
809
810 mode->vdisplay = dtd->part1.v_active;
811 mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
812 mode->vsync_start = mode->vdisplay;
813 mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800814 mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800815 mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
816 mode->vsync_end = mode->vsync_start +
817 (dtd->part2.v_sync_off_width & 0xf);
818 mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
819 mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
820 mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
821
822 mode->clock = dtd->part1.clock * 10;
823
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800824 mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
Daniel Vetter59d92bf2012-05-12 22:22:58 +0200825 if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE)
826 mode->flags |= DRM_MODE_FLAG_INTERLACE;
827 if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800828 mode->flags |= DRM_MODE_FLAG_PHSYNC;
Daniel Vetter59d92bf2012-05-12 22:22:58 +0200829 if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800830 mode->flags |= DRM_MODE_FLAG_PVSYNC;
831}
832
Chris Wilsone27d8532010-10-22 09:15:22 +0100833static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800834{
Chris Wilsone27d8532010-10-22 09:15:22 +0100835 struct intel_sdvo_encode encode;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800836
Chris Wilson1a3665c2011-01-25 13:59:37 +0000837 BUILD_BUG_ON(sizeof(encode) != 2);
Chris Wilsone27d8532010-10-22 09:15:22 +0100838 return intel_sdvo_get_value(intel_sdvo,
839 SDVO_CMD_GET_SUPP_ENCODE,
840 &encode, sizeof(encode));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800841}
842
Chris Wilsonea5b2132010-08-04 13:50:23 +0100843static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
Eric Anholtc751ce42010-03-25 11:48:48 -0700844 uint8_t mode)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800845{
Chris Wilson32aad862010-08-04 13:50:25 +0100846 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800847}
848
Chris Wilsonea5b2132010-08-04 13:50:23 +0100849static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800850 uint8_t mode)
851{
Chris Wilson32aad862010-08-04 13:50:25 +0100852 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800853}
854
855#if 0
Chris Wilsonea5b2132010-08-04 13:50:23 +0100856static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800857{
858 int i, j;
859 uint8_t set_buf_index[2];
860 uint8_t av_split;
861 uint8_t buf_size;
862 uint8_t buf[48];
863 uint8_t *pos;
864
Chris Wilson32aad862010-08-04 13:50:25 +0100865 intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800866
867 for (i = 0; i <= av_split; i++) {
868 set_buf_index[0] = i; set_buf_index[1] = 0;
Eric Anholtc751ce42010-03-25 11:48:48 -0700869 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800870 set_buf_index, 2);
Eric Anholtc751ce42010-03-25 11:48:48 -0700871 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
872 intel_sdvo_read_response(encoder, &buf_size, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800873
874 pos = buf;
875 for (j = 0; j <= buf_size; j += 8) {
Eric Anholtc751ce42010-03-25 11:48:48 -0700876 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800877 NULL, 0);
Eric Anholtc751ce42010-03-25 11:48:48 -0700878 intel_sdvo_read_response(encoder, pos, 8);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800879 pos += 8;
880 }
881 }
882}
883#endif
884
David Härdeman3c17fe42010-09-24 21:44:32 +0200885static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800886{
887 struct dip_infoframe avi_if = {
888 .type = DIP_TYPE_AVI,
David Härdeman3c17fe42010-09-24 21:44:32 +0200889 .ver = DIP_VERSION_AVI,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800890 .len = DIP_LEN_AVI,
891 };
David Härdeman3c17fe42010-09-24 21:44:32 +0200892 uint8_t tx_rate = SDVO_HBUF_TX_VSYNC;
893 uint8_t set_buf_index[2] = { 1, 0 };
Daniel Vetter81014b92012-05-12 20:22:00 +0200894 uint8_t sdvo_data[4 + sizeof(avi_if.body.avi)];
895 uint64_t *data = (uint64_t *)sdvo_data;
David Härdeman3c17fe42010-09-24 21:44:32 +0200896 unsigned i;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800897
David Härdeman3c17fe42010-09-24 21:44:32 +0200898 intel_dip_infoframe_csum(&avi_if);
899
Daniel Vetter81014b92012-05-12 20:22:00 +0200900 /* sdvo spec says that the ecc is handled by the hw, and it looks like
901 * we must not send the ecc field, either. */
902 memcpy(sdvo_data, &avi_if, 3);
903 sdvo_data[3] = avi_if.checksum;
904 memcpy(&sdvo_data[4], &avi_if.body, sizeof(avi_if.body.avi));
905
Chris Wilsond121a5d2011-01-25 15:00:01 +0000906 if (!intel_sdvo_set_value(intel_sdvo,
907 SDVO_CMD_SET_HBUF_INDEX,
David Härdeman3c17fe42010-09-24 21:44:32 +0200908 set_buf_index, 2))
909 return false;
910
Daniel Vetter81014b92012-05-12 20:22:00 +0200911 for (i = 0; i < sizeof(sdvo_data); i += 8) {
Chris Wilsond121a5d2011-01-25 15:00:01 +0000912 if (!intel_sdvo_set_value(intel_sdvo,
913 SDVO_CMD_SET_HBUF_DATA,
David Härdeman3c17fe42010-09-24 21:44:32 +0200914 data, 8))
915 return false;
916 data++;
917 }
918
Chris Wilsond121a5d2011-01-25 15:00:01 +0000919 return intel_sdvo_set_value(intel_sdvo,
920 SDVO_CMD_SET_HBUF_TXRATE,
David Härdeman3c17fe42010-09-24 21:44:32 +0200921 &tx_rate, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800922}
923
Chris Wilson32aad862010-08-04 13:50:25 +0100924static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
Zhenyu Wang7026d4a2009-03-24 14:02:43 +0800925{
Zhao Yakuice6feab2009-08-24 13:50:26 +0800926 struct intel_sdvo_tv_format format;
Chris Wilson40039752010-08-04 13:50:26 +0100927 uint32_t format_map;
Zhao Yakuice6feab2009-08-24 13:50:26 +0800928
Chris Wilson40039752010-08-04 13:50:26 +0100929 format_map = 1 << intel_sdvo->tv_format_index;
Zhao Yakuice6feab2009-08-24 13:50:26 +0800930 memset(&format, 0, sizeof(format));
Chris Wilson32aad862010-08-04 13:50:25 +0100931 memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
Zhao Yakuice6feab2009-08-24 13:50:26 +0800932
Chris Wilson32aad862010-08-04 13:50:25 +0100933 BUILD_BUG_ON(sizeof(format) != 6);
934 return intel_sdvo_set_value(intel_sdvo,
935 SDVO_CMD_SET_TV_FORMAT,
936 &format, sizeof(format));
937}
Zhao Yakuice6feab2009-08-24 13:50:26 +0800938
Chris Wilson32aad862010-08-04 13:50:25 +0100939static bool
940intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
Laurent Pincharte811f5a2012-07-17 17:56:50 +0200941 const struct drm_display_mode *mode)
Chris Wilson32aad862010-08-04 13:50:25 +0100942{
943 struct intel_sdvo_dtd output_dtd;
944
945 if (!intel_sdvo_set_target_output(intel_sdvo,
946 intel_sdvo->attached_output))
947 return false;
948
949 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
950 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
951 return false;
952
953 return true;
954}
955
Daniel Vetterc9a29692012-04-10 13:55:47 +0200956/* Asks the sdvo controller for the preferred input mode given the output mode.
957 * Unfortunately we have to set up the full output mode to do that. */
Chris Wilson32aad862010-08-04 13:50:25 +0100958static bool
Daniel Vetterc9a29692012-04-10 13:55:47 +0200959intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo,
Laurent Pincharte811f5a2012-07-17 17:56:50 +0200960 const struct drm_display_mode *mode,
Daniel Vetterc9a29692012-04-10 13:55:47 +0200961 struct drm_display_mode *adjusted_mode)
Chris Wilson32aad862010-08-04 13:50:25 +0100962{
Daniel Vetterc9a29692012-04-10 13:55:47 +0200963 struct intel_sdvo_dtd input_dtd;
964
Chris Wilson32aad862010-08-04 13:50:25 +0100965 /* Reset the input timing to the screen. Assume always input 0. */
966 if (!intel_sdvo_set_target_input(intel_sdvo))
967 return false;
968
969 if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
970 mode->clock / 10,
971 mode->hdisplay,
972 mode->vdisplay))
973 return false;
974
975 if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
Daniel Vetterc9a29692012-04-10 13:55:47 +0200976 &input_dtd))
Chris Wilson32aad862010-08-04 13:50:25 +0100977 return false;
978
Daniel Vetterc9a29692012-04-10 13:55:47 +0200979 intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd);
Chris Wilson32aad862010-08-04 13:50:25 +0100980
Chris Wilson32aad862010-08-04 13:50:25 +0100981 return true;
Zhenyu Wang7026d4a2009-03-24 14:02:43 +0800982}
983
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800984static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
Laurent Pincharte811f5a2012-07-17 17:56:50 +0200985 const struct drm_display_mode *mode,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800986 struct drm_display_mode *adjusted_mode)
987{
Chris Wilson890f3352010-09-14 16:46:59 +0100988 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
Chris Wilson6c9547f2010-08-25 10:05:17 +0100989 int multiplier;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800990
Chris Wilson32aad862010-08-04 13:50:25 +0100991 /* We need to construct preferred input timings based on our
992 * output timings. To do that, we have to set the output
993 * timings, even though this isn't really the right place in
994 * the sequence to do it. Oh well.
995 */
Chris Wilsonea5b2132010-08-04 13:50:23 +0100996 if (intel_sdvo->is_tv) {
Chris Wilson32aad862010-08-04 13:50:25 +0100997 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800998 return false;
Chris Wilson32aad862010-08-04 13:50:25 +0100999
Daniel Vetterc9a29692012-04-10 13:55:47 +02001000 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1001 mode,
1002 adjusted_mode);
Chris Wilsonea5b2132010-08-04 13:50:23 +01001003 } else if (intel_sdvo->is_lvds) {
Chris Wilson32aad862010-08-04 13:50:25 +01001004 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
Chris Wilson6c9547f2010-08-25 10:05:17 +01001005 intel_sdvo->sdvo_lvds_fixed_mode))
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001006 return false;
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001007
Daniel Vetterc9a29692012-04-10 13:55:47 +02001008 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1009 mode,
1010 adjusted_mode);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001011 }
Chris Wilson32aad862010-08-04 13:50:25 +01001012
1013 /* Make the CRTC code factor in the SDVO pixel multiplier. The
Chris Wilson6c9547f2010-08-25 10:05:17 +01001014 * SDVO device will factor out the multiplier during mode_set.
Chris Wilson32aad862010-08-04 13:50:25 +01001015 */
Chris Wilson6c9547f2010-08-25 10:05:17 +01001016 multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode);
1017 intel_mode_set_pixel_multiplier(adjusted_mode, multiplier);
Chris Wilson32aad862010-08-04 13:50:25 +01001018
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001019 return true;
1020}
1021
1022static void intel_sdvo_mode_set(struct drm_encoder *encoder,
1023 struct drm_display_mode *mode,
1024 struct drm_display_mode *adjusted_mode)
1025{
1026 struct drm_device *dev = encoder->dev;
1027 struct drm_i915_private *dev_priv = dev->dev_private;
1028 struct drm_crtc *crtc = encoder->crtc;
1029 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
Chris Wilson890f3352010-09-14 16:46:59 +01001030 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
Chris Wilson6c9547f2010-08-25 10:05:17 +01001031 u32 sdvox;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001032 struct intel_sdvo_in_out_map in_out;
Daniel Vetter66518192012-04-01 19:16:18 +02001033 struct intel_sdvo_dtd input_dtd, output_dtd;
Chris Wilson6c9547f2010-08-25 10:05:17 +01001034 int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode);
1035 int rate;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001036
1037 if (!mode)
1038 return;
1039
1040 /* First, set the input mapping for the first input to our controlled
1041 * output. This is only correct if we're a single-input device, in
1042 * which case the first input is the output from the appropriate SDVO
1043 * channel on the motherboard. In a two-input device, the first input
1044 * will be SDVOB and the second SDVOC.
1045 */
Chris Wilsonea5b2132010-08-04 13:50:23 +01001046 in_out.in0 = intel_sdvo->attached_output;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001047 in_out.in1 = 0;
1048
Pavel Roskinc74696b2010-09-02 14:46:34 -04001049 intel_sdvo_set_value(intel_sdvo,
1050 SDVO_CMD_SET_IN_OUT_MAP,
1051 &in_out, sizeof(in_out));
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001052
Chris Wilson6c9547f2010-08-25 10:05:17 +01001053 /* Set the output timings to the screen */
1054 if (!intel_sdvo_set_target_output(intel_sdvo,
1055 intel_sdvo->attached_output))
1056 return;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001057
Daniel Vetter66518192012-04-01 19:16:18 +02001058 /* lvds has a special fixed output timing. */
1059 if (intel_sdvo->is_lvds)
1060 intel_sdvo_get_dtd_from_mode(&output_dtd,
1061 intel_sdvo->sdvo_lvds_fixed_mode);
1062 else
1063 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
Daniel Vetterc8d4bb52012-04-10 13:55:48 +02001064 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1065 DRM_INFO("Setting output timings on %s failed\n",
1066 SDVO_NAME(intel_sdvo));
Jesse Barnes79e53942008-11-07 14:24:08 -08001067
1068 /* Set the input timing to the screen. Assume always input 0. */
Chris Wilson32aad862010-08-04 13:50:25 +01001069 if (!intel_sdvo_set_target_input(intel_sdvo))
1070 return;
Jesse Barnes79e53942008-11-07 14:24:08 -08001071
Chris Wilson97aaf912011-01-04 20:10:52 +00001072 if (intel_sdvo->has_hdmi_monitor) {
1073 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1074 intel_sdvo_set_colorimetry(intel_sdvo,
1075 SDVO_COLORIMETRY_RGB256);
1076 intel_sdvo_set_avi_infoframe(intel_sdvo);
1077 } else
1078 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001079
Chris Wilson6c9547f2010-08-25 10:05:17 +01001080 if (intel_sdvo->is_tv &&
1081 !intel_sdvo_set_tv_format(intel_sdvo))
1082 return;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001083
Daniel Vetter66518192012-04-01 19:16:18 +02001084 /* We have tried to get input timing in mode_fixup, and filled into
1085 * adjusted_mode.
1086 */
1087 intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
Daniel Vetterc8d4bb52012-04-10 13:55:48 +02001088 if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd))
1089 DRM_INFO("Setting input timings on %s failed\n",
1090 SDVO_NAME(intel_sdvo));
Jesse Barnes79e53942008-11-07 14:24:08 -08001091
Chris Wilson6c9547f2010-08-25 10:05:17 +01001092 switch (pixel_multiplier) {
1093 default:
Chris Wilson32aad862010-08-04 13:50:25 +01001094 case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1095 case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1096 case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
Jesse Barnes79e53942008-11-07 14:24:08 -08001097 }
Chris Wilson32aad862010-08-04 13:50:25 +01001098 if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1099 return;
Jesse Barnes79e53942008-11-07 14:24:08 -08001100
1101 /* Set the SDVO control regs. */
Chris Wilsona6c45cf2010-09-17 00:32:17 +01001102 if (INTEL_INFO(dev)->gen >= 4) {
Paulo Zanoniba68e082012-01-06 19:45:34 -02001103 /* The real mode polarity is set by the SDVO commands, using
1104 * struct intel_sdvo_dtd. */
1105 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
Chris Wilsone953fd72011-02-21 22:23:52 +00001106 if (intel_sdvo->is_hdmi)
1107 sdvox |= intel_sdvo->color_range;
Chris Wilson6714afb2010-12-17 04:10:51 +00001108 if (INTEL_INFO(dev)->gen < 5)
1109 sdvox |= SDVO_BORDER_ENABLE;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001110 } else {
Chris Wilson6c9547f2010-08-25 10:05:17 +01001111 sdvox = I915_READ(intel_sdvo->sdvo_reg);
Chris Wilsonea5b2132010-08-04 13:50:23 +01001112 switch (intel_sdvo->sdvo_reg) {
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001113 case SDVOB:
1114 sdvox &= SDVOB_PRESERVE_MASK;
1115 break;
1116 case SDVOC:
1117 sdvox &= SDVOC_PRESERVE_MASK;
1118 break;
1119 }
1120 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1121 }
Paulo Zanoni3573c412011-10-14 18:16:22 -03001122
1123 if (INTEL_PCH_TYPE(dev) >= PCH_CPT)
1124 sdvox |= TRANSCODER_CPT(intel_crtc->pipe);
1125 else
1126 sdvox |= TRANSCODER(intel_crtc->pipe);
1127
Chris Wilsonda79de92010-11-22 11:12:46 +00001128 if (intel_sdvo->has_hdmi_audio)
Chris Wilson6c9547f2010-08-25 10:05:17 +01001129 sdvox |= SDVO_AUDIO_ENABLE;
Jesse Barnes79e53942008-11-07 14:24:08 -08001130
Chris Wilsona6c45cf2010-09-17 00:32:17 +01001131 if (INTEL_INFO(dev)->gen >= 4) {
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001132 /* done in crtc_mode_set as the dpll_md reg must be written early */
1133 } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
1134 /* done in crtc_mode_set as it lives inside the dpll register */
Jesse Barnes79e53942008-11-07 14:24:08 -08001135 } else {
Chris Wilson6c9547f2010-08-25 10:05:17 +01001136 sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
Jesse Barnes79e53942008-11-07 14:24:08 -08001137 }
1138
Chris Wilson6714afb2010-12-17 04:10:51 +00001139 if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1140 INTEL_INFO(dev)->gen < 5)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001141 sdvox |= SDVO_STALL_SELECT;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001142 intel_sdvo_write_sdvox(intel_sdvo, sdvox);
Jesse Barnes79e53942008-11-07 14:24:08 -08001143}
1144
1145static void intel_sdvo_dpms(struct drm_encoder *encoder, int mode)
1146{
1147 struct drm_device *dev = encoder->dev;
1148 struct drm_i915_private *dev_priv = dev->dev_private;
Chris Wilson890f3352010-09-14 16:46:59 +01001149 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
Jesse Barnes9d0498a2010-08-18 13:20:54 -07001150 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
Jesse Barnes79e53942008-11-07 14:24:08 -08001151 u32 temp;
1152
1153 if (mode != DRM_MODE_DPMS_ON) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001154 intel_sdvo_set_active_outputs(intel_sdvo, 0);
Jesse Barnes79e53942008-11-07 14:24:08 -08001155 if (0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01001156 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
Jesse Barnes79e53942008-11-07 14:24:08 -08001157
1158 if (mode == DRM_MODE_DPMS_OFF) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001159 temp = I915_READ(intel_sdvo->sdvo_reg);
Jesse Barnes79e53942008-11-07 14:24:08 -08001160 if ((temp & SDVO_ENABLE) != 0) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001161 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
Jesse Barnes79e53942008-11-07 14:24:08 -08001162 }
1163 }
1164 } else {
1165 bool input1, input2;
1166 int i;
1167 u8 status;
1168
Chris Wilsonea5b2132010-08-04 13:50:23 +01001169 temp = I915_READ(intel_sdvo->sdvo_reg);
Jesse Barnes79e53942008-11-07 14:24:08 -08001170 if ((temp & SDVO_ENABLE) == 0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01001171 intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
Jesse Barnes79e53942008-11-07 14:24:08 -08001172 for (i = 0; i < 2; i++)
Jesse Barnes9d0498a2010-08-18 13:20:54 -07001173 intel_wait_for_vblank(dev, intel_crtc->pipe);
Jesse Barnes79e53942008-11-07 14:24:08 -08001174
Chris Wilson32aad862010-08-04 13:50:25 +01001175 status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
Jesse Barnes79e53942008-11-07 14:24:08 -08001176 /* Warn if the device reported failure to sync.
1177 * A lot of SDVO devices fail to notify of sync, but it's
1178 * a given it the status is a success, we succeeded.
1179 */
1180 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
Zhao Yakui8a4c47f2009-07-20 13:48:04 +08001181 DRM_DEBUG_KMS("First %s output reported failure to "
Chris Wilsonea5b2132010-08-04 13:50:23 +01001182 "sync\n", SDVO_NAME(intel_sdvo));
Jesse Barnes79e53942008-11-07 14:24:08 -08001183 }
1184
1185 if (0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01001186 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1187 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
Jesse Barnes79e53942008-11-07 14:24:08 -08001188 }
1189 return;
1190}
1191
Jesse Barnes79e53942008-11-07 14:24:08 -08001192static int intel_sdvo_mode_valid(struct drm_connector *connector,
1193 struct drm_display_mode *mode)
1194{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001195 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001196
1197 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1198 return MODE_NO_DBLESCAN;
1199
Chris Wilsonea5b2132010-08-04 13:50:23 +01001200 if (intel_sdvo->pixel_clock_min > mode->clock)
Jesse Barnes79e53942008-11-07 14:24:08 -08001201 return MODE_CLOCK_LOW;
1202
Chris Wilsonea5b2132010-08-04 13:50:23 +01001203 if (intel_sdvo->pixel_clock_max < mode->clock)
Jesse Barnes79e53942008-11-07 14:24:08 -08001204 return MODE_CLOCK_HIGH;
1205
Chris Wilson85454232010-08-08 14:28:23 +01001206 if (intel_sdvo->is_lvds) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001207 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001208 return MODE_PANEL;
1209
Chris Wilsonea5b2132010-08-04 13:50:23 +01001210 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001211 return MODE_PANEL;
1212 }
1213
Jesse Barnes79e53942008-11-07 14:24:08 -08001214 return MODE_OK;
1215}
1216
Chris Wilsonea5b2132010-08-04 13:50:23 +01001217static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
Jesse Barnes79e53942008-11-07 14:24:08 -08001218{
Chris Wilson1a3665c2011-01-25 13:59:37 +00001219 BUILD_BUG_ON(sizeof(*caps) != 8);
Chris Wilsone957d772010-09-24 12:52:03 +01001220 if (!intel_sdvo_get_value(intel_sdvo,
1221 SDVO_CMD_GET_DEVICE_CAPS,
1222 caps, sizeof(*caps)))
1223 return false;
1224
1225 DRM_DEBUG_KMS("SDVO capabilities:\n"
1226 " vendor_id: %d\n"
1227 " device_id: %d\n"
1228 " device_rev_id: %d\n"
1229 " sdvo_version_major: %d\n"
1230 " sdvo_version_minor: %d\n"
1231 " sdvo_inputs_mask: %d\n"
1232 " smooth_scaling: %d\n"
1233 " sharp_scaling: %d\n"
1234 " up_scaling: %d\n"
1235 " down_scaling: %d\n"
1236 " stall_support: %d\n"
1237 " output_flags: %d\n",
1238 caps->vendor_id,
1239 caps->device_id,
1240 caps->device_rev_id,
1241 caps->sdvo_version_major,
1242 caps->sdvo_version_minor,
1243 caps->sdvo_inputs_mask,
1244 caps->smooth_scaling,
1245 caps->sharp_scaling,
1246 caps->up_scaling,
1247 caps->down_scaling,
1248 caps->stall_support,
1249 caps->output_flags);
1250
1251 return true;
Jesse Barnes79e53942008-11-07 14:24:08 -08001252}
1253
Simon Farnsworthcc68c812011-09-21 17:13:30 +01001254static int intel_sdvo_supports_hotplug(struct intel_sdvo *intel_sdvo)
Jesse Barnes79e53942008-11-07 14:24:08 -08001255{
Daniel Vetter768b1072012-05-04 11:29:56 +02001256 struct drm_device *dev = intel_sdvo->base.base.dev;
Jesse Barnes79e53942008-11-07 14:24:08 -08001257 u8 response[2];
Jesse Barnes79e53942008-11-07 14:24:08 -08001258
Daniel Vetter768b1072012-05-04 11:29:56 +02001259 /* HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
1260 * on the line. */
1261 if (IS_I945G(dev) || IS_I945GM(dev))
1262 return false;
1263
Chris Wilson32aad862010-08-04 13:50:25 +01001264 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1265 &response, 2) && response[0];
Jesse Barnes79e53942008-11-07 14:24:08 -08001266}
1267
Simon Farnsworthcc68c812011-09-21 17:13:30 +01001268static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
Jesse Barnes79e53942008-11-07 14:24:08 -08001269{
Simon Farnsworthcc68c812011-09-21 17:13:30 +01001270 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
Jesse Barnes79e53942008-11-07 14:24:08 -08001271
Simon Farnsworthcc68c812011-09-21 17:13:30 +01001272 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &intel_sdvo->hotplug_active, 2);
Jesse Barnes79e53942008-11-07 14:24:08 -08001273}
1274
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001275static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01001276intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001277{
Chris Wilsonbc652122011-01-25 13:28:29 +00001278 /* Is there more than one type of output? */
Adam Jackson22944882011-06-16 16:36:24 -04001279 return hweight16(intel_sdvo->caps.output_flags) > 1;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001280}
1281
Chris Wilsonf899fc62010-07-20 15:44:45 -07001282static struct edid *
Chris Wilsone957d772010-09-24 12:52:03 +01001283intel_sdvo_get_edid(struct drm_connector *connector)
Chris Wilsonf899fc62010-07-20 15:44:45 -07001284{
Chris Wilsone957d772010-09-24 12:52:03 +01001285 struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1286 return drm_get_edid(connector, &sdvo->ddc);
Chris Wilsonf899fc62010-07-20 15:44:45 -07001287}
1288
Chris Wilsonff482d82010-09-15 10:40:38 +01001289/* Mac mini hack -- use the same DDC as the analog connector */
1290static struct edid *
1291intel_sdvo_get_analog_edid(struct drm_connector *connector)
1292{
Chris Wilsonf899fc62010-07-20 15:44:45 -07001293 struct drm_i915_private *dev_priv = connector->dev->dev_private;
Chris Wilsonff482d82010-09-15 10:40:38 +01001294
Chris Wilson0c1dab82010-11-23 22:37:01 +00001295 return drm_get_edid(connector,
Daniel Kurtz3bd7d902012-03-28 02:36:14 +08001296 intel_gmbus_get_adapter(dev_priv,
1297 dev_priv->crt_ddc_pin));
Chris Wilsonff482d82010-09-15 10:40:38 +01001298}
1299
Ben Widawskyc43b5632012-04-16 14:07:40 -07001300static enum drm_connector_status
Adam Jackson8bf38482011-06-16 16:36:25 -04001301intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
Ma Ling9dff6af2009-04-02 13:13:26 +08001302{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001303 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Chris Wilson9d1a9032010-09-14 17:58:19 +01001304 enum drm_connector_status status;
1305 struct edid *edid;
Ma Ling9dff6af2009-04-02 13:13:26 +08001306
Chris Wilsone957d772010-09-24 12:52:03 +01001307 edid = intel_sdvo_get_edid(connector);
Keith Packard57cdaf92009-09-04 13:07:54 +08001308
Chris Wilsonea5b2132010-08-04 13:50:23 +01001309 if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
Chris Wilsone957d772010-09-24 12:52:03 +01001310 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
Chris Wilson9d1a9032010-09-14 17:58:19 +01001311
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001312 /*
1313 * Don't use the 1 as the argument of DDC bus switch to get
1314 * the EDID. It is used for SDVO SPD ROM.
1315 */
Chris Wilson9d1a9032010-09-14 17:58:19 +01001316 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
Chris Wilsone957d772010-09-24 12:52:03 +01001317 intel_sdvo->ddc_bus = ddc;
1318 edid = intel_sdvo_get_edid(connector);
1319 if (edid)
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001320 break;
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001321 }
Chris Wilsone957d772010-09-24 12:52:03 +01001322 /*
1323 * If we found the EDID on the other bus,
1324 * assume that is the correct DDC bus.
1325 */
1326 if (edid == NULL)
1327 intel_sdvo->ddc_bus = saved_ddc;
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001328 }
Chris Wilson9d1a9032010-09-14 17:58:19 +01001329
1330 /*
1331 * When there is no edid and no monitor is connected with VGA
1332 * port, try to use the CRT ddc to read the EDID for DVI-connector.
Keith Packard57cdaf92009-09-04 13:07:54 +08001333 */
Chris Wilsonff482d82010-09-15 10:40:38 +01001334 if (edid == NULL)
1335 edid = intel_sdvo_get_analog_edid(connector);
Adam Jackson149c36a2010-04-29 14:05:18 -04001336
Chris Wilson2f551c82010-09-15 10:42:50 +01001337 status = connector_status_unknown;
Ma Ling9dff6af2009-04-02 13:13:26 +08001338 if (edid != NULL) {
Adam Jackson149c36a2010-04-29 14:05:18 -04001339 /* DDC bus is shared, match EDID to connector type */
Chris Wilson9d1a9032010-09-14 17:58:19 +01001340 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1341 status = connector_status_connected;
Chris Wilsonda79de92010-11-22 11:12:46 +00001342 if (intel_sdvo->is_hdmi) {
1343 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1344 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1345 }
Chris Wilson139467432011-02-09 20:01:16 +00001346 } else
1347 status = connector_status_disconnected;
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001348 connector->display_info.raw_edid = NULL;
Chris Wilson9d1a9032010-09-14 17:58:19 +01001349 kfree(edid);
1350 }
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001351
1352 if (status == connector_status_connected) {
1353 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Daniel Vetterc3e5f672012-02-23 17:14:47 +01001354 if (intel_sdvo_connector->force_audio != HDMI_AUDIO_AUTO)
1355 intel_sdvo->has_hdmi_audio = (intel_sdvo_connector->force_audio == HDMI_AUDIO_ON);
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001356 }
1357
ling.ma@intel.com2b8d33f72009-07-29 11:31:18 +08001358 return status;
Ma Ling9dff6af2009-04-02 13:13:26 +08001359}
1360
Chris Wilson52220082011-06-20 14:45:50 +01001361static bool
1362intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
1363 struct edid *edid)
1364{
1365 bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1366 bool connector_is_digital = !!IS_DIGITAL(sdvo);
1367
1368 DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
1369 connector_is_digital, monitor_is_digital);
1370 return connector_is_digital == monitor_is_digital;
1371}
1372
Chris Wilson7b334fc2010-09-09 23:51:02 +01001373static enum drm_connector_status
Chris Wilson930a9e22010-09-14 11:07:23 +01001374intel_sdvo_detect(struct drm_connector *connector, bool force)
Jesse Barnes79e53942008-11-07 14:24:08 -08001375{
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001376 uint16_t response;
Chris Wilsondf0e9242010-09-09 16:20:55 +01001377 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Chris Wilson615fb932010-08-04 13:50:24 +01001378 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Zhenyu Wang14571b42010-03-30 14:06:33 +08001379 enum drm_connector_status ret;
Jesse Barnes79e53942008-11-07 14:24:08 -08001380
Chris Wilson32aad862010-08-04 13:50:25 +01001381 if (!intel_sdvo_write_cmd(intel_sdvo,
Chris Wilsone957d772010-09-24 12:52:03 +01001382 SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0))
Chris Wilson32aad862010-08-04 13:50:25 +01001383 return connector_status_unknown;
Chris Wilsonba84cd12010-11-24 17:37:17 +00001384
1385 /* add 30ms delay when the output type might be TV */
Chris Wilsona0b1c7a2011-09-30 22:56:41 +01001386 if (intel_sdvo->caps.output_flags & SDVO_TV_MASK)
Daniel Vetter6c982372012-05-24 21:26:49 +02001387 msleep(30);
Chris Wilsonba84cd12010-11-24 17:37:17 +00001388
Chris Wilson32aad862010-08-04 13:50:25 +01001389 if (!intel_sdvo_read_response(intel_sdvo, &response, 2))
1390 return connector_status_unknown;
Jesse Barnes79e53942008-11-07 14:24:08 -08001391
Chris Wilsone957d772010-09-24 12:52:03 +01001392 DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1393 response & 0xff, response >> 8,
1394 intel_sdvo_connector->output_flag);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001395
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001396 if (response == 0)
Jesse Barnes79e53942008-11-07 14:24:08 -08001397 return connector_status_disconnected;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001398
Chris Wilsonea5b2132010-08-04 13:50:23 +01001399 intel_sdvo->attached_output = response;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001400
Chris Wilson97aaf912011-01-04 20:10:52 +00001401 intel_sdvo->has_hdmi_monitor = false;
1402 intel_sdvo->has_hdmi_audio = false;
1403
Chris Wilson615fb932010-08-04 13:50:24 +01001404 if ((intel_sdvo_connector->output_flag & response) == 0)
Zhenyu Wang14571b42010-03-30 14:06:33 +08001405 ret = connector_status_disconnected;
Chris Wilson139467432011-02-09 20:01:16 +00001406 else if (IS_TMDS(intel_sdvo_connector))
Adam Jackson8bf38482011-06-16 16:36:25 -04001407 ret = intel_sdvo_tmds_sink_detect(connector);
Chris Wilson139467432011-02-09 20:01:16 +00001408 else {
1409 struct edid *edid;
1410
1411 /* if we have an edid check it matches the connection */
1412 edid = intel_sdvo_get_edid(connector);
1413 if (edid == NULL)
1414 edid = intel_sdvo_get_analog_edid(connector);
1415 if (edid != NULL) {
Chris Wilson52220082011-06-20 14:45:50 +01001416 if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
1417 edid))
Chris Wilson139467432011-02-09 20:01:16 +00001418 ret = connector_status_connected;
Chris Wilson52220082011-06-20 14:45:50 +01001419 else
1420 ret = connector_status_disconnected;
1421
Chris Wilson139467432011-02-09 20:01:16 +00001422 connector->display_info.raw_edid = NULL;
1423 kfree(edid);
1424 } else
1425 ret = connector_status_connected;
1426 }
Zhenyu Wang14571b42010-03-30 14:06:33 +08001427
1428 /* May update encoder flag for like clock for SDVO TV, etc.*/
1429 if (ret == connector_status_connected) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001430 intel_sdvo->is_tv = false;
1431 intel_sdvo->is_lvds = false;
1432 intel_sdvo->base.needs_tv_clock = false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001433
1434 if (response & SDVO_TV_MASK) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001435 intel_sdvo->is_tv = true;
1436 intel_sdvo->base.needs_tv_clock = true;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001437 }
1438 if (response & SDVO_LVDS_MASK)
Chris Wilson85454232010-08-08 14:28:23 +01001439 intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001440 }
Zhenyu Wang14571b42010-03-30 14:06:33 +08001441
1442 return ret;
Jesse Barnes79e53942008-11-07 14:24:08 -08001443}
1444
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001445static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
Jesse Barnes79e53942008-11-07 14:24:08 -08001446{
Chris Wilsonff482d82010-09-15 10:40:38 +01001447 struct edid *edid;
Jesse Barnes79e53942008-11-07 14:24:08 -08001448
1449 /* set the bus switch and get the modes */
Chris Wilsone957d772010-09-24 12:52:03 +01001450 edid = intel_sdvo_get_edid(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001451
Keith Packard57cdaf92009-09-04 13:07:54 +08001452 /*
1453 * Mac mini hack. On this device, the DVI-I connector shares one DDC
1454 * link between analog and digital outputs. So, if the regular SDVO
1455 * DDC fails, check to see if the analog output is disconnected, in
1456 * which case we'll look there for the digital DDC data.
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001457 */
Chris Wilsonf899fc62010-07-20 15:44:45 -07001458 if (edid == NULL)
1459 edid = intel_sdvo_get_analog_edid(connector);
1460
Chris Wilsonff482d82010-09-15 10:40:38 +01001461 if (edid != NULL) {
Chris Wilson52220082011-06-20 14:45:50 +01001462 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
1463 edid)) {
Chris Wilson0c1dab82010-11-23 22:37:01 +00001464 drm_mode_connector_update_edid_property(connector, edid);
1465 drm_add_edid_modes(connector, edid);
1466 }
Chris Wilson139467432011-02-09 20:01:16 +00001467
Chris Wilsonff482d82010-09-15 10:40:38 +01001468 connector->display_info.raw_edid = NULL;
1469 kfree(edid);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001470 }
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001471}
1472
1473/*
1474 * Set of SDVO TV modes.
1475 * Note! This is in reply order (see loop in get_tv_modes).
1476 * XXX: all 60Hz refresh?
1477 */
Chris Wilsonb1f559e2011-01-26 09:49:47 +00001478static const struct drm_display_mode sdvo_tv_modes[] = {
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001479 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1480 416, 0, 200, 201, 232, 233, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001481 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001482 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1483 416, 0, 240, 241, 272, 273, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001484 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001485 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1486 496, 0, 300, 301, 332, 333, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001487 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001488 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1489 736, 0, 350, 351, 382, 383, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001490 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001491 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1492 736, 0, 400, 401, 432, 433, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001493 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001494 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1495 736, 0, 480, 481, 512, 513, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001496 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001497 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1498 800, 0, 480, 481, 512, 513, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001499 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001500 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1501 800, 0, 576, 577, 608, 609, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001502 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001503 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1504 816, 0, 350, 351, 382, 383, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001505 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001506 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1507 816, 0, 400, 401, 432, 433, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001508 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001509 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1510 816, 0, 480, 481, 512, 513, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001511 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001512 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1513 816, 0, 540, 541, 572, 573, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001514 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001515 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1516 816, 0, 576, 577, 608, 609, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001517 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001518 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1519 864, 0, 576, 577, 608, 609, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001520 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001521 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1522 896, 0, 600, 601, 632, 633, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001523 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001524 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1525 928, 0, 624, 625, 656, 657, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001526 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001527 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1528 1016, 0, 766, 767, 798, 799, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001529 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001530 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1531 1120, 0, 768, 769, 800, 801, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001532 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001533 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1534 1376, 0, 1024, 1025, 1056, 1057, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001535 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1536};
1537
1538static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1539{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001540 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001541 struct intel_sdvo_sdtv_resolution_request tv_res;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001542 uint32_t reply = 0, format_map = 0;
1543 int i;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001544
1545 /* Read the list of supported input resolutions for the selected TV
1546 * format.
1547 */
Chris Wilson40039752010-08-04 13:50:26 +01001548 format_map = 1 << intel_sdvo->tv_format_index;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001549 memcpy(&tv_res, &format_map,
Chris Wilson32aad862010-08-04 13:50:25 +01001550 min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
Zhao Yakuice6feab2009-08-24 13:50:26 +08001551
Chris Wilson32aad862010-08-04 13:50:25 +01001552 if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1553 return;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001554
Chris Wilson32aad862010-08-04 13:50:25 +01001555 BUILD_BUG_ON(sizeof(tv_res) != 3);
Chris Wilsone957d772010-09-24 12:52:03 +01001556 if (!intel_sdvo_write_cmd(intel_sdvo,
1557 SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
Chris Wilson32aad862010-08-04 13:50:25 +01001558 &tv_res, sizeof(tv_res)))
1559 return;
1560 if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001561 return;
1562
1563 for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001564 if (reply & (1 << i)) {
1565 struct drm_display_mode *nmode;
1566 nmode = drm_mode_duplicate(connector->dev,
Chris Wilson32aad862010-08-04 13:50:25 +01001567 &sdvo_tv_modes[i]);
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001568 if (nmode)
1569 drm_mode_probed_add(connector, nmode);
1570 }
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001571}
1572
Ma Ling7086c872009-05-13 11:20:06 +08001573static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1574{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001575 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Ma Ling7086c872009-05-13 11:20:06 +08001576 struct drm_i915_private *dev_priv = connector->dev->dev_private;
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001577 struct drm_display_mode *newmode;
Ma Ling7086c872009-05-13 11:20:06 +08001578
1579 /*
1580 * Attempt to get the mode list from DDC.
1581 * Assume that the preferred modes are
1582 * arranged in priority order.
1583 */
Chris Wilsonf899fc62010-07-20 15:44:45 -07001584 intel_ddc_get_modes(connector, intel_sdvo->i2c);
Ma Ling7086c872009-05-13 11:20:06 +08001585 if (list_empty(&connector->probed_modes) == false)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001586 goto end;
Ma Ling7086c872009-05-13 11:20:06 +08001587
1588 /* Fetch modes from VBT */
1589 if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
Ma Ling7086c872009-05-13 11:20:06 +08001590 newmode = drm_mode_duplicate(connector->dev,
1591 dev_priv->sdvo_lvds_vbt_mode);
1592 if (newmode != NULL) {
1593 /* Guarantee the mode is preferred */
1594 newmode->type = (DRM_MODE_TYPE_PREFERRED |
1595 DRM_MODE_TYPE_DRIVER);
1596 drm_mode_probed_add(connector, newmode);
1597 }
1598 }
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001599
1600end:
1601 list_for_each_entry(newmode, &connector->probed_modes, head) {
1602 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001603 intel_sdvo->sdvo_lvds_fixed_mode =
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001604 drm_mode_duplicate(connector->dev, newmode);
Chris Wilson6c9547f2010-08-25 10:05:17 +01001605
Chris Wilson85454232010-08-08 14:28:23 +01001606 intel_sdvo->is_lvds = true;
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001607 break;
1608 }
1609 }
1610
Ma Ling7086c872009-05-13 11:20:06 +08001611}
1612
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001613static int intel_sdvo_get_modes(struct drm_connector *connector)
1614{
Chris Wilson615fb932010-08-04 13:50:24 +01001615 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001616
Chris Wilson615fb932010-08-04 13:50:24 +01001617 if (IS_TV(intel_sdvo_connector))
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001618 intel_sdvo_get_tv_modes(connector);
Chris Wilson615fb932010-08-04 13:50:24 +01001619 else if (IS_LVDS(intel_sdvo_connector))
Ma Ling7086c872009-05-13 11:20:06 +08001620 intel_sdvo_get_lvds_modes(connector);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001621 else
1622 intel_sdvo_get_ddc_modes(connector);
1623
Chris Wilson32aad862010-08-04 13:50:25 +01001624 return !list_empty(&connector->probed_modes);
Jesse Barnes79e53942008-11-07 14:24:08 -08001625}
1626
Chris Wilsonfcc8d672010-08-04 13:50:27 +01001627static void
1628intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
Zhao Yakuib9219c52009-09-10 15:45:46 +08001629{
Chris Wilson615fb932010-08-04 13:50:24 +01001630 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Zhao Yakuib9219c52009-09-10 15:45:46 +08001631 struct drm_device *dev = connector->dev;
1632
Chris Wilsonc5521702010-08-04 13:50:28 +01001633 if (intel_sdvo_connector->left)
1634 drm_property_destroy(dev, intel_sdvo_connector->left);
1635 if (intel_sdvo_connector->right)
1636 drm_property_destroy(dev, intel_sdvo_connector->right);
1637 if (intel_sdvo_connector->top)
1638 drm_property_destroy(dev, intel_sdvo_connector->top);
1639 if (intel_sdvo_connector->bottom)
1640 drm_property_destroy(dev, intel_sdvo_connector->bottom);
1641 if (intel_sdvo_connector->hpos)
1642 drm_property_destroy(dev, intel_sdvo_connector->hpos);
1643 if (intel_sdvo_connector->vpos)
1644 drm_property_destroy(dev, intel_sdvo_connector->vpos);
1645 if (intel_sdvo_connector->saturation)
1646 drm_property_destroy(dev, intel_sdvo_connector->saturation);
1647 if (intel_sdvo_connector->contrast)
1648 drm_property_destroy(dev, intel_sdvo_connector->contrast);
1649 if (intel_sdvo_connector->hue)
1650 drm_property_destroy(dev, intel_sdvo_connector->hue);
1651 if (intel_sdvo_connector->sharpness)
1652 drm_property_destroy(dev, intel_sdvo_connector->sharpness);
1653 if (intel_sdvo_connector->flicker_filter)
1654 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
1655 if (intel_sdvo_connector->flicker_filter_2d)
1656 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
1657 if (intel_sdvo_connector->flicker_filter_adaptive)
1658 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
1659 if (intel_sdvo_connector->tv_luma_filter)
1660 drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
1661 if (intel_sdvo_connector->tv_chroma_filter)
1662 drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
Chris Wilsone0442182010-08-04 13:50:29 +01001663 if (intel_sdvo_connector->dot_crawl)
1664 drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
Chris Wilsonc5521702010-08-04 13:50:28 +01001665 if (intel_sdvo_connector->brightness)
1666 drm_property_destroy(dev, intel_sdvo_connector->brightness);
Zhao Yakuib9219c52009-09-10 15:45:46 +08001667}
1668
Jesse Barnes79e53942008-11-07 14:24:08 -08001669static void intel_sdvo_destroy(struct drm_connector *connector)
1670{
Chris Wilson615fb932010-08-04 13:50:24 +01001671 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001672
Chris Wilsonc5521702010-08-04 13:50:28 +01001673 if (intel_sdvo_connector->tv_format)
Zhao Yakuice6feab2009-08-24 13:50:26 +08001674 drm_property_destroy(connector->dev,
Chris Wilsonc5521702010-08-04 13:50:28 +01001675 intel_sdvo_connector->tv_format);
Zhao Yakuice6feab2009-08-24 13:50:26 +08001676
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001677 intel_sdvo_destroy_enhance_property(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001678 drm_sysfs_connector_remove(connector);
1679 drm_connector_cleanup(connector);
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001680 kfree(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001681}
1682
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001683static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector)
1684{
1685 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1686 struct edid *edid;
1687 bool has_audio = false;
1688
1689 if (!intel_sdvo->is_hdmi)
1690 return false;
1691
1692 edid = intel_sdvo_get_edid(connector);
1693 if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL)
1694 has_audio = drm_detect_monitor_audio(edid);
Jani Nikula38ab8a22012-08-15 12:32:36 +03001695 kfree(edid);
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001696
1697 return has_audio;
1698}
1699
Zhao Yakuice6feab2009-08-24 13:50:26 +08001700static int
1701intel_sdvo_set_property(struct drm_connector *connector,
1702 struct drm_property *property,
1703 uint64_t val)
1704{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001705 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Chris Wilson615fb932010-08-04 13:50:24 +01001706 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Chris Wilsone953fd72011-02-21 22:23:52 +00001707 struct drm_i915_private *dev_priv = connector->dev->dev_private;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001708 uint16_t temp_value;
Chris Wilson32aad862010-08-04 13:50:25 +01001709 uint8_t cmd;
1710 int ret;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001711
1712 ret = drm_connector_property_set_value(connector, property, val);
Chris Wilson32aad862010-08-04 13:50:25 +01001713 if (ret)
1714 return ret;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001715
Chris Wilson3f43c482011-05-12 22:17:24 +01001716 if (property == dev_priv->force_audio_property) {
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001717 int i = val;
1718 bool has_audio;
1719
1720 if (i == intel_sdvo_connector->force_audio)
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001721 return 0;
1722
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001723 intel_sdvo_connector->force_audio = i;
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001724
Daniel Vetterc3e5f672012-02-23 17:14:47 +01001725 if (i == HDMI_AUDIO_AUTO)
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001726 has_audio = intel_sdvo_detect_hdmi_audio(connector);
1727 else
Daniel Vetterc3e5f672012-02-23 17:14:47 +01001728 has_audio = (i == HDMI_AUDIO_ON);
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001729
1730 if (has_audio == intel_sdvo->has_hdmi_audio)
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001731 return 0;
1732
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001733 intel_sdvo->has_hdmi_audio = has_audio;
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001734 goto done;
1735 }
1736
Chris Wilsone953fd72011-02-21 22:23:52 +00001737 if (property == dev_priv->broadcast_rgb_property) {
1738 if (val == !!intel_sdvo->color_range)
1739 return 0;
1740
1741 intel_sdvo->color_range = val ? SDVO_COLOR_RANGE_16_235 : 0;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001742 goto done;
1743 }
1744
Chris Wilsonc5521702010-08-04 13:50:28 +01001745#define CHECK_PROPERTY(name, NAME) \
1746 if (intel_sdvo_connector->name == property) { \
1747 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
1748 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
1749 cmd = SDVO_CMD_SET_##NAME; \
1750 intel_sdvo_connector->cur_##name = temp_value; \
1751 goto set_value; \
1752 }
1753
1754 if (property == intel_sdvo_connector->tv_format) {
Chris Wilson32aad862010-08-04 13:50:25 +01001755 if (val >= TV_FORMAT_NUM)
1756 return -EINVAL;
1757
Chris Wilson40039752010-08-04 13:50:26 +01001758 if (intel_sdvo->tv_format_index ==
Chris Wilson615fb932010-08-04 13:50:24 +01001759 intel_sdvo_connector->tv_format_supported[val])
Chris Wilson32aad862010-08-04 13:50:25 +01001760 return 0;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001761
Chris Wilson40039752010-08-04 13:50:26 +01001762 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
Chris Wilsonc5521702010-08-04 13:50:28 +01001763 goto done;
Chris Wilson32aad862010-08-04 13:50:25 +01001764 } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001765 temp_value = val;
Chris Wilsonc5521702010-08-04 13:50:28 +01001766 if (intel_sdvo_connector->left == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001767 drm_connector_property_set_value(connector,
Chris Wilsonc5521702010-08-04 13:50:28 +01001768 intel_sdvo_connector->right, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001769 if (intel_sdvo_connector->left_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001770 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001771
Chris Wilson615fb932010-08-04 13:50:24 +01001772 intel_sdvo_connector->left_margin = temp_value;
1773 intel_sdvo_connector->right_margin = temp_value;
1774 temp_value = intel_sdvo_connector->max_hscan -
Chris Wilsonc5521702010-08-04 13:50:28 +01001775 intel_sdvo_connector->left_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001776 cmd = SDVO_CMD_SET_OVERSCAN_H;
Chris Wilsonc5521702010-08-04 13:50:28 +01001777 goto set_value;
1778 } else if (intel_sdvo_connector->right == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001779 drm_connector_property_set_value(connector,
Chris Wilsonc5521702010-08-04 13:50:28 +01001780 intel_sdvo_connector->left, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001781 if (intel_sdvo_connector->right_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001782 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001783
Chris Wilson615fb932010-08-04 13:50:24 +01001784 intel_sdvo_connector->left_margin = temp_value;
1785 intel_sdvo_connector->right_margin = temp_value;
1786 temp_value = intel_sdvo_connector->max_hscan -
1787 intel_sdvo_connector->left_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001788 cmd = SDVO_CMD_SET_OVERSCAN_H;
Chris Wilsonc5521702010-08-04 13:50:28 +01001789 goto set_value;
1790 } else if (intel_sdvo_connector->top == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001791 drm_connector_property_set_value(connector,
Chris Wilsonc5521702010-08-04 13:50:28 +01001792 intel_sdvo_connector->bottom, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001793 if (intel_sdvo_connector->top_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001794 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001795
Chris Wilson615fb932010-08-04 13:50:24 +01001796 intel_sdvo_connector->top_margin = temp_value;
1797 intel_sdvo_connector->bottom_margin = temp_value;
1798 temp_value = intel_sdvo_connector->max_vscan -
Chris Wilsonc5521702010-08-04 13:50:28 +01001799 intel_sdvo_connector->top_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001800 cmd = SDVO_CMD_SET_OVERSCAN_V;
Chris Wilsonc5521702010-08-04 13:50:28 +01001801 goto set_value;
1802 } else if (intel_sdvo_connector->bottom == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001803 drm_connector_property_set_value(connector,
Chris Wilsonc5521702010-08-04 13:50:28 +01001804 intel_sdvo_connector->top, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001805 if (intel_sdvo_connector->bottom_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001806 return 0;
1807
Chris Wilson615fb932010-08-04 13:50:24 +01001808 intel_sdvo_connector->top_margin = temp_value;
1809 intel_sdvo_connector->bottom_margin = temp_value;
1810 temp_value = intel_sdvo_connector->max_vscan -
Chris Wilsonc5521702010-08-04 13:50:28 +01001811 intel_sdvo_connector->top_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001812 cmd = SDVO_CMD_SET_OVERSCAN_V;
Chris Wilsonc5521702010-08-04 13:50:28 +01001813 goto set_value;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001814 }
Chris Wilsonc5521702010-08-04 13:50:28 +01001815 CHECK_PROPERTY(hpos, HPOS)
1816 CHECK_PROPERTY(vpos, VPOS)
1817 CHECK_PROPERTY(saturation, SATURATION)
1818 CHECK_PROPERTY(contrast, CONTRAST)
1819 CHECK_PROPERTY(hue, HUE)
1820 CHECK_PROPERTY(brightness, BRIGHTNESS)
1821 CHECK_PROPERTY(sharpness, SHARPNESS)
1822 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
1823 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
1824 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
1825 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
1826 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
Chris Wilsone0442182010-08-04 13:50:29 +01001827 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
Zhao Yakuib9219c52009-09-10 15:45:46 +08001828 }
Chris Wilsonc5521702010-08-04 13:50:28 +01001829
1830 return -EINVAL; /* unknown property */
1831
1832set_value:
1833 if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
1834 return -EIO;
1835
1836
1837done:
Chris Wilsondf0e9242010-09-09 16:20:55 +01001838 if (intel_sdvo->base.base.crtc) {
1839 struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001840 drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x,
Chris Wilsonc5521702010-08-04 13:50:28 +01001841 crtc->y, crtc->fb);
1842 }
1843
Chris Wilson32aad862010-08-04 13:50:25 +01001844 return 0;
Chris Wilsonc5521702010-08-04 13:50:28 +01001845#undef CHECK_PROPERTY
Zhao Yakuice6feab2009-08-24 13:50:26 +08001846}
1847
Jesse Barnes79e53942008-11-07 14:24:08 -08001848static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = {
1849 .dpms = intel_sdvo_dpms,
1850 .mode_fixup = intel_sdvo_mode_fixup,
1851 .prepare = intel_encoder_prepare,
1852 .mode_set = intel_sdvo_mode_set,
1853 .commit = intel_encoder_commit,
1854};
1855
1856static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
Keith Packardc9fb15f2009-05-30 20:42:28 -07001857 .dpms = drm_helper_connector_dpms,
Jesse Barnes79e53942008-11-07 14:24:08 -08001858 .detect = intel_sdvo_detect,
1859 .fill_modes = drm_helper_probe_single_connector_modes,
Zhao Yakuice6feab2009-08-24 13:50:26 +08001860 .set_property = intel_sdvo_set_property,
Jesse Barnes79e53942008-11-07 14:24:08 -08001861 .destroy = intel_sdvo_destroy,
1862};
1863
1864static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
1865 .get_modes = intel_sdvo_get_modes,
1866 .mode_valid = intel_sdvo_mode_valid,
Chris Wilsondf0e9242010-09-09 16:20:55 +01001867 .best_encoder = intel_best_encoder,
Jesse Barnes79e53942008-11-07 14:24:08 -08001868};
1869
Hannes Ederb358d0a2008-12-18 21:18:47 +01001870static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
Jesse Barnes79e53942008-11-07 14:24:08 -08001871{
Chris Wilson890f3352010-09-14 16:46:59 +01001872 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001873
Chris Wilsonea5b2132010-08-04 13:50:23 +01001874 if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001875 drm_mode_destroy(encoder->dev,
Chris Wilsonea5b2132010-08-04 13:50:23 +01001876 intel_sdvo->sdvo_lvds_fixed_mode);
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001877
Chris Wilsone957d772010-09-24 12:52:03 +01001878 i2c_del_adapter(&intel_sdvo->ddc);
Chris Wilsonea5b2132010-08-04 13:50:23 +01001879 intel_encoder_destroy(encoder);
Jesse Barnes79e53942008-11-07 14:24:08 -08001880}
1881
1882static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
1883 .destroy = intel_sdvo_enc_destroy,
1884};
1885
Chris Wilsonb66d8422010-08-12 15:26:41 +01001886static void
1887intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
1888{
1889 uint16_t mask = 0;
1890 unsigned int num_bits;
1891
1892 /* Make a mask of outputs less than or equal to our own priority in the
1893 * list.
1894 */
1895 switch (sdvo->controlled_output) {
1896 case SDVO_OUTPUT_LVDS1:
1897 mask |= SDVO_OUTPUT_LVDS1;
1898 case SDVO_OUTPUT_LVDS0:
1899 mask |= SDVO_OUTPUT_LVDS0;
1900 case SDVO_OUTPUT_TMDS1:
1901 mask |= SDVO_OUTPUT_TMDS1;
1902 case SDVO_OUTPUT_TMDS0:
1903 mask |= SDVO_OUTPUT_TMDS0;
1904 case SDVO_OUTPUT_RGB1:
1905 mask |= SDVO_OUTPUT_RGB1;
1906 case SDVO_OUTPUT_RGB0:
1907 mask |= SDVO_OUTPUT_RGB0;
1908 break;
1909 }
1910
1911 /* Count bits to find what number we are in the priority list. */
1912 mask &= sdvo->caps.output_flags;
1913 num_bits = hweight16(mask);
1914 /* If more than 3 outputs, default to DDC bus 3 for now. */
1915 if (num_bits > 3)
1916 num_bits = 3;
1917
1918 /* Corresponds to SDVO_CONTROL_BUS_DDCx */
1919 sdvo->ddc_bus = 1 << num_bits;
1920}
Jesse Barnes79e53942008-11-07 14:24:08 -08001921
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001922/**
1923 * Choose the appropriate DDC bus for control bus switch command for this
1924 * SDVO output based on the controlled output.
1925 *
1926 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
1927 * outputs, then LVDS outputs.
1928 */
1929static void
Adam Jacksonb1083332010-04-23 16:07:40 -04001930intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
Chris Wilsonea5b2132010-08-04 13:50:23 +01001931 struct intel_sdvo *sdvo, u32 reg)
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001932{
Adam Jacksonb1083332010-04-23 16:07:40 -04001933 struct sdvo_device_mapping *mapping;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001934
Daniel Vettereef4eac2012-03-23 23:43:35 +01001935 if (sdvo->is_sdvob)
Adam Jacksonb1083332010-04-23 16:07:40 -04001936 mapping = &(dev_priv->sdvo_mappings[0]);
1937 else
1938 mapping = &(dev_priv->sdvo_mappings[1]);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001939
Chris Wilsonb66d8422010-08-12 15:26:41 +01001940 if (mapping->initialized)
1941 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
1942 else
1943 intel_sdvo_guess_ddc_bus(sdvo);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001944}
1945
Chris Wilsone957d772010-09-24 12:52:03 +01001946static void
1947intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
1948 struct intel_sdvo *sdvo, u32 reg)
1949{
1950 struct sdvo_device_mapping *mapping;
Adam Jackson46eb3032011-06-16 16:36:23 -04001951 u8 pin;
Chris Wilsone957d772010-09-24 12:52:03 +01001952
Daniel Vettereef4eac2012-03-23 23:43:35 +01001953 if (sdvo->is_sdvob)
Chris Wilsone957d772010-09-24 12:52:03 +01001954 mapping = &dev_priv->sdvo_mappings[0];
1955 else
1956 mapping = &dev_priv->sdvo_mappings[1];
1957
1958 pin = GMBUS_PORT_DPB;
Adam Jackson46eb3032011-06-16 16:36:23 -04001959 if (mapping->initialized)
Chris Wilsone957d772010-09-24 12:52:03 +01001960 pin = mapping->i2c_pin;
Chris Wilsone957d772010-09-24 12:52:03 +01001961
Daniel Kurtz3bd7d902012-03-28 02:36:14 +08001962 if (intel_gmbus_is_port_valid(pin)) {
1963 sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin);
Adam Jacksond5090b92011-06-16 16:36:28 -04001964 intel_gmbus_set_speed(sdvo->i2c, GMBUS_RATE_1MHZ);
Chris Wilson63abf3e2010-12-08 16:48:21 +00001965 intel_gmbus_force_bit(sdvo->i2c, true);
Adam Jackson46eb3032011-06-16 16:36:23 -04001966 } else {
Daniel Kurtz3bd7d902012-03-28 02:36:14 +08001967 sdvo->i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPB);
Adam Jackson46eb3032011-06-16 16:36:23 -04001968 }
Chris Wilsone957d772010-09-24 12:52:03 +01001969}
1970
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001971static bool
Chris Wilsone27d8532010-10-22 09:15:22 +01001972intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001973{
Chris Wilson97aaf912011-01-04 20:10:52 +00001974 return intel_sdvo_check_supp_encode(intel_sdvo);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001975}
1976
yakui_zhao714605e2009-05-31 17:18:07 +08001977static u8
Daniel Vettereef4eac2012-03-23 23:43:35 +01001978intel_sdvo_get_slave_addr(struct drm_device *dev, struct intel_sdvo *sdvo)
yakui_zhao714605e2009-05-31 17:18:07 +08001979{
1980 struct drm_i915_private *dev_priv = dev->dev_private;
1981 struct sdvo_device_mapping *my_mapping, *other_mapping;
1982
Daniel Vettereef4eac2012-03-23 23:43:35 +01001983 if (sdvo->is_sdvob) {
yakui_zhao714605e2009-05-31 17:18:07 +08001984 my_mapping = &dev_priv->sdvo_mappings[0];
1985 other_mapping = &dev_priv->sdvo_mappings[1];
1986 } else {
1987 my_mapping = &dev_priv->sdvo_mappings[1];
1988 other_mapping = &dev_priv->sdvo_mappings[0];
1989 }
1990
1991 /* If the BIOS described our SDVO device, take advantage of it. */
1992 if (my_mapping->slave_addr)
1993 return my_mapping->slave_addr;
1994
1995 /* If the BIOS only described a different SDVO device, use the
1996 * address that it isn't using.
1997 */
1998 if (other_mapping->slave_addr) {
1999 if (other_mapping->slave_addr == 0x70)
2000 return 0x72;
2001 else
2002 return 0x70;
2003 }
2004
2005 /* No SDVO device info is found for another DVO port,
2006 * so use mapping assumption we had before BIOS parsing.
2007 */
Daniel Vettereef4eac2012-03-23 23:43:35 +01002008 if (sdvo->is_sdvob)
yakui_zhao714605e2009-05-31 17:18:07 +08002009 return 0x70;
2010 else
2011 return 0x72;
2012}
2013
Zhenyu Wang14571b42010-03-30 14:06:33 +08002014static void
Chris Wilsondf0e9242010-09-09 16:20:55 +01002015intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
2016 struct intel_sdvo *encoder)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002017{
Chris Wilsondf0e9242010-09-09 16:20:55 +01002018 drm_connector_init(encoder->base.base.dev,
2019 &connector->base.base,
2020 &intel_sdvo_connector_funcs,
2021 connector->base.base.connector_type);
Zhao Yakui6070a4a2010-02-08 21:35:12 +08002022
Chris Wilsondf0e9242010-09-09 16:20:55 +01002023 drm_connector_helper_add(&connector->base.base,
2024 &intel_sdvo_connector_helper_funcs);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002025
Peter Ross8f4839e2012-01-28 14:49:25 +01002026 connector->base.base.interlace_allowed = 1;
Chris Wilsondf0e9242010-09-09 16:20:55 +01002027 connector->base.base.doublescan_allowed = 0;
2028 connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002029
Chris Wilsondf0e9242010-09-09 16:20:55 +01002030 intel_connector_attach_encoder(&connector->base, &encoder->base);
2031 drm_sysfs_connector_add(&connector->base.base);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002032}
2033
Chris Wilson7f36e7e2010-09-19 09:29:33 +01002034static void
2035intel_sdvo_add_hdmi_properties(struct intel_sdvo_connector *connector)
2036{
2037 struct drm_device *dev = connector->base.base.dev;
2038
Chris Wilson3f43c482011-05-12 22:17:24 +01002039 intel_attach_force_audio_property(&connector->base.base);
Chris Wilsone953fd72011-02-21 22:23:52 +00002040 if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev))
2041 intel_attach_broadcast_rgb_property(&connector->base.base);
Chris Wilson7f36e7e2010-09-19 09:29:33 +01002042}
2043
Zhenyu Wang14571b42010-03-30 14:06:33 +08002044static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002045intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002046{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002047 struct drm_encoder *encoder = &intel_sdvo->base.base;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002048 struct drm_connector *connector;
Simon Farnsworthcc68c812011-09-21 17:13:30 +01002049 struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002050 struct intel_connector *intel_connector;
Chris Wilson615fb932010-08-04 13:50:24 +01002051 struct intel_sdvo_connector *intel_sdvo_connector;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002052
Chris Wilson615fb932010-08-04 13:50:24 +01002053 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2054 if (!intel_sdvo_connector)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002055 return false;
2056
Zhenyu Wang14571b42010-03-30 14:06:33 +08002057 if (device == 0) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01002058 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
Chris Wilson615fb932010-08-04 13:50:24 +01002059 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002060 } else if (device == 1) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01002061 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
Chris Wilson615fb932010-08-04 13:50:24 +01002062 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002063 }
2064
Chris Wilson615fb932010-08-04 13:50:24 +01002065 intel_connector = &intel_sdvo_connector->base;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002066 connector = &intel_connector->base;
Simon Farnsworthcc68c812011-09-21 17:13:30 +01002067 if (intel_sdvo_supports_hotplug(intel_sdvo) & (1 << device)) {
2068 connector->polled = DRM_CONNECTOR_POLL_HPD;
2069 intel_sdvo->hotplug_active[0] |= 1 << device;
2070 /* Some SDVO devices have one-shot hotplug interrupts.
2071 * Ensure that they get re-enabled when an interrupt happens.
2072 */
2073 intel_encoder->hot_plug = intel_sdvo_enable_hotplug;
2074 intel_sdvo_enable_hotplug(intel_encoder);
2075 }
2076 else
2077 connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002078 encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2079 connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2080
Chris Wilsone27d8532010-10-22 09:15:22 +01002081 if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
Zhenyu Wang14571b42010-03-30 14:06:33 +08002082 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
Chris Wilsone27d8532010-10-22 09:15:22 +01002083 intel_sdvo->is_hdmi = true;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002084 }
Chris Wilsonea5b2132010-08-04 13:50:23 +01002085 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2086 (1 << INTEL_ANALOG_CLONE_BIT));
Zhenyu Wang14571b42010-03-30 14:06:33 +08002087
Chris Wilsondf0e9242010-09-09 16:20:55 +01002088 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
Chris Wilsonf797d222010-12-23 09:43:48 +00002089 if (intel_sdvo->is_hdmi)
2090 intel_sdvo_add_hdmi_properties(intel_sdvo_connector);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002091
2092 return true;
2093}
2094
2095static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002096intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002097{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002098 struct drm_encoder *encoder = &intel_sdvo->base.base;
2099 struct drm_connector *connector;
2100 struct intel_connector *intel_connector;
2101 struct intel_sdvo_connector *intel_sdvo_connector;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002102
Chris Wilson615fb932010-08-04 13:50:24 +01002103 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2104 if (!intel_sdvo_connector)
2105 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002106
Chris Wilson615fb932010-08-04 13:50:24 +01002107 intel_connector = &intel_sdvo_connector->base;
Chris Wilson4ef69c72010-09-09 15:14:28 +01002108 connector = &intel_connector->base;
2109 encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2110 connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002111
Chris Wilson4ef69c72010-09-09 15:14:28 +01002112 intel_sdvo->controlled_output |= type;
2113 intel_sdvo_connector->output_flag = type;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002114
Chris Wilson4ef69c72010-09-09 15:14:28 +01002115 intel_sdvo->is_tv = true;
2116 intel_sdvo->base.needs_tv_clock = true;
2117 intel_sdvo->base.clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002118
Chris Wilsondf0e9242010-09-09 16:20:55 +01002119 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002120
Chris Wilson4ef69c72010-09-09 15:14:28 +01002121 if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
Chris Wilson32aad862010-08-04 13:50:25 +01002122 goto err;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002123
Chris Wilson4ef69c72010-09-09 15:14:28 +01002124 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
Chris Wilson32aad862010-08-04 13:50:25 +01002125 goto err;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002126
Chris Wilson4ef69c72010-09-09 15:14:28 +01002127 return true;
Chris Wilson32aad862010-08-04 13:50:25 +01002128
2129err:
Chris Wilson123d5c02010-09-23 16:15:21 +01002130 intel_sdvo_destroy(connector);
Chris Wilson32aad862010-08-04 13:50:25 +01002131 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002132}
2133
2134static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002135intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002136{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002137 struct drm_encoder *encoder = &intel_sdvo->base.base;
2138 struct drm_connector *connector;
2139 struct intel_connector *intel_connector;
2140 struct intel_sdvo_connector *intel_sdvo_connector;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002141
Chris Wilson615fb932010-08-04 13:50:24 +01002142 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2143 if (!intel_sdvo_connector)
2144 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002145
Chris Wilson615fb932010-08-04 13:50:24 +01002146 intel_connector = &intel_sdvo_connector->base;
2147 connector = &intel_connector->base;
Chris Wilson4ef69c72010-09-09 15:14:28 +01002148 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2149 encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2150 connector->connector_type = DRM_MODE_CONNECTOR_VGA;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002151
Chris Wilson4ef69c72010-09-09 15:14:28 +01002152 if (device == 0) {
2153 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2154 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2155 } else if (device == 1) {
2156 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2157 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2158 }
Zhenyu Wang14571b42010-03-30 14:06:33 +08002159
Chris Wilson4ef69c72010-09-09 15:14:28 +01002160 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2161 (1 << INTEL_ANALOG_CLONE_BIT));
2162
Chris Wilsondf0e9242010-09-09 16:20:55 +01002163 intel_sdvo_connector_init(intel_sdvo_connector,
2164 intel_sdvo);
Chris Wilson4ef69c72010-09-09 15:14:28 +01002165 return true;
2166}
2167
2168static bool
2169intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2170{
2171 struct drm_encoder *encoder = &intel_sdvo->base.base;
2172 struct drm_connector *connector;
2173 struct intel_connector *intel_connector;
2174 struct intel_sdvo_connector *intel_sdvo_connector;
2175
2176 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2177 if (!intel_sdvo_connector)
2178 return false;
2179
2180 intel_connector = &intel_sdvo_connector->base;
2181 connector = &intel_connector->base;
2182 encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2183 connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2184
2185 if (device == 0) {
2186 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2187 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2188 } else if (device == 1) {
2189 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2190 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2191 }
2192
2193 intel_sdvo->base.clone_mask = ((1 << INTEL_ANALOG_CLONE_BIT) |
Chris Wilsonea5b2132010-08-04 13:50:23 +01002194 (1 << INTEL_SDVO_LVDS_CLONE_BIT));
Zhenyu Wang14571b42010-03-30 14:06:33 +08002195
Chris Wilsondf0e9242010-09-09 16:20:55 +01002196 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
Chris Wilson4ef69c72010-09-09 15:14:28 +01002197 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
Chris Wilson32aad862010-08-04 13:50:25 +01002198 goto err;
2199
2200 return true;
2201
2202err:
Chris Wilson123d5c02010-09-23 16:15:21 +01002203 intel_sdvo_destroy(connector);
Chris Wilson32aad862010-08-04 13:50:25 +01002204 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002205}
Zhao Yakui6070a4a2010-02-08 21:35:12 +08002206
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002207static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002208intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002209{
Chris Wilsonea5b2132010-08-04 13:50:23 +01002210 intel_sdvo->is_tv = false;
2211 intel_sdvo->base.needs_tv_clock = false;
2212 intel_sdvo->is_lvds = false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002213
Zhenyu Wang14571b42010-03-30 14:06:33 +08002214 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002215
Zhenyu Wang14571b42010-03-30 14:06:33 +08002216 if (flags & SDVO_OUTPUT_TMDS0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002217 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002218 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002219
Zhenyu Wang14571b42010-03-30 14:06:33 +08002220 if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002221 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002222 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002223
Zhenyu Wang14571b42010-03-30 14:06:33 +08002224 /* TV has no XXX1 function block */
Zhenyu Wanga1f4b7ff2010-03-29 23:16:13 +08002225 if (flags & SDVO_OUTPUT_SVID0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002226 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002227 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002228
Zhenyu Wang14571b42010-03-30 14:06:33 +08002229 if (flags & SDVO_OUTPUT_CVBS0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002230 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002231 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002232
Chris Wilsona0b1c7a2011-09-30 22:56:41 +01002233 if (flags & SDVO_OUTPUT_YPRPB0)
2234 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0))
2235 return false;
2236
Zhenyu Wang14571b42010-03-30 14:06:33 +08002237 if (flags & SDVO_OUTPUT_RGB0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002238 if (!intel_sdvo_analog_init(intel_sdvo, 0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002239 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002240
Zhenyu Wang14571b42010-03-30 14:06:33 +08002241 if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002242 if (!intel_sdvo_analog_init(intel_sdvo, 1))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002243 return false;
Zhao Yakui2dd87382010-01-27 16:32:46 +08002244
Zhenyu Wang14571b42010-03-30 14:06:33 +08002245 if (flags & SDVO_OUTPUT_LVDS0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002246 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002247 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002248
Zhenyu Wang14571b42010-03-30 14:06:33 +08002249 if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002250 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002251 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002252
Zhenyu Wang14571b42010-03-30 14:06:33 +08002253 if ((flags & SDVO_OUTPUT_MASK) == 0) {
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002254 unsigned char bytes[2];
2255
Chris Wilsonea5b2132010-08-04 13:50:23 +01002256 intel_sdvo->controlled_output = 0;
2257 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
Dave Airlie51c8b402009-08-20 13:38:04 +10002258 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
Chris Wilsonea5b2132010-08-04 13:50:23 +01002259 SDVO_NAME(intel_sdvo),
Dave Airlie51c8b402009-08-20 13:38:04 +10002260 bytes[0], bytes[1]);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002261 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002262 }
Jesse Barnes27f82272011-09-02 12:54:37 -07002263 intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002264
Zhenyu Wang14571b42010-03-30 14:06:33 +08002265 return true;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002266}
2267
Chris Wilson32aad862010-08-04 13:50:25 +01002268static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2269 struct intel_sdvo_connector *intel_sdvo_connector,
2270 int type)
Zhao Yakuice6feab2009-08-24 13:50:26 +08002271{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002272 struct drm_device *dev = intel_sdvo->base.base.dev;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002273 struct intel_sdvo_tv_format format;
2274 uint32_t format_map, i;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002275
Chris Wilson32aad862010-08-04 13:50:25 +01002276 if (!intel_sdvo_set_target_output(intel_sdvo, type))
2277 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002278
Chris Wilson1a3665c2011-01-25 13:59:37 +00002279 BUILD_BUG_ON(sizeof(format) != 6);
Chris Wilson32aad862010-08-04 13:50:25 +01002280 if (!intel_sdvo_get_value(intel_sdvo,
2281 SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2282 &format, sizeof(format)))
2283 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002284
Chris Wilson32aad862010-08-04 13:50:25 +01002285 memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
Zhao Yakuice6feab2009-08-24 13:50:26 +08002286
2287 if (format_map == 0)
Chris Wilson32aad862010-08-04 13:50:25 +01002288 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002289
Chris Wilson615fb932010-08-04 13:50:24 +01002290 intel_sdvo_connector->format_supported_num = 0;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002291 for (i = 0 ; i < TV_FORMAT_NUM; i++)
Chris Wilson40039752010-08-04 13:50:26 +01002292 if (format_map & (1 << i))
2293 intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002294
2295
Chris Wilsonc5521702010-08-04 13:50:28 +01002296 intel_sdvo_connector->tv_format =
Chris Wilson32aad862010-08-04 13:50:25 +01002297 drm_property_create(dev, DRM_MODE_PROP_ENUM,
2298 "mode", intel_sdvo_connector->format_supported_num);
Chris Wilsonc5521702010-08-04 13:50:28 +01002299 if (!intel_sdvo_connector->tv_format)
Chris Wilsonfcc8d672010-08-04 13:50:27 +01002300 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002301
Chris Wilson615fb932010-08-04 13:50:24 +01002302 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
Zhao Yakuice6feab2009-08-24 13:50:26 +08002303 drm_property_add_enum(
Chris Wilsonc5521702010-08-04 13:50:28 +01002304 intel_sdvo_connector->tv_format, i,
Chris Wilson40039752010-08-04 13:50:26 +01002305 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
Zhao Yakuice6feab2009-08-24 13:50:26 +08002306
Chris Wilson40039752010-08-04 13:50:26 +01002307 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
Chris Wilson32aad862010-08-04 13:50:25 +01002308 drm_connector_attach_property(&intel_sdvo_connector->base.base,
Chris Wilsonc5521702010-08-04 13:50:28 +01002309 intel_sdvo_connector->tv_format, 0);
Chris Wilson32aad862010-08-04 13:50:25 +01002310 return true;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002311
2312}
2313
Chris Wilsonc5521702010-08-04 13:50:28 +01002314#define ENHANCEMENT(name, NAME) do { \
2315 if (enhancements.name) { \
2316 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2317 !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2318 return false; \
2319 intel_sdvo_connector->max_##name = data_value[0]; \
2320 intel_sdvo_connector->cur_##name = response; \
2321 intel_sdvo_connector->name = \
Sascha Hauerd9bc3c02012-02-06 10:58:18 +01002322 drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
Chris Wilsonc5521702010-08-04 13:50:28 +01002323 if (!intel_sdvo_connector->name) return false; \
Chris Wilsonc5521702010-08-04 13:50:28 +01002324 drm_connector_attach_property(connector, \
2325 intel_sdvo_connector->name, \
2326 intel_sdvo_connector->cur_##name); \
2327 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2328 data_value[0], data_value[1], response); \
2329 } \
Akshay Joshi0206e352011-08-16 15:34:10 -04002330} while (0)
Chris Wilsonc5521702010-08-04 13:50:28 +01002331
2332static bool
2333intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2334 struct intel_sdvo_connector *intel_sdvo_connector,
2335 struct intel_sdvo_enhancements_reply enhancements)
Zhao Yakuib9219c52009-09-10 15:45:46 +08002336{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002337 struct drm_device *dev = intel_sdvo->base.base.dev;
Chris Wilson32aad862010-08-04 13:50:25 +01002338 struct drm_connector *connector = &intel_sdvo_connector->base.base;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002339 uint16_t response, data_value[2];
2340
Chris Wilsonc5521702010-08-04 13:50:28 +01002341 /* when horizontal overscan is supported, Add the left/right property */
2342 if (enhancements.overscan_h) {
2343 if (!intel_sdvo_get_value(intel_sdvo,
2344 SDVO_CMD_GET_MAX_OVERSCAN_H,
2345 &data_value, 4))
2346 return false;
2347
2348 if (!intel_sdvo_get_value(intel_sdvo,
2349 SDVO_CMD_GET_OVERSCAN_H,
2350 &response, 2))
2351 return false;
2352
2353 intel_sdvo_connector->max_hscan = data_value[0];
2354 intel_sdvo_connector->left_margin = data_value[0] - response;
2355 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
2356 intel_sdvo_connector->left =
Sascha Hauerd9bc3c02012-02-06 10:58:18 +01002357 drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
Chris Wilsonc5521702010-08-04 13:50:28 +01002358 if (!intel_sdvo_connector->left)
2359 return false;
2360
Chris Wilsonc5521702010-08-04 13:50:28 +01002361 drm_connector_attach_property(connector,
2362 intel_sdvo_connector->left,
2363 intel_sdvo_connector->left_margin);
2364
2365 intel_sdvo_connector->right =
Sascha Hauerd9bc3c02012-02-06 10:58:18 +01002366 drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
Chris Wilsonc5521702010-08-04 13:50:28 +01002367 if (!intel_sdvo_connector->right)
2368 return false;
2369
Chris Wilsonc5521702010-08-04 13:50:28 +01002370 drm_connector_attach_property(connector,
2371 intel_sdvo_connector->right,
2372 intel_sdvo_connector->right_margin);
2373 DRM_DEBUG_KMS("h_overscan: max %d, "
2374 "default %d, current %d\n",
2375 data_value[0], data_value[1], response);
2376 }
2377
2378 if (enhancements.overscan_v) {
2379 if (!intel_sdvo_get_value(intel_sdvo,
2380 SDVO_CMD_GET_MAX_OVERSCAN_V,
2381 &data_value, 4))
2382 return false;
2383
2384 if (!intel_sdvo_get_value(intel_sdvo,
2385 SDVO_CMD_GET_OVERSCAN_V,
2386 &response, 2))
2387 return false;
2388
2389 intel_sdvo_connector->max_vscan = data_value[0];
2390 intel_sdvo_connector->top_margin = data_value[0] - response;
2391 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
2392 intel_sdvo_connector->top =
Sascha Hauerd9bc3c02012-02-06 10:58:18 +01002393 drm_property_create_range(dev, 0,
2394 "top_margin", 0, data_value[0]);
Chris Wilsonc5521702010-08-04 13:50:28 +01002395 if (!intel_sdvo_connector->top)
2396 return false;
2397
Chris Wilsonc5521702010-08-04 13:50:28 +01002398 drm_connector_attach_property(connector,
2399 intel_sdvo_connector->top,
2400 intel_sdvo_connector->top_margin);
2401
2402 intel_sdvo_connector->bottom =
Sascha Hauerd9bc3c02012-02-06 10:58:18 +01002403 drm_property_create_range(dev, 0,
2404 "bottom_margin", 0, data_value[0]);
Chris Wilsonc5521702010-08-04 13:50:28 +01002405 if (!intel_sdvo_connector->bottom)
2406 return false;
2407
Chris Wilsonc5521702010-08-04 13:50:28 +01002408 drm_connector_attach_property(connector,
2409 intel_sdvo_connector->bottom,
2410 intel_sdvo_connector->bottom_margin);
2411 DRM_DEBUG_KMS("v_overscan: max %d, "
2412 "default %d, current %d\n",
2413 data_value[0], data_value[1], response);
2414 }
2415
2416 ENHANCEMENT(hpos, HPOS);
2417 ENHANCEMENT(vpos, VPOS);
2418 ENHANCEMENT(saturation, SATURATION);
2419 ENHANCEMENT(contrast, CONTRAST);
2420 ENHANCEMENT(hue, HUE);
2421 ENHANCEMENT(sharpness, SHARPNESS);
2422 ENHANCEMENT(brightness, BRIGHTNESS);
2423 ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2424 ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2425 ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2426 ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2427 ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2428
Chris Wilsone0442182010-08-04 13:50:29 +01002429 if (enhancements.dot_crawl) {
2430 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2431 return false;
2432
2433 intel_sdvo_connector->max_dot_crawl = 1;
2434 intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2435 intel_sdvo_connector->dot_crawl =
Sascha Hauerd9bc3c02012-02-06 10:58:18 +01002436 drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
Chris Wilsone0442182010-08-04 13:50:29 +01002437 if (!intel_sdvo_connector->dot_crawl)
2438 return false;
2439
Chris Wilsone0442182010-08-04 13:50:29 +01002440 drm_connector_attach_property(connector,
2441 intel_sdvo_connector->dot_crawl,
2442 intel_sdvo_connector->cur_dot_crawl);
2443 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2444 }
2445
Chris Wilsonc5521702010-08-04 13:50:28 +01002446 return true;
2447}
2448
2449static bool
2450intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2451 struct intel_sdvo_connector *intel_sdvo_connector,
2452 struct intel_sdvo_enhancements_reply enhancements)
2453{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002454 struct drm_device *dev = intel_sdvo->base.base.dev;
Chris Wilsonc5521702010-08-04 13:50:28 +01002455 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2456 uint16_t response, data_value[2];
2457
2458 ENHANCEMENT(brightness, BRIGHTNESS);
2459
2460 return true;
2461}
2462#undef ENHANCEMENT
2463
2464static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2465 struct intel_sdvo_connector *intel_sdvo_connector)
2466{
2467 union {
2468 struct intel_sdvo_enhancements_reply reply;
2469 uint16_t response;
2470 } enhancements;
2471
Chris Wilson1a3665c2011-01-25 13:59:37 +00002472 BUILD_BUG_ON(sizeof(enhancements) != 2);
2473
Chris Wilsoncf9a2f32010-09-23 16:17:33 +01002474 enhancements.response = 0;
2475 intel_sdvo_get_value(intel_sdvo,
2476 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2477 &enhancements, sizeof(enhancements));
Chris Wilsonc5521702010-08-04 13:50:28 +01002478 if (enhancements.response == 0) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08002479 DRM_DEBUG_KMS("No enhancement is supported\n");
Chris Wilson32aad862010-08-04 13:50:25 +01002480 return true;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002481 }
Chris Wilson32aad862010-08-04 13:50:25 +01002482
Chris Wilsonc5521702010-08-04 13:50:28 +01002483 if (IS_TV(intel_sdvo_connector))
2484 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
Akshay Joshi0206e352011-08-16 15:34:10 -04002485 else if (IS_LVDS(intel_sdvo_connector))
Chris Wilsonc5521702010-08-04 13:50:28 +01002486 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2487 else
2488 return true;
Chris Wilsone957d772010-09-24 12:52:03 +01002489}
Chris Wilson32aad862010-08-04 13:50:25 +01002490
Chris Wilsone957d772010-09-24 12:52:03 +01002491static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2492 struct i2c_msg *msgs,
2493 int num)
2494{
2495 struct intel_sdvo *sdvo = adapter->algo_data;
2496
2497 if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2498 return -EIO;
2499
2500 return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2501}
2502
2503static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2504{
2505 struct intel_sdvo *sdvo = adapter->algo_data;
2506 return sdvo->i2c->algo->functionality(sdvo->i2c);
2507}
2508
2509static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
2510 .master_xfer = intel_sdvo_ddc_proxy_xfer,
2511 .functionality = intel_sdvo_ddc_proxy_func
2512};
2513
2514static bool
2515intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
2516 struct drm_device *dev)
2517{
2518 sdvo->ddc.owner = THIS_MODULE;
2519 sdvo->ddc.class = I2C_CLASS_DDC;
2520 snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
2521 sdvo->ddc.dev.parent = &dev->pdev->dev;
2522 sdvo->ddc.algo_data = sdvo;
2523 sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
2524
2525 return i2c_add_adapter(&sdvo->ddc) == 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002526}
2527
Daniel Vettereef4eac2012-03-23 23:43:35 +01002528bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob)
Jesse Barnes79e53942008-11-07 14:24:08 -08002529{
Jesse Barnesb01f2c32009-12-11 11:07:17 -08002530 struct drm_i915_private *dev_priv = dev->dev_private;
Eric Anholt21d40d32010-03-25 11:11:14 -07002531 struct intel_encoder *intel_encoder;
Chris Wilsonea5b2132010-08-04 13:50:23 +01002532 struct intel_sdvo *intel_sdvo;
Chris Wilson084b6122012-05-11 18:01:33 +01002533 u32 hotplug_mask;
Jesse Barnes79e53942008-11-07 14:24:08 -08002534 int i;
Jesse Barnes79e53942008-11-07 14:24:08 -08002535
Chris Wilsonea5b2132010-08-04 13:50:23 +01002536 intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL);
2537 if (!intel_sdvo)
Eric Anholt7d573822009-01-02 13:33:00 -08002538 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -08002539
Chris Wilson56184e32011-05-17 14:03:50 +01002540 intel_sdvo->sdvo_reg = sdvo_reg;
Daniel Vettereef4eac2012-03-23 23:43:35 +01002541 intel_sdvo->is_sdvob = is_sdvob;
2542 intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, intel_sdvo) >> 1;
Chris Wilson56184e32011-05-17 14:03:50 +01002543 intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
Chris Wilsone957d772010-09-24 12:52:03 +01002544 if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev)) {
2545 kfree(intel_sdvo);
2546 return false;
2547 }
2548
Chris Wilson56184e32011-05-17 14:03:50 +01002549 /* encoder type will be decided later */
Chris Wilsonea5b2132010-08-04 13:50:23 +01002550 intel_encoder = &intel_sdvo->base;
Eric Anholt21d40d32010-03-25 11:11:14 -07002551 intel_encoder->type = INTEL_OUTPUT_SDVO;
Chris Wilson373a3cf2010-09-15 12:03:59 +01002552 drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
Jesse Barnes79e53942008-11-07 14:24:08 -08002553
Jesse Barnes79e53942008-11-07 14:24:08 -08002554 /* Read the regs to test if we can talk to the device */
2555 for (i = 0; i < 0x40; i++) {
Chris Wilsonf899fc62010-07-20 15:44:45 -07002556 u8 byte;
2557
2558 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
Daniel Vettereef4eac2012-03-23 23:43:35 +01002559 DRM_DEBUG_KMS("No SDVO device found on %s\n",
2560 SDVO_NAME(intel_sdvo));
Chris Wilsonf899fc62010-07-20 15:44:45 -07002561 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002562 }
2563 }
2564
Chris Wilson084b6122012-05-11 18:01:33 +01002565 hotplug_mask = 0;
2566 if (IS_G4X(dev)) {
2567 hotplug_mask = intel_sdvo->is_sdvob ?
2568 SDVOB_HOTPLUG_INT_STATUS_G4X : SDVOC_HOTPLUG_INT_STATUS_G4X;
2569 } else if (IS_GEN4(dev)) {
2570 hotplug_mask = intel_sdvo->is_sdvob ?
2571 SDVOB_HOTPLUG_INT_STATUS_I965 : SDVOC_HOTPLUG_INT_STATUS_I965;
2572 } else {
2573 hotplug_mask = intel_sdvo->is_sdvob ?
2574 SDVOB_HOTPLUG_INT_STATUS_I915 : SDVOC_HOTPLUG_INT_STATUS_I915;
2575 }
2576 dev_priv->hotplug_supported_mask |= hotplug_mask;
Ma Ling619ac3b2009-05-18 16:12:46 +08002577
Chris Wilson4ef69c72010-09-09 15:14:28 +01002578 drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002579
André Goddard Rosaaf901ca2009-11-14 13:09:05 -02002580 /* In default case sdvo lvds is false */
Chris Wilson32aad862010-08-04 13:50:25 +01002581 if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
Chris Wilsonf899fc62010-07-20 15:44:45 -07002582 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002583
Simon Farnsworthcc68c812011-09-21 17:13:30 +01002584 /* Set up hotplug command - note paranoia about contents of reply.
2585 * We assume that the hardware is in a sane state, and only touch
2586 * the bits we think we understand.
2587 */
2588 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG,
2589 &intel_sdvo->hotplug_active, 2);
2590 intel_sdvo->hotplug_active[0] &= ~0x3;
2591
Chris Wilsonea5b2132010-08-04 13:50:23 +01002592 if (intel_sdvo_output_setup(intel_sdvo,
2593 intel_sdvo->caps.output_flags) != true) {
Daniel Vettereef4eac2012-03-23 23:43:35 +01002594 DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",
2595 SDVO_NAME(intel_sdvo));
Chris Wilsonf899fc62010-07-20 15:44:45 -07002596 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002597 }
2598
Chris Wilsonea5b2132010-08-04 13:50:23 +01002599 intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08002600
Jesse Barnes79e53942008-11-07 14:24:08 -08002601 /* Set the input timing to the screen. Assume always input 0. */
Chris Wilson32aad862010-08-04 13:50:25 +01002602 if (!intel_sdvo_set_target_input(intel_sdvo))
Chris Wilsonf899fc62010-07-20 15:44:45 -07002603 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002604
Chris Wilson32aad862010-08-04 13:50:25 +01002605 if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
2606 &intel_sdvo->pixel_clock_min,
2607 &intel_sdvo->pixel_clock_max))
Chris Wilsonf899fc62010-07-20 15:44:45 -07002608 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002609
Zhao Yakui8a4c47f2009-07-20 13:48:04 +08002610 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
yakui_zhao342dc382009-06-02 14:12:00 +08002611 "clock range %dMHz - %dMHz, "
2612 "input 1: %c, input 2: %c, "
2613 "output 1: %c, output 2: %c\n",
Chris Wilsonea5b2132010-08-04 13:50:23 +01002614 SDVO_NAME(intel_sdvo),
2615 intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
2616 intel_sdvo->caps.device_rev_id,
2617 intel_sdvo->pixel_clock_min / 1000,
2618 intel_sdvo->pixel_clock_max / 1000,
2619 (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
2620 (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
yakui_zhao342dc382009-06-02 14:12:00 +08002621 /* check currently supported outputs */
Chris Wilsonea5b2132010-08-04 13:50:23 +01002622 intel_sdvo->caps.output_flags &
Jesse Barnes79e53942008-11-07 14:24:08 -08002623 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
Chris Wilsonea5b2132010-08-04 13:50:23 +01002624 intel_sdvo->caps.output_flags &
Jesse Barnes79e53942008-11-07 14:24:08 -08002625 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
Eric Anholt7d573822009-01-02 13:33:00 -08002626 return true;
Jesse Barnes79e53942008-11-07 14:24:08 -08002627
Chris Wilsonf899fc62010-07-20 15:44:45 -07002628err:
Chris Wilson373a3cf2010-09-15 12:03:59 +01002629 drm_encoder_cleanup(&intel_encoder->base);
Chris Wilsone957d772010-09-24 12:52:03 +01002630 i2c_del_adapter(&intel_sdvo->ddc);
Chris Wilsonea5b2132010-08-04 13:50:23 +01002631 kfree(intel_sdvo);
Jesse Barnes79e53942008-11-07 14:24:08 -08002632
Eric Anholt7d573822009-01-02 13:33:00 -08002633 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -08002634}