| Thierry Reding | 140fd97 | 2011-12-21 08:04:13 +0100 | [diff] [blame] | 1 | Tegra SoC PWFM controller |
| 2 | |
| 3 | Required properties: |
| Paul Walmsley | 193c9d2 | 2015-01-30 15:11:04 -0700 | [diff] [blame] | 4 | - compatible: For Tegra20, must contain "nvidia,tegra20-pwm". For Tegra30, |
| 5 | must contain "nvidia,tegra30-pwm". Otherwise, must contain |
| 6 | "nvidia,<chip>-pwm", plus one of the above, where <chip> is tegra114, |
| 7 | tegra124, tegra132, or tegra210. |
| Thierry Reding | 140fd97 | 2011-12-21 08:04:13 +0100 | [diff] [blame] | 8 | - reg: physical base address and length of the controller's registers |
| Laurent Pinchart | ebeec0a | 2013-07-18 00:54:23 +0200 | [diff] [blame] | 9 | - #pwm-cells: should be 2. See pwm.txt in this directory for a description of |
| 10 | the cells format. |
| Stephen Warren | d8f6479 | 2013-11-06 14:00:25 -0700 | [diff] [blame] | 11 | - clocks: Must contain one entry, for the module clock. |
| 12 | See ../clocks/clock-bindings.txt for details. |
| Stephen Warren | 0799958 | 2013-11-07 10:11:27 -0700 | [diff] [blame] | 13 | - resets: Must contain an entry for each entry in reset-names. |
| 14 | See ../reset/reset.txt for details. |
| 15 | - reset-names: Must include the following entries: |
| 16 | - pwm |
| Thierry Reding | 140fd97 | 2011-12-21 08:04:13 +0100 | [diff] [blame] | 17 | |
| 18 | Example: |
| 19 | |
| 20 | pwm: pwm@7000a000 { |
| 21 | compatible = "nvidia,tegra20-pwm"; |
| 22 | reg = <0x7000a000 0x100>; |
| 23 | #pwm-cells = <2>; |
| Stephen Warren | d8f6479 | 2013-11-06 14:00:25 -0700 | [diff] [blame] | 24 | clocks = <&tegra_car 17>; |
| Stephen Warren | 0799958 | 2013-11-07 10:11:27 -0700 | [diff] [blame] | 25 | resets = <&tegra_car 17>; |
| 26 | reset-names = "pwm"; |
| Thierry Reding | 140fd97 | 2011-12-21 08:04:13 +0100 | [diff] [blame] | 27 | }; |