Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2 | * Onboard registers and descriptions for Synergy Microsystems' |
| 3 | * "Gemini" boards. |
| 4 | * |
| 5 | */ |
| 6 | #ifdef __KERNEL__ |
| 7 | #ifndef __PPC_GEMINI_H |
| 8 | #define __PPC_GEMINI_H |
| 9 | |
| 10 | /* Registers */ |
| 11 | |
| 12 | #define GEMINI_SERIAL_B (0xffeffb00) |
| 13 | #define GEMINI_SERIAL_A (0xffeffb08) |
| 14 | #define GEMINI_USWITCH (0xffeffd00) |
| 15 | #define GEMINI_BREV (0xffeffe00) |
| 16 | #define GEMINI_BECO (0xffeffe08) |
| 17 | #define GEMINI_FEAT (0xffeffe10) |
| 18 | #define GEMINI_BSTAT (0xffeffe18) |
| 19 | #define GEMINI_CPUSTAT (0xffeffe20) |
| 20 | #define GEMINI_L2CFG (0xffeffe30) |
| 21 | #define GEMINI_MEMCFG (0xffeffe38) |
| 22 | #define GEMINI_FLROM (0xffeffe40) |
| 23 | #define GEMINI_P0PCI (0xffeffe48) |
| 24 | #define GEMINI_FLWIN (0xffeffe50) |
| 25 | #define GEMINI_P0INTMASK (0xffeffe60) |
| 26 | #define GEMINI_P0INTAP (0xffeffe68) |
| 27 | #define GEMINI_PCIERR (0xffeffe70) |
| 28 | #define GEMINI_LEDBASE (0xffeffe80) |
| 29 | #define GEMINI_RTC (0xffe9fff8) |
| 30 | #define GEMINI_LEDS 8 |
| 31 | #define GEMINI_SWITCHES 8 |
| 32 | |
| 33 | |
| 34 | /* Flash ROM bit definitions */ |
| 35 | #define GEMINI_FLS_WEN (1<<0) |
| 36 | #define GEMINI_FLS_JMP (1<<6) |
| 37 | #define GEMINI_FLS_BOOT (1<<7) |
| 38 | |
| 39 | /* Memory bit definitions */ |
| 40 | #define GEMINI_MEM_TYPE_MASK 0xc0 |
| 41 | #define GEMINI_MEM_SIZE_MASK 0x38 |
| 42 | #define GEMINI_MEM_BANK_MASK 0x07 |
| 43 | |
| 44 | /* L2 cache bit definitions */ |
| 45 | #define GEMINI_L2_SIZE_MASK 0xc0 |
| 46 | #define GEMINI_L2_RATIO_MASK 0x03 |
| 47 | |
| 48 | /* Timebase register bit definitons */ |
| 49 | #define GEMINI_TIMEB0_EN (1<<0) |
| 50 | #define GEMINI_TIMEB1_EN (1<<1) |
| 51 | #define GEMINI_TIMEB2_EN (1<<2) |
| 52 | #define GEMINI_TIMEB3_EN (1<<3) |
| 53 | |
| 54 | /* CPU status bit definitions */ |
| 55 | #define GEMINI_CPU_ID_MASK 0x03 |
| 56 | #define GEMINI_CPU_COUNT_MASK 0x0c |
| 57 | #define GEMINI_CPU0_HALTED (1<<4) |
| 58 | #define GEMINI_CPU1_HALTED (1<<5) |
| 59 | #define GEMINI_CPU2_HALTED (1<<6) |
| 60 | #define GEMINI_CPU3_HALTED (1<<7) |
| 61 | |
| 62 | /* Board status bit definitions */ |
| 63 | #define GEMINI_BRD_FAIL (1<<0) /* FAIL led is lit */ |
| 64 | #define GEMINI_BRD_BUS_MASK 0x0c /* PowerPC bus speed */ |
| 65 | |
| 66 | /* Board family/feature bit descriptions */ |
| 67 | #define GEMINI_FEAT_HAS_FLASH (1<<0) |
| 68 | #define GEMINI_FEAT_HAS_ETH (1<<1) |
| 69 | #define GEMINI_FEAT_HAS_SCSI (1<<2) |
| 70 | #define GEMINI_FEAT_HAS_P0 (1<<3) |
| 71 | #define GEMINI_FEAT_FAM_MASK 0xf0 |
| 72 | |
| 73 | /* Mod/ECO bit definitions */ |
| 74 | #define GEMINI_ECO_LEVEL_MASK 0x0f |
| 75 | #define GEMINI_MOD_MASK 0xf0 |
| 76 | |
| 77 | /* Type/revision bit definitions */ |
| 78 | #define GEMINI_REV_MASK 0x0f |
| 79 | #define GEMINI_TYPE_MASK 0xf0 |
| 80 | |
| 81 | /* User switch definitions */ |
| 82 | #define GEMINI_SWITCH_VERBOSE 1 /* adds "debug" to boot cmd line */ |
| 83 | #define GEMINI_SWITCH_SINGLE_USER 7 /* boots into "single-user" mode */ |
| 84 | |
| 85 | #define SGS_RTC_CONTROL 0 |
| 86 | #define SGS_RTC_SECONDS 1 |
| 87 | #define SGS_RTC_MINUTES 2 |
| 88 | #define SGS_RTC_HOURS 3 |
| 89 | #define SGS_RTC_DAY 4 |
| 90 | #define SGS_RTC_DAY_OF_MONTH 5 |
| 91 | #define SGS_RTC_MONTH 6 |
| 92 | #define SGS_RTC_YEAR 7 |
| 93 | |
| 94 | #define SGS_RTC_SET 0x80 |
| 95 | #define SGS_RTC_IS_STOPPED 0x80 |
| 96 | |
| 97 | #define GRACKLE_CONFIG_ADDR_ADDR (0xfec00000) |
| 98 | #define GRACKLE_CONFIG_DATA_ADDR (0xfee00000) |
| 99 | |
| 100 | #define GEMINI_BOOT_INIT (0xfff00100) |
| 101 | |
| 102 | #ifndef __ASSEMBLY__ |
| 103 | |
| 104 | static inline void grackle_write( unsigned long addr, unsigned long data ) |
| 105 | { |
| 106 | __asm__ __volatile__( |
| 107 | " stwbrx %1, 0, %0\n \ |
| 108 | sync\n \ |
| 109 | stwbrx %3, 0, %2\n \ |
| 110 | sync " |
| 111 | : /* no output */ |
| 112 | : "r" (GRACKLE_CONFIG_ADDR_ADDR), "r" (addr), |
| 113 | "r" (GRACKLE_CONFIG_DATA_ADDR), "r" (data)); |
| 114 | } |
| 115 | |
| 116 | static inline unsigned long grackle_read( unsigned long addr ) |
| 117 | { |
| 118 | unsigned long val; |
| 119 | |
| 120 | __asm__ __volatile__( |
| 121 | " stwbrx %1, 0, %2\n \ |
| 122 | sync\n \ |
| 123 | lwbrx %0, 0, %3\n \ |
| 124 | sync " |
| 125 | : "=r" (val) |
| 126 | : "r" (addr), "r" (GRACKLE_CONFIG_ADDR_ADDR), |
| 127 | "r" (GRACKLE_CONFIG_DATA_ADDR)); |
| 128 | |
| 129 | return val; |
| 130 | } |
| 131 | |
| 132 | static inline void gemini_led_on( int led ) |
| 133 | { |
| 134 | if (led >= 0 && led < GEMINI_LEDS) |
| 135 | *(unsigned char *)(GEMINI_LEDBASE + (led<<3)) = 1; |
| 136 | } |
| 137 | |
| 138 | static inline void gemini_led_off(int led) |
| 139 | { |
| 140 | if (led >= 0 && led < GEMINI_LEDS) |
| 141 | *(unsigned char *)(GEMINI_LEDBASE + (led<<3)) = 0; |
| 142 | } |
| 143 | |
| 144 | static inline int gemini_led_val(int led) |
| 145 | { |
| 146 | int val = 0; |
| 147 | if (led >= 0 && led < GEMINI_LEDS) |
| 148 | val = *(unsigned char *)(GEMINI_LEDBASE + (led<<3)); |
| 149 | return (val & 0x1); |
| 150 | } |
| 151 | |
| 152 | /* returns processor id from the board */ |
| 153 | static inline int gemini_processor(void) |
| 154 | { |
| 155 | unsigned char cpu = *(unsigned char *)(GEMINI_CPUSTAT); |
| 156 | return (int) ((cpu == 0) ? 4 : (cpu & GEMINI_CPU_ID_MASK)); |
| 157 | } |
| 158 | |
| 159 | |
| 160 | extern void _gemini_reboot(void); |
| 161 | extern void gemini_prom_init(void); |
| 162 | extern void gemini_init_l2(void); |
| 163 | #endif /* __ASSEMBLY__ */ |
| 164 | #endif |
| 165 | #endif /* __KERNEL__ */ |