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review.shift-gmbh.com / SHIFTPHONES / kernel / common / 2eb9504bcc1f164ac137cd12c5deeb1e21cc6b1b / . / arch / arc / boot / dts / abilis_tb100.dtsi
blob: 941ad118a7e748773fa707379f32bb287ee5102f [file] [log] [blame]
Christian Ruppert2eb95042013-04-11 15:19:40 +0200[diff] [blame^]1/*
2 * Abilis Systems TB100 SOC device tree
3 *
4 * Copyright (C) Abilis Systems 2013
5 *
6 * Author: Christian Ruppert <christian.ruppert@abilis.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21
22/include/ "abilis_tb10x.dtsi"
23
24/* interrupt specifiers
25 * --------------------
26 * 0: rising, 1: low, 2: high, 3: falling,
27 */
28
29/ {
30 clock-frequency = <500000000>; /* 500 MHZ */
31
32 soc100 {
33 bus-frequency = <166666666>;
34
35 pll0: oscillator {
36 clock-frequency = <1000000000>;
37 };
38 cpu_clk: clkdiv_cpu {
39 clock-mult = <1>;
40 clock-div = <2>;
41 };
42 ahb_clk: clkdiv_ahb {
43 clock-mult = <1>;
44 clock-div = <6>;
45 };
46
47 iomux: iomux@FF10601c {
48 /* Port 1 */
49 pctl_tsin_s0: pctl-tsin-s0 { /* Serial TS-in 0 */
50 pingrp = "mis0_pins";
51 };
52 pctl_tsin_s1: pctl-tsin-s1 { /* Serial TS-in 1 */
53 pingrp = "mis1_pins";
54 };
55 pctl_gpio_a: pctl-gpio-a { /* GPIO bank A */
56 pingrp = "gpioa_pins";
57 };
58 pctl_tsin_p1: pctl-tsin-p1 { /* Parallel TS-in 1 */
59 pingrp = "mip1_pins";
60 };
61 /* Port 2 */
62 pctl_tsin_s2: pctl-tsin-s2 { /* Serial TS-in 2 */
63 pingrp = "mis2_pins";
64 };
65 pctl_tsin_s3: pctl-tsin-s3 { /* Serial TS-in 3 */
66 pingrp = "mis3_pins";
67 };
68 pctl_gpio_c: pctl-gpio-c { /* GPIO bank C */
69 pingrp = "gpioc_pins";
70 };
71 pctl_tsin_p3: pctl-tsin-p3 { /* Parallel TS-in 3 */
72 pingrp = "mip3_pins";
73 };
74 /* Port 3 */
75 pctl_tsin_s4: pctl-tsin-s4 { /* Serial TS-in 4 */
76 pingrp = "mis4_pins";
77 };
78 pctl_tsin_s5: pctl-tsin-s5 { /* Serial TS-in 5 */
79 pingrp = "mis5_pins";
80 };
81 pctl_gpio_e: pctl-gpio-e { /* GPIO bank E */
82 pingrp = "gpioe_pins";
83 };
84 pctl_tsin_p5: pctl-tsin-p5 { /* Parallel TS-in 5 */
85 pingrp = "mip5_pins";
86 };
87 /* Port 4 */
88 pctl_tsin_s6: pctl-tsin-s6 { /* Serial TS-in 6 */
89 pingrp = "mis6_pins";
90 };
91 pctl_tsin_s7: pctl-tsin-s7 { /* Serial TS-in 7 */
92 pingrp = "mis7_pins";
93 };
94 pctl_gpio_g: pctl-gpio-g { /* GPIO bank G */
95 pingrp = "gpiog_pins";
96 };
97 pctl_tsin_p7: pctl-tsin-p7 { /* Parallel TS-in 7 */
98 pingrp = "mip7_pins";
99 };
100 /* Port 5 */
101 pctl_gpio_j: pctl-gpio-j { /* GPIO bank J */
102 pingrp = "gpioj_pins";
103 };
104 pctl_gpio_k: pctl-gpio-k { /* GPIO bank K */
105 pingrp = "gpiok_pins";
106 };
107 pctl_ciplus: pctl-ciplus { /* CI+ interface */
108 pingrp = "ciplus_pins";
109 };
110 pctl_mcard: pctl-mcard { /* M-Card interface */
111 pingrp = "mcard_pins";
112 };
113 /* Port 6 */
114 pctl_tsout_p: pctl-tsout-p { /* Parallel TS-out */
115 pingrp = "mop_pins";
116 };
117 pctl_tsout_s0: pctl-tsout-s0 { /* Serial TS-out 0 */
118 pingrp = "mos0_pins";
119 };
120 pctl_tsout_s1: pctl-tsout-s1 { /* Serial TS-out 1 */
121 pingrp = "mos1_pins";
122 };
123 pctl_tsout_s2: pctl-tsout-s2 { /* Serial TS-out 2 */
124 pingrp = "mos2_pins";
125 };
126 pctl_tsout_s3: pctl-tsout-s3 { /* Serial TS-out 3 */
127 pingrp = "mos3_pins";
128 };
129 /* Port 7 */
130 pctl_uart0: pctl-uart0 { /* UART 0 */
131 pingrp = "uart0_pins";
132 };
133 pctl_uart1: pctl-uart1 { /* UART 1 */
134 pingrp = "uart1_pins";
135 };
136 pctl_gpio_l: pctl-gpio-l { /* GPIO bank L */
137 pingrp = "gpiol_pins";
138 };
139 pctl_gpio_m: pctl-gpio-m { /* GPIO bank M */
140 pingrp = "gpiom_pins";
141 };
142 /* Port 8 */
143 pctl_spi3: pctl-spi3 {
144 pingrp = "spi3_pins";
145 };
146 /* Port 9 */
147 pctl_spi1: pctl-spi1 {
148 pingrp = "spi1_pins";
149 };
150 pctl_gpio_n: pctl-gpio-n {
151 pingrp = "gpion_pins";
152 };
153 /* Unmuxed GPIOs */
154 pctl_gpio_b: pctl-gpio-b {
155 pingrp = "gpiob_pins";
156 };
157 pctl_gpio_d: pctl-gpio-d {
158 pingrp = "gpiod_pins";
159 };
160 pctl_gpio_f: pctl-gpio-f {
161 pingrp = "gpiof_pins";
162 };
163 pctl_gpio_h: pctl-gpio-h {
164 pingrp = "gpioh_pins";
165 };
166 pctl_gpio_i: pctl-gpio-i {
167 pingrp = "gpioi_pins";
168 };
169 };
170
171 gpioa: gpio@FF140000 {
172 compatible = "abilis,tb10x-gpio";
173 interrupt-controller;
174 #interrupt-cells = <1>;
175 interrupt-parent = <&tb10x_ictl>;
176 interrupts = <27 1>;
177 reg = <0xFF140000 0x1000>;
178 gpio-controller;
179 #gpio-cells = <1>;
180 gpio-base = <0>;
181 gpio-pins = <&pctl_gpio_a>;
182 };
183 gpiob: gpio@FF141000 {
184 compatible = "abilis,tb10x-gpio";
185 interrupt-controller;
186 #interrupt-cells = <1>;
187 interrupt-parent = <&tb10x_ictl>;
188 interrupts = <27 1>;
189 reg = <0xFF141000 0x1000>;
190 gpio-controller;
191 #gpio-cells = <1>;
192 gpio-base = <3>;
193 gpio-pins = <&pctl_gpio_b>;
194 };
195 gpioc: gpio@FF142000 {
196 compatible = "abilis,tb10x-gpio";
197 interrupt-controller;
198 #interrupt-cells = <1>;
199 interrupt-parent = <&tb10x_ictl>;
200 interrupts = <27 1>;
201 reg = <0xFF142000 0x1000>;
202 gpio-controller;
203 #gpio-cells = <1>;
204 gpio-base = <5>;
205 gpio-pins = <&pctl_gpio_c>;
206 };
207 gpiod: gpio@FF143000 {
208 compatible = "abilis,tb10x-gpio";
209 interrupt-controller;
210 #interrupt-cells = <1>;
211 interrupt-parent = <&tb10x_ictl>;
212 interrupts = <27 1>;
213 reg = <0xFF143000 0x1000>;
214 gpio-controller;
215 #gpio-cells = <1>;
216 gpio-base = <8>;
217 gpio-pins = <&pctl_gpio_d>;
218 };
219 gpioe: gpio@FF144000 {
220 compatible = "abilis,tb10x-gpio";
221 interrupt-controller;
222 #interrupt-cells = <1>;
223 interrupt-parent = <&tb10x_ictl>;
224 interrupts = <27 1>;
225 reg = <0xFF144000 0x1000>;
226 gpio-controller;
227 #gpio-cells = <1>;
228 gpio-base = <10>;
229 gpio-pins = <&pctl_gpio_e>;
230 };
231 gpiof: gpio@FF145000 {
232 compatible = "abilis,tb10x-gpio";
233 interrupt-controller;
234 #interrupt-cells = <1>;
235 interrupt-parent = <&tb10x_ictl>;
236 interrupts = <27 1>;
237 reg = <0xFF145000 0x1000>;
238 gpio-controller;
239 #gpio-cells = <1>;
240 gpio-base = <13>;
241 gpio-pins = <&pctl_gpio_f>;
242 };
243 gpiog: gpio@FF146000 {
244 compatible = "abilis,tb10x-gpio";
245 interrupt-controller;
246 #interrupt-cells = <1>;
247 interrupt-parent = <&tb10x_ictl>;
248 interrupts = <27 1>;
249 reg = <0xFF146000 0x1000>;
250 gpio-controller;
251 #gpio-cells = <1>;
252 gpio-base = <15>;
253 gpio-pins = <&pctl_gpio_g>;
254 };
255 gpioh: gpio@FF147000 {
256 compatible = "abilis,tb10x-gpio";
257 interrupt-controller;
258 #interrupt-cells = <1>;
259 interrupt-parent = <&tb10x_ictl>;
260 interrupts = <27 1>;
261 reg = <0xFF147000 0x1000>;
262 gpio-controller;
263 #gpio-cells = <1>;
264 gpio-base = <18>;
265 gpio-pins = <&pctl_gpio_h>;
266 };
267 gpioi: gpio@FF148000 {
268 compatible = "abilis,tb10x-gpio";
269 interrupt-controller;
270 #interrupt-cells = <1>;
271 interrupt-parent = <&tb10x_ictl>;
272 interrupts = <27 1>;
273 reg = <0xFF148000 0x1000>;
274 gpio-controller;
275 #gpio-cells = <1>;
276 gpio-base = <20>;
277 gpio-pins = <&pctl_gpio_i>;
278 };
279 gpioj: gpio@FF149000 {
280 compatible = "abilis,tb10x-gpio";
281 interrupt-controller;
282 #interrupt-cells = <1>;
283 interrupt-parent = <&tb10x_ictl>;
284 interrupts = <27 1>;
285 reg = <0xFF149000 0x1000>;
286 gpio-controller;
287 #gpio-cells = <1>;
288 gpio-base = <32>;
289 gpio-pins = <&pctl_gpio_j>;
290 };
291 gpiok: gpio@FF14a000 {
292 compatible = "abilis,tb10x-gpio";
293 interrupt-controller;
294 #interrupt-cells = <1>;
295 interrupt-parent = <&tb10x_ictl>;
296 interrupts = <27 1>;
297 reg = <0xFF14A000 0x1000>;
298 gpio-controller;
299 #gpio-cells = <1>;
300 gpio-base = <64>;
301 gpio-pins = <&pctl_gpio_k>;
302 };
303 gpiol: gpio@FF14b000 {
304 compatible = "abilis,tb10x-gpio";
305 interrupt-controller;
306 #interrupt-cells = <1>;
307 interrupt-parent = <&tb10x_ictl>;
308 interrupts = <27 1>;
309 reg = <0xFF14B000 0x1000>;
310 gpio-controller;
311 #gpio-cells = <1>;
312 gpio-base = <86>;
313 gpio-pins = <&pctl_gpio_l>;
314 };
315 gpiom: gpio@FF14c000 {
316 compatible = "abilis,tb10x-gpio";
317 interrupt-controller;
318 #interrupt-cells = <1>;
319 interrupt-parent = <&tb10x_ictl>;
320 interrupts = <27 1>;
321 reg = <0xFF14C000 0x1000>;
322 gpio-controller;
323 #gpio-cells = <1>;
324 gpio-base = <90>;
325 gpio-pins = <&pctl_gpio_m>;
326 };
327 gpion: gpio@FF14d000 {
328 compatible = "abilis,tb10x-gpio";
329 interrupt-controller;
330 #interrupt-cells = <1>;
331 interrupt-parent = <&tb10x_ictl>;
332 interrupts = <27 1>;
333 reg = <0xFF14D000 0x1000>;
334 gpio-controller;
335 #gpio-cells = <1>;
336 gpio-base = <94>;
337 gpio-pins = <&pctl_gpio_n>;
338 };
339 };
340};