Greg Ungerer | eb1d65a | 2007-07-30 02:38:57 +0100 | [diff] [blame] | 1 | /* |
| 2 | * arch/arm/mach-at91/at91x40.c |
| 3 | * |
| 4 | * (C) Copyright 2007, Greg Ungerer <gerg@snapgear.com> |
| 5 | * Copyright (C) 2005 SAN People |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; either version 2 of the License, or |
| 10 | * (at your option) any later version. |
| 11 | */ |
| 12 | |
| 13 | #include <linux/kernel.h> |
| 14 | #include <linux/init.h> |
| 15 | #include <linux/irq.h> |
Nicolas Pitre | c9dfafb | 2011-08-02 10:21:36 -0400 | [diff] [blame] | 16 | #include <asm/proc-fns.h> |
Olof Johansson | 86dfe44 | 2012-03-29 23:22:44 -0700 | [diff] [blame] | 17 | #include <asm/system_misc.h> |
Greg Ungerer | eb1d65a | 2007-07-30 02:38:57 +0100 | [diff] [blame] | 18 | #include <asm/mach/arch.h> |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 19 | #include <mach/at91x40.h> |
| 20 | #include <mach/at91_st.h> |
| 21 | #include <mach/timex.h> |
Greg Ungerer | eb1d65a | 2007-07-30 02:38:57 +0100 | [diff] [blame] | 22 | #include "generic.h" |
| 23 | |
| 24 | /* |
Greg Ungerer | 66aaeff | 2008-05-23 08:26:24 +0100 | [diff] [blame] | 25 | * Export the clock functions for the AT91X40. Some external code common |
| 26 | * to all AT91 family parts relys on this, like the gpio and serial support. |
Greg Ungerer | eb1d65a | 2007-07-30 02:38:57 +0100 | [diff] [blame] | 27 | */ |
| 28 | int clk_enable(struct clk *clk) |
| 29 | { |
| 30 | return 0; |
| 31 | } |
| 32 | |
Greg Ungerer | 66aaeff | 2008-05-23 08:26:24 +0100 | [diff] [blame] | 33 | void clk_disable(struct clk *clk) |
| 34 | { |
| 35 | } |
| 36 | |
| 37 | unsigned long clk_get_rate(struct clk *clk) |
| 38 | { |
| 39 | return AT91X40_MASTER_CLOCK; |
| 40 | } |
| 41 | |
Nicolas Pitre | c9dfafb | 2011-08-02 10:21:36 -0400 | [diff] [blame] | 42 | static void at91x40_idle(void) |
| 43 | { |
| 44 | /* |
| 45 | * Disable the processor clock. The processor will be automatically |
| 46 | * re-enabled by an interrupt or by a reset. |
| 47 | */ |
Jean-Christophe PLAGNIOL-VILLARD | fac36a5 | 2012-02-05 20:35:39 +0800 | [diff] [blame] | 48 | __raw_writel(AT91_PS_CR_CPU, AT91_PS_CR); |
Nicolas Pitre | c9dfafb | 2011-08-02 10:21:36 -0400 | [diff] [blame] | 49 | cpu_do_idle(); |
| 50 | } |
| 51 | |
Greg Ungerer | eb1d65a | 2007-07-30 02:38:57 +0100 | [diff] [blame] | 52 | void __init at91x40_initialize(unsigned long main_clock) |
| 53 | { |
Nicolas Pitre | c9dfafb | 2011-08-02 10:21:36 -0400 | [diff] [blame] | 54 | arm_pm_idle = at91x40_idle; |
Greg Ungerer | eb1d65a | 2007-07-30 02:38:57 +0100 | [diff] [blame] | 55 | at91_extern_irq = (1 << AT91X40_ID_IRQ0) | (1 << AT91X40_ID_IRQ1) |
| 56 | | (1 << AT91X40_ID_IRQ2); |
| 57 | } |
| 58 | |
| 59 | /* |
| 60 | * The default interrupt priority levels (0 = lowest, 7 = highest). |
| 61 | */ |
| 62 | static unsigned int at91x40_default_irq_priority[NR_AIC_IRQS] __initdata = { |
| 63 | 7, /* Advanced Interrupt Controller (FIQ) */ |
| 64 | 0, /* System Peripherals */ |
| 65 | 0, /* USART 0 */ |
| 66 | 0, /* USART 1 */ |
| 67 | 2, /* Timer Counter 0 */ |
| 68 | 2, /* Timer Counter 1 */ |
| 69 | 2, /* Timer Counter 2 */ |
| 70 | 0, /* Watchdog timer */ |
| 71 | 0, /* Parallel IO Controller A */ |
| 72 | 0, /* Reserved */ |
| 73 | 0, /* Reserved */ |
| 74 | 0, /* Reserved */ |
| 75 | 0, /* Reserved */ |
| 76 | 0, /* Reserved */ |
| 77 | 0, /* Reserved */ |
| 78 | 0, /* Reserved */ |
| 79 | 0, /* External IRQ0 */ |
| 80 | 0, /* External IRQ1 */ |
| 81 | 0, /* External IRQ2 */ |
| 82 | }; |
| 83 | |
| 84 | void __init at91x40_init_interrupts(unsigned int priority[NR_AIC_IRQS]) |
| 85 | { |
| 86 | if (!priority) |
| 87 | priority = at91x40_default_irq_priority; |
| 88 | |
| 89 | at91_aic_init(priority); |
| 90 | } |
| 91 | |