| Thomas Gleixner | ec8f24b | 2019-05-19 13:07:45 +0100 | [diff] [blame] | 1 | # SPDX-License-Identifier: GPL-2.0-only |
| Rob Herring | 21278ae | 2014-06-10 09:06:10 -0500 | [diff] [blame] | 2 | menuconfig ARCH_BERLIN |
| Masahiro Yamada | e324654 | 2015-11-16 12:06:10 +0900 | [diff] [blame] | 3 | bool "Marvell Berlin SoCs" |
| 4 | depends on ARCH_MULTI_V7 |
| Antoine Ténart | e9246c8 | 2014-09-03 09:48:22 +0200 | [diff] [blame] | 5 | select ARCH_HAS_RESET_CONTROLLER |
| Sebastian Hesselbarth | 1c37fa1 | 2013-09-09 14:36:19 +0200 | [diff] [blame] | 6 | select ARM_GIC |
| Sebastian Hesselbarth | 1c37fa1 | 2013-09-09 14:36:19 +0200 | [diff] [blame] | 7 | select DW_APB_ICTL |
| 8 | select DW_APB_TIMER_OF |
| Antoine Ténart | e9246c8 | 2014-09-03 09:48:22 +0200 | [diff] [blame] | 9 | select GENERIC_IRQ_CHIP |
| Linus Walleij | 5c34a4e | 2016-06-02 14:10:16 +0200 | [diff] [blame] | 10 | select GPIOLIB |
| Antoine Tenart | 9f69e8a | 2015-04-27 21:40:35 +0200 | [diff] [blame] | 11 | select MFD_SYSCON |
| Antoine Tenart | 03dac26 | 2014-05-18 20:06:32 +0200 | [diff] [blame] | 12 | select PINCTRL |
| Sebastian Hesselbarth | 1c37fa1 | 2013-09-09 14:36:19 +0200 | [diff] [blame] | 13 | |
| 14 | if ARCH_BERLIN |
| 15 | |
| Sebastian Hesselbarth | 1c37fa1 | 2013-09-09 14:36:19 +0200 | [diff] [blame] | 16 | config MACH_BERLIN_BG2 |
| 17 | bool "Marvell Armada 1500 (BG2)" |
| 18 | select CACHE_L2X0 |
| 19 | select CPU_PJ4B |
| Antoine Ténart | 7b7dfdd | 2014-06-04 18:03:42 +0200 | [diff] [blame] | 20 | select HAVE_ARM_SCU if SMP |
| Sebastian Hesselbarth | 1c37fa1 | 2013-09-09 14:36:19 +0200 | [diff] [blame] | 21 | select HAVE_ARM_TWD if SMP |
| Antoine Tenart | 03dac26 | 2014-05-18 20:06:32 +0200 | [diff] [blame] | 22 | select PINCTRL_BERLIN_BG2 |
| Sebastian Hesselbarth | 1c37fa1 | 2013-09-09 14:36:19 +0200 | [diff] [blame] | 23 | |
| 24 | config MACH_BERLIN_BG2CD |
| 25 | bool "Marvell Armada 1500-mini (BG2CD)" |
| Alexander Monakov | 2e55439 | 2018-03-18 20:11:49 +0300 | [diff] [blame] | 26 | select ARM_ERRATA_754322 |
| 27 | select ARM_ERRATA_775420 |
| 28 | select ARM_GLOBAL_TIMER |
| Sebastian Hesselbarth | 1c37fa1 | 2013-09-09 14:36:19 +0200 | [diff] [blame] | 29 | select CACHE_L2X0 |
| Alexander Monakov | 2e55439 | 2018-03-18 20:11:49 +0300 | [diff] [blame] | 30 | select HAVE_ARM_SCU |
| 31 | select HAVE_ARM_TWD |
| Antoine Tenart | 03dac26 | 2014-05-18 20:06:32 +0200 | [diff] [blame] | 32 | select PINCTRL_BERLIN_BG2CD |
| Sebastian Hesselbarth | 1c37fa1 | 2013-09-09 14:36:19 +0200 | [diff] [blame] | 33 | |
| Alexandre Belloni | cb56c64 | 2014-03-21 20:39:16 +0100 | [diff] [blame] | 34 | config MACH_BERLIN_BG2Q |
| 35 | bool "Marvell Armada 1500 Pro (BG2-Q)" |
| 36 | select CACHE_L2X0 |
| Antoine Ténart | 7b7dfdd | 2014-06-04 18:03:42 +0200 | [diff] [blame] | 37 | select HAVE_ARM_SCU if SMP |
| Alexandre Belloni | cb56c64 | 2014-03-21 20:39:16 +0100 | [diff] [blame] | 38 | select HAVE_ARM_TWD if SMP |
| Antoine Tenart | 03dac26 | 2014-05-18 20:06:32 +0200 | [diff] [blame] | 39 | select PINCTRL_BERLIN_BG2Q |
| Alexandre Belloni | cb56c64 | 2014-03-21 20:39:16 +0100 | [diff] [blame] | 40 | |
| Sebastian Hesselbarth | 1c37fa1 | 2013-09-09 14:36:19 +0200 | [diff] [blame] | 41 | endif |