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Sathya Perla6b7c5b92009-03-11 23:32:03 -07001/*
Vasundhara Volam40263822014-02-12 16:09:07 +05302 * Copyright (C) 2005 - 2014 Emulex
Sathya Perla6b7c5b92009-03-11 23:32:03 -07003 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License version 2
7 * as published by the Free Software Foundation. The full GNU General
8 * Public License is included in this distribution in the file called COPYING.
9 *
10 * Contact Information:
Ajit Khaparded2145cd2011-03-16 08:20:46 +000011 * linux-drivers@emulex.com
Sathya Perla6b7c5b92009-03-11 23:32:03 -070012 *
Ajit Khaparded2145cd2011-03-16 08:20:46 +000013 * Emulex
14 * 3333 Susan Street
15 * Costa Mesa, CA 92626
Sathya Perla6b7c5b92009-03-11 23:32:03 -070016 */
17
18#ifndef BE_H
19#define BE_H
20
21#include <linux/pci.h>
22#include <linux/etherdevice.h>
Sathya Perla6b7c5b92009-03-11 23:32:03 -070023#include <linux/delay.h>
24#include <net/tcp.h>
25#include <net/ip.h>
26#include <net/ipv6.h>
27#include <linux/if_vlan.h>
28#include <linux/workqueue.h>
29#include <linux/interrupt.h>
Ajit Khaparde84517482009-09-04 03:12:16 +000030#include <linux/firmware.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090031#include <linux/slab.h>
Sathya Perlaab1594e2011-07-25 19:10:15 +000032#include <linux/u64_stats_sync.h>
Sathya Perla6b7c5b92009-03-11 23:32:03 -070033
34#include "be_hw.h"
Parav Pandit045508a2012-03-26 14:27:13 +000035#include "be_roce.h"
Sathya Perla6b7c5b92009-03-11 23:32:03 -070036
Sathya Perlad52afde2014-03-11 18:53:09 +053037#define DRV_VER "10.2u"
Sathya Perla6b7c5b92009-03-11 23:32:03 -070038#define DRV_NAME "be2net"
Sarveshwar Bandi00d3d512013-01-28 04:17:01 +000039#define BE_NAME "Emulex BladeEngine2"
40#define BE3_NAME "Emulex BladeEngine3"
41#define OC_NAME "Emulex OneConnect"
Sathya Perlafe6d2a32010-11-21 23:25:50 +000042#define OC_NAME_BE OC_NAME "(be3)"
43#define OC_NAME_LANCER OC_NAME "(Lancer)"
Ajit Khapardeecedb6a2011-12-15 06:31:38 +000044#define OC_NAME_SH OC_NAME "(Skyhawk)"
Suresh Reddyf3effb452014-01-15 13:23:37 +053045#define DRV_DESC "Emulex OneConnect NIC Driver"
Sathya Perla6b7c5b92009-03-11 23:32:03 -070046
Ajit Khapardec4ca2372009-05-18 15:38:55 -070047#define BE_VENDOR_ID 0x19a2
Sathya Perlafe6d2a32010-11-21 23:25:50 +000048#define EMULEX_VENDOR_ID 0x10df
Ajit Khapardec4ca2372009-05-18 15:38:55 -070049#define BE_DEVICE_ID1 0x211
Ajit Khaparde12d7ea22009-10-16 18:02:12 -070050#define BE_DEVICE_ID2 0x221
Sathya Perlafe6d2a32010-11-21 23:25:50 +000051#define OC_DEVICE_ID1 0x700 /* Device Id for BE2 cards */
52#define OC_DEVICE_ID2 0x710 /* Device Id for BE3 cards */
53#define OC_DEVICE_ID3 0xe220 /* Device id for Lancer cards */
Mammatha Edhala12f4d0a2011-05-18 03:26:22 +000054#define OC_DEVICE_ID4 0xe228 /* Device id for VF in Lancer */
Ajit Khapardeecedb6a2011-12-15 06:31:38 +000055#define OC_DEVICE_ID5 0x720 /* Device Id for Skyhawk cards */
Padmanabh Ratnakar76b73532012-10-20 06:04:40 +000056#define OC_DEVICE_ID6 0x728 /* Device id for VF in SkyHawk */
Ajit Khaparde4762f6c2012-03-18 06:23:11 +000057#define OC_SUBSYS_DEVICE_ID1 0xE602
58#define OC_SUBSYS_DEVICE_ID2 0xE642
59#define OC_SUBSYS_DEVICE_ID3 0xE612
60#define OC_SUBSYS_DEVICE_ID4 0xE652
Ajit Khapardec4ca2372009-05-18 15:38:55 -070061
62static inline char *nic_name(struct pci_dev *pdev)
63{
Ajit Khaparde12d7ea22009-10-16 18:02:12 -070064 switch (pdev->device) {
65 case OC_DEVICE_ID1:
Ajit Khapardec4ca2372009-05-18 15:38:55 -070066 return OC_NAME;
Ajit Khapardee254f6e2010-02-09 01:28:35 +000067 case OC_DEVICE_ID2:
Sathya Perlafe6d2a32010-11-21 23:25:50 +000068 return OC_NAME_BE;
69 case OC_DEVICE_ID3:
Mammatha Edhala12f4d0a2011-05-18 03:26:22 +000070 case OC_DEVICE_ID4:
Sathya Perlafe6d2a32010-11-21 23:25:50 +000071 return OC_NAME_LANCER;
Ajit Khaparde12d7ea22009-10-16 18:02:12 -070072 case BE_DEVICE_ID2:
73 return BE3_NAME;
Ajit Khapardeecedb6a2011-12-15 06:31:38 +000074 case OC_DEVICE_ID5:
Padmanabh Ratnakar76b73532012-10-20 06:04:40 +000075 case OC_DEVICE_ID6:
Ajit Khapardeecedb6a2011-12-15 06:31:38 +000076 return OC_NAME_SH;
Ajit Khaparde12d7ea22009-10-16 18:02:12 -070077 default:
Ajit Khapardec4ca2372009-05-18 15:38:55 -070078 return BE_NAME;
Ajit Khaparde12d7ea22009-10-16 18:02:12 -070079 }
Ajit Khapardec4ca2372009-05-18 15:38:55 -070080}
81
Sathya Perla6b7c5b92009-03-11 23:32:03 -070082/* Number of bytes of an RX frame that are copied to skb->data */
Sathya Perla2e588f82011-03-11 02:49:26 +000083#define BE_HDR_LEN ((u16) 64)
Eric Dumazetbb349bb2012-01-25 03:56:30 +000084/* allocate extra space to allow tunneling decapsulation without head reallocation */
85#define BE_RX_SKB_ALLOC_SIZE (BE_HDR_LEN + 64)
86
Sathya Perla6b7c5b92009-03-11 23:32:03 -070087#define BE_MAX_JUMBO_FRAME_SIZE 9018
88#define BE_MIN_MTU 256
89
90#define BE_NUM_VLANS_SUPPORTED 64
Sathya Perla2632baf2013-10-01 16:00:00 +053091#define BE_MAX_EQD 128u
Sathya Perla6b7c5b92009-03-11 23:32:03 -070092#define BE_MAX_TX_FRAG_COUNT 30
93
94#define EVNT_Q_LEN 1024
95#define TX_Q_LEN 2048
96#define TX_CQ_LEN 1024
97#define RX_Q_LEN 1024 /* Does not support any other value */
98#define RX_CQ_LEN 1024
Sathya Perla5fb379e2009-06-18 00:02:59 +000099#define MCC_Q_LEN 128 /* total size not to exceed 8 pages */
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700100#define MCC_CQ_LEN 256
101
Sathya Perla10ef9ab2012-02-09 18:05:27 +0000102#define BE2_MAX_RSS_QS 4
Sathya Perla68d7bdc2013-08-27 16:57:35 +0530103#define BE3_MAX_RSS_QS 16
104#define BE3_MAX_TX_QS 16
105#define BE3_MAX_EVT_QS 16
Suresh Reddye3dc8672014-01-06 13:02:25 +0530106#define BE3_SRIOV_MAX_EVT_QS 8
Sathya Perla10ef9ab2012-02-09 18:05:27 +0000107
Sathya Perla68d7bdc2013-08-27 16:57:35 +0530108#define MAX_RX_QS 32
109#define MAX_EVT_QS 32
110#define MAX_TX_QS 32
111
Parav Pandit045508a2012-03-26 14:27:13 +0000112#define MAX_ROCE_EQS 5
Sathya Perla68d7bdc2013-08-27 16:57:35 +0530113#define MAX_MSIX_VECTORS 32
Sathya Perla92bf14a2013-08-27 16:57:32 +0530114#define MIN_MSIX_VECTORS 1
Sathya Perla10ef9ab2012-02-09 18:05:27 +0000115#define BE_TX_BUDGET 256
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700116#define BE_NAPI_WEIGHT 64
Sathya Perla10ef9ab2012-02-09 18:05:27 +0000117#define MAX_RX_POST BE_NAPI_WEIGHT /* Frags posted at a time */
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700118#define RX_FRAGS_REFILL_WM (RX_Q_LEN - MAX_RX_POST)
119
Vasundhara Volam7c5a5242012-08-28 20:37:41 +0000120#define MAX_VFS 30 /* Max VFs supported by BE3 FW */
Sathya Perla8788fdc2009-07-27 22:52:03 +0000121#define FW_VER_LEN 32
122
Venkata Duvvurue2557872014-04-21 15:38:00 +0530123#define RSS_INDIR_TABLE_LEN 128
124#define RSS_HASH_KEY_LEN 40
125
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700126struct be_dma_mem {
127 void *va;
128 dma_addr_t dma;
129 u32 size;
130};
131
132struct be_queue_info {
133 struct be_dma_mem dma_mem;
134 u16 len;
135 u16 entry_size; /* Size of an element in the queue */
136 u16 id;
137 u16 tail, head;
138 bool created;
139 atomic_t used; /* Number of valid elements in the queue */
140};
141
Sathya Perla5fb379e2009-06-18 00:02:59 +0000142static inline u32 MODULO(u16 val, u16 limit)
143{
144 BUG_ON(limit & (limit - 1));
145 return val & (limit - 1);
146}
147
148static inline void index_adv(u16 *index, u16 val, u16 limit)
149{
150 *index = MODULO((*index + val), limit);
151}
152
153static inline void index_inc(u16 *index, u16 limit)
154{
155 *index = MODULO((*index + 1), limit);
156}
157
158static inline void *queue_head_node(struct be_queue_info *q)
159{
160 return q->dma_mem.va + q->head * q->entry_size;
161}
162
163static inline void *queue_tail_node(struct be_queue_info *q)
164{
165 return q->dma_mem.va + q->tail * q->entry_size;
166}
167
Somnath Kotur3de09452011-09-30 07:25:05 +0000168static inline void *queue_index_node(struct be_queue_info *q, u16 index)
169{
170 return q->dma_mem.va + index * q->entry_size;
171}
172
Sathya Perla5fb379e2009-06-18 00:02:59 +0000173static inline void queue_head_inc(struct be_queue_info *q)
174{
175 index_inc(&q->head, q->len);
176}
177
Padmanabh Ratnakar652bf642012-04-25 01:47:03 +0000178static inline void index_dec(u16 *index, u16 limit)
179{
180 *index = MODULO((*index - 1), limit);
181}
182
Sathya Perla5fb379e2009-06-18 00:02:59 +0000183static inline void queue_tail_inc(struct be_queue_info *q)
184{
185 index_inc(&q->tail, q->len);
186}
187
Sathya Perla5fb379e2009-06-18 00:02:59 +0000188struct be_eq_obj {
189 struct be_queue_info q;
190 char desc[32];
191
192 /* Adaptive interrupt coalescing (AIC) info */
193 bool enable_aic;
Sathya Perla10ef9ab2012-02-09 18:05:27 +0000194 u32 min_eqd; /* in usecs */
195 u32 max_eqd; /* in usecs */
196 u32 eqd; /* configured val when aic is off */
197 u32 cur_eqd; /* in usecs */
Sathya Perla5fb379e2009-06-18 00:02:59 +0000198
Sathya Perla10ef9ab2012-02-09 18:05:27 +0000199 u8 idx; /* array index */
Sathya Perlaf2f781a2013-08-27 16:57:30 +0530200 u8 msix_idx;
Sathya Perla10ef9ab2012-02-09 18:05:27 +0000201 u16 tx_budget;
Sathya Perlad0b9cec2013-01-11 22:47:02 +0000202 u16 spurious_intr;
Sathya Perla5fb379e2009-06-18 00:02:59 +0000203 struct napi_struct napi;
Sathya Perla10ef9ab2012-02-09 18:05:27 +0000204 struct be_adapter *adapter;
Sathya Perla6384a4d2013-10-25 10:40:16 +0530205
206#ifdef CONFIG_NET_RX_BUSY_POLL
207#define BE_EQ_IDLE 0
208#define BE_EQ_NAPI 1 /* napi owns this EQ */
209#define BE_EQ_POLL 2 /* poll owns this EQ */
210#define BE_EQ_LOCKED (BE_EQ_NAPI | BE_EQ_POLL)
211#define BE_EQ_NAPI_YIELD 4 /* napi yielded this EQ */
212#define BE_EQ_POLL_YIELD 8 /* poll yielded this EQ */
213#define BE_EQ_YIELD (BE_EQ_NAPI_YIELD | BE_EQ_POLL_YIELD)
214#define BE_EQ_USER_PEND (BE_EQ_POLL | BE_EQ_POLL_YIELD)
215 unsigned int state;
216 spinlock_t lock; /* lock to serialize napi and busy-poll */
217#endif /* CONFIG_NET_RX_BUSY_POLL */
Sathya Perla10ef9ab2012-02-09 18:05:27 +0000218} ____cacheline_aligned_in_smp;
Sathya Perla5fb379e2009-06-18 00:02:59 +0000219
Sathya Perla2632baf2013-10-01 16:00:00 +0530220struct be_aic_obj { /* Adaptive interrupt coalescing (AIC) info */
221 bool enable;
222 u32 min_eqd; /* in usecs */
223 u32 max_eqd; /* in usecs */
224 u32 prev_eqd; /* in usecs */
225 u32 et_eqd; /* configured val when aic is off */
226 ulong jiffies;
227 u64 rx_pkts_prev; /* Used to calculate RX pps */
228 u64 tx_reqs_prev; /* Used to calculate TX pps */
229};
230
Sathya Perla6384a4d2013-10-25 10:40:16 +0530231enum {
232 NAPI_POLLING,
233 BUSY_POLLING
234};
235
Sathya Perla5fb379e2009-06-18 00:02:59 +0000236struct be_mcc_obj {
237 struct be_queue_info q;
238 struct be_queue_info cq;
Sathya Perla7a1e9b22010-02-17 01:35:11 +0000239 bool rearm_cq;
Sathya Perla5fb379e2009-06-18 00:02:59 +0000240};
241
Sathya Perla3abcded2010-10-03 22:12:27 -0700242struct be_tx_stats {
Sathya Perlaac124ff2011-07-25 19:10:14 +0000243 u64 tx_bytes;
244 u64 tx_pkts;
245 u64 tx_reqs;
246 u64 tx_wrbs;
247 u64 tx_compl;
248 ulong tx_jiffies;
249 u32 tx_stops;
Sathya Perlabc617522013-10-01 16:00:01 +0530250 u32 tx_drv_drops; /* pkts dropped by driver */
Sathya Perlaab1594e2011-07-25 19:10:15 +0000251 struct u64_stats_sync sync;
252 struct u64_stats_sync sync_compl;
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700253};
254
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700255struct be_tx_obj {
Vasundhara Volam94d73aa2013-04-21 23:28:14 +0000256 u32 db_offset;
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700257 struct be_queue_info q;
258 struct be_queue_info cq;
259 /* Remember the skbs that were transmitted */
260 struct sk_buff *sent_skb_list[TX_Q_LEN];
Sathya Perla3c8def92011-06-12 20:01:58 +0000261 struct be_tx_stats stats;
Sathya Perla10ef9ab2012-02-09 18:05:27 +0000262} ____cacheline_aligned_in_smp;
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700263
264/* Struct to remember the pages posted for rx frags */
265struct be_rx_page_info {
266 struct page *page;
Sathya Perlae50287b2014-03-04 12:14:38 +0530267 /* set to page-addr for last frag of the page & frag-addr otherwise */
FUJITA Tomonorifac6da52010-04-01 16:53:22 +0000268 DEFINE_DMA_UNMAP_ADDR(bus);
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700269 u16 page_offset;
Sathya Perlae50287b2014-03-04 12:14:38 +0530270 bool last_frag; /* last frag of the page */
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700271};
272
Sathya Perla3abcded2010-10-03 22:12:27 -0700273struct be_rx_stats {
Sathya Perla3abcded2010-10-03 22:12:27 -0700274 u64 rx_bytes;
Sathya Perla3abcded2010-10-03 22:12:27 -0700275 u64 rx_pkts;
Sathya Perlaac124ff2011-07-25 19:10:14 +0000276 u32 rx_drops_no_skbs; /* skb allocation errors */
277 u32 rx_drops_no_frags; /* HW has no fetched frags */
278 u32 rx_post_fail; /* page post alloc failures */
Sathya Perlaac124ff2011-07-25 19:10:14 +0000279 u32 rx_compl;
Sathya Perla3abcded2010-10-03 22:12:27 -0700280 u32 rx_mcast_pkts;
Sathya Perlaac124ff2011-07-25 19:10:14 +0000281 u32 rx_compl_err; /* completions with err set */
Sathya Perlaab1594e2011-07-25 19:10:15 +0000282 struct u64_stats_sync sync;
Sathya Perla3abcded2010-10-03 22:12:27 -0700283};
284
Sathya Perla2e588f82011-03-11 02:49:26 +0000285struct be_rx_compl_info {
286 u32 rss_hash;
Somnath Kotur6709d952011-05-04 22:40:46 +0000287 u16 vlan_tag;
Sathya Perla2e588f82011-03-11 02:49:26 +0000288 u16 pkt_size;
Sathya Perla12004ae2011-08-02 19:57:46 +0000289 u16 port;
Sathya Perla2e588f82011-03-11 02:49:26 +0000290 u8 vlanf;
291 u8 num_rcvd;
292 u8 err;
293 u8 ipf;
294 u8 tcpf;
295 u8 udpf;
296 u8 ip_csum;
297 u8 l4_csum;
298 u8 ipv6;
Vasundhara Volamf93f1602014-02-12 16:09:25 +0530299 u8 qnq;
Sathya Perla2e588f82011-03-11 02:49:26 +0000300 u8 pkt_type;
Somnath Koture38b1702013-05-29 22:55:56 +0000301 u8 ip_frag;
Sathya Perlac9c47142014-03-27 10:46:19 +0530302 u8 tunneled;
Sathya Perla2e588f82011-03-11 02:49:26 +0000303};
304
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700305struct be_rx_obj {
Sathya Perla3abcded2010-10-03 22:12:27 -0700306 struct be_adapter *adapter;
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700307 struct be_queue_info q;
308 struct be_queue_info cq;
Sathya Perla2e588f82011-03-11 02:49:26 +0000309 struct be_rx_compl_info rxcp;
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700310 struct be_rx_page_info page_info_tbl[RX_Q_LEN];
Sathya Perla3abcded2010-10-03 22:12:27 -0700311 struct be_rx_stats stats;
312 u8 rss_id;
313 bool rx_post_starved; /* Zero rx frags have been posted to BE */
Sathya Perla10ef9ab2012-02-09 18:05:27 +0000314} ____cacheline_aligned_in_smp;
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700315
Ajit Khaparde609ff3b2011-02-20 11:42:07 +0000316struct be_drv_stats {
Somnath Kotur9ae081c2011-09-30 07:23:35 +0000317 u32 be_on_die_temperature;
Sathya Perlaac124ff2011-07-25 19:10:14 +0000318 u32 eth_red_drops;
319 u32 rx_drops_no_pbuf;
320 u32 rx_drops_no_txpb;
321 u32 rx_drops_no_erx_descr;
322 u32 rx_drops_no_tpre_descr;
323 u32 rx_drops_too_many_frags;
Sathya Perlaac124ff2011-07-25 19:10:14 +0000324 u32 forwarded_packets;
325 u32 rx_drops_mtu;
326 u32 rx_crc_errors;
327 u32 rx_alignment_symbol_errors;
328 u32 rx_pause_frames;
329 u32 rx_priority_pause_frames;
330 u32 rx_control_frames;
331 u32 rx_in_range_errors;
332 u32 rx_out_range_errors;
333 u32 rx_frame_too_long;
Suresh Reddy18fb06a2013-04-25 23:03:21 +0000334 u32 rx_address_filtered;
Sathya Perlaac124ff2011-07-25 19:10:14 +0000335 u32 rx_dropped_too_small;
336 u32 rx_dropped_too_short;
337 u32 rx_dropped_header_too_small;
338 u32 rx_dropped_tcp_length;
339 u32 rx_dropped_runt;
340 u32 rx_ip_checksum_errs;
341 u32 rx_tcp_checksum_errs;
342 u32 rx_udp_checksum_errs;
343 u32 tx_pauseframes;
344 u32 tx_priority_pauseframes;
345 u32 tx_controlframes;
346 u32 rxpp_fifo_overflow_drop;
347 u32 rx_input_fifo_overflow_drop;
348 u32 pmem_fifo_overflow_drop;
349 u32 jabber_events;
Ajit Khaparde461ae372013-10-03 16:16:50 -0500350 u32 rx_roce_bytes_lsd;
351 u32 rx_roce_bytes_msd;
352 u32 rx_roce_frames;
353 u32 roce_drops_payload_len;
354 u32 roce_drops_crc;
Ajit Khaparde609ff3b2011-02-20 11:42:07 +0000355};
356
Somnath Koturc5022242014-03-03 14:24:20 +0530357/* A vlan-id of 0xFFFF must be used to clear transparent vlan-tagging */
358#define BE_RESET_VLAN_TAG_ID 0xFFFF
359
Ajit Khaparde64600ea2010-07-23 01:50:34 +0000360struct be_vf_cfg {
Sathya Perla11ac75e2011-12-13 00:58:50 +0000361 unsigned char mac_addr[ETH_ALEN];
362 int if_handle;
363 int pmac_id;
364 u16 vlan_tag;
365 u32 tx_rate;
Suresh Reddybdce2ad2014-03-11 18:53:04 +0530366 u32 plink_tracking;
Ajit Khaparde64600ea2010-07-23 01:50:34 +0000367};
368
Sathya Perla39f1d942012-05-08 19:41:24 +0000369enum vf_state {
370 ENABLED = 0,
371 ASSIGNED = 1
372};
373
Ajit Khapardeb236916a2011-12-30 12:15:40 +0000374#define BE_FLAGS_LINK_STATUS_INIT 1
Sathya Perla191eb752012-02-23 18:50:13 +0000375#define BE_FLAGS_WORKER_SCHEDULED (1 << 3)
Ajit Khaparded9d604f2013-09-27 15:17:58 -0500376#define BE_FLAGS_VLAN_PROMISC (1 << 4)
Kalesh APa0794882014-05-30 19:06:23 +0530377#define BE_FLAGS_MCAST_PROMISC (1 << 5)
Somnath Kotur04d3d622013-05-02 03:36:55 +0000378#define BE_FLAGS_NAPI_ENABLED (1 << 9)
Ajit Khapardebc0c3402013-04-24 11:52:50 +0000379#define BE_FLAGS_QNQ_ASYNC_EVT_RCVD (1 << 11)
Sathya Perlac9c47142014-03-27 10:46:19 +0530380#define BE_FLAGS_VXLAN_OFFLOADS (1 << 12)
Kalesh APe1ad8e32014-04-14 16:12:41 +0530381#define BE_FLAGS_SETUP_DONE (1 << 13)
Ajit Khapardeb236916a2011-12-30 12:15:40 +0000382
Sathya Perlac9c47142014-03-27 10:46:19 +0530383#define BE_UC_PMAC_COUNT 30
384#define BE_VF_UC_PMAC_COUNT 2
Somnath Kotur5c510812013-05-30 02:52:23 +0000385/* Ethtool set_dump flags */
386#define LANCER_INITIATE_FW_DUMP 0x1
387
Ajit Khaparde42f11cf2012-04-21 18:53:22 +0000388struct phy_info {
389 u8 transceiver;
390 u8 autoneg;
391 u8 fc_autoneg;
392 u8 port_type;
393 u16 phy_type;
394 u16 interface_type;
395 u32 misc_params;
396 u16 auto_speeds_supported;
397 u16 fixed_speeds_supported;
398 int link_speed;
Ajit Khaparde42f11cf2012-04-21 18:53:22 +0000399 u32 dac_cable_len;
400 u32 advertising;
401 u32 supported;
402};
403
Sathya Perla92bf14a2013-08-27 16:57:32 +0530404struct be_resources {
405 u16 max_vfs; /* Total VFs "really" supported by FW/HW */
406 u16 max_mcast_mac;
407 u16 max_tx_qs;
408 u16 max_rss_qs;
409 u16 max_rx_qs;
410 u16 max_uc_mac; /* Max UC MACs programmable */
411 u16 max_vlans; /* Number of vlans supported */
412 u16 max_evt_qs;
413 u32 if_cap_flags;
414};
415
Venkata Duvvurue2557872014-04-21 15:38:00 +0530416struct rss_info {
417 u64 rss_flags;
418 u8 rsstable[RSS_INDIR_TABLE_LEN];
419 u8 rss_queue[RSS_INDIR_TABLE_LEN];
420 u8 rss_hkey[RSS_HASH_KEY_LEN];
421};
422
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700423struct be_adapter {
424 struct pci_dev *pdev;
425 struct net_device *netdev;
426
Sathya Perlac5b3ad42013-03-05 22:23:20 +0000427 u8 __iomem *csr; /* CSR BAR used only for BE2/3 */
Sathya Perla8788fdc2009-07-27 22:52:03 +0000428 u8 __iomem *db; /* Door Bell */
Sathya Perla8788fdc2009-07-27 22:52:03 +0000429
Ivan Vecera29849612010-12-14 05:43:19 +0000430 struct mutex mbox_lock; /* For serializing mbox cmds to BE card */
Sathya Perla8788fdc2009-07-27 22:52:03 +0000431 struct be_dma_mem mbox_mem;
432 /* Mbox mem is adjusted to align to 16 bytes. The allocated addr
433 * is stored for freeing purpose */
434 struct be_dma_mem mbox_mem_alloced;
435
436 struct be_mcc_obj mcc_obj;
437 spinlock_t mcc_lock; /* For serializing mcc cmds to BE card */
438 spinlock_t mcc_cq_lock;
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700439
Sathya Perla92bf14a2013-08-27 16:57:32 +0530440 u16 cfg_num_qs; /* configured via set-channels */
441 u16 num_evt_qs;
442 u16 num_msix_vec;
443 struct be_eq_obj eq_obj[MAX_EVT_QS];
Sathya Perla10ef9ab2012-02-09 18:05:27 +0000444 struct msix_entry msix_entries[MAX_MSIX_VECTORS];
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700445 bool isr_registered;
446
447 /* TX Rings */
Sathya Perla92bf14a2013-08-27 16:57:32 +0530448 u16 num_tx_qs;
Sathya Perla3c8def92011-06-12 20:01:58 +0000449 struct be_tx_obj tx_obj[MAX_TX_QS];
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700450
451 /* Rx rings */
Sathya Perla92bf14a2013-08-27 16:57:32 +0530452 u16 num_rx_qs;
Sathya Perla10ef9ab2012-02-09 18:05:27 +0000453 struct be_rx_obj rx_obj[MAX_RX_QS];
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700454 u32 big_page_size; /* Compounded page size shared by rx wrbs */
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700455
Ajit Khaparde609ff3b2011-02-20 11:42:07 +0000456 struct be_drv_stats drv_stats;
Sathya Perla2632baf2013-10-01 16:00:00 +0530457 struct be_aic_obj aic_obj[MAX_EVT_QS];
Ajit Khaparde82903e42010-02-09 01:34:57 +0000458 u16 vlans_added;
Ravikumar Nelavellif6cbd362014-05-09 13:29:16 +0530459 unsigned long vids[BITS_TO_LONGS(VLAN_N_VID)];
Somnath Koturcc4ce022010-10-21 07:11:14 -0700460 u8 vlan_prio_bmap; /* Available Priority BitMap */
461 u16 recommended_prio; /* Recommended Priority */
Sathya Perla5b8821b2011-08-02 19:57:44 +0000462 struct be_dma_mem rx_filter; /* Cmd DMA mem for rx-filter */
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700463
Sathya Perla3abcded2010-10-03 22:12:27 -0700464 struct be_dma_mem stats_cmd;
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700465 /* Work queue used to perform periodic tasks like getting statistics */
466 struct delayed_work work;
Ajit Khaparde609ff3b2011-02-20 11:42:07 +0000467 u16 work_counter;
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700468
Padmanabh Ratnakarf67ef7b2012-07-12 03:57:09 +0000469 struct delayed_work func_recovery_work;
Ajit Khapardeb236916a2011-12-30 12:15:40 +0000470 u32 flags;
Padmanabh Ratnakarf25b1192012-10-20 06:02:52 +0000471 u32 cmd_privileges;
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700472 /* Ethtool knobs and info */
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700473 char fw_ver[FW_VER_LEN];
Somnath Kotureeb65ce2013-05-26 21:08:36 +0000474 char fw_on_flash[FW_VER_LEN];
Sathya Perla30128032011-11-10 19:17:57 +0000475 int if_handle; /* Used to configure filtering */
Ajit Khapardefbc13f02012-03-18 06:23:21 +0000476 u32 *pmac_id; /* MAC addr handle used by BE card */
stephen hemminger1a642462011-04-04 11:06:40 +0000477 u32 beacon_state; /* for set_phys_id */
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700478
Padmanabh Ratnakarf67ef7b2012-07-12 03:57:09 +0000479 bool eeh_error;
Sathya Perla6589ade2011-11-10 19:18:00 +0000480 bool fw_timeout;
Padmanabh Ratnakarf67ef7b2012-07-12 03:57:09 +0000481 bool hw_error;
482
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700483 u32 port_num;
Sathya Perla24307ee2009-06-18 00:09:25 +0000484 bool promiscuous;
Vasundhara Volamf93f1602014-02-12 16:09:25 +0530485 u8 mc_type;
Ajit Khaparde3486be22010-07-23 02:04:54 +0000486 u32 function_mode;
Sathya Perla3abcded2010-10-03 22:12:27 -0700487 u32 function_caps;
Ajit Khaparde9e90c962009-11-06 02:06:59 +0000488 u32 rx_fc; /* Rx flow control */
489 u32 tx_fc; /* Tx flow control */
Ajit Khapardeb2aebe62011-02-20 11:41:39 +0000490 bool stats_cmd_sent;
Parav Pandit045508a2012-03-26 14:27:13 +0000491 struct {
Parav Pandit045508a2012-03-26 14:27:13 +0000492 u32 size;
493 u32 total_size;
494 u64 io_addr;
495 } roce_db;
496 u32 num_msix_roce_vec;
497 struct ocrdma_dev *ocrdma_dev;
498 struct list_head entry;
499
Sarveshwar Bandidd131e72010-05-25 16:16:32 -0700500 u32 flash_status;
Suresh Reddy5eeff632014-01-06 13:02:24 +0530501 struct completion et_cmd_compl;
Sarveshwar Bandiba343c72010-03-31 02:56:12 +0000502
Sathya Perla92bf14a2013-08-27 16:57:32 +0530503 struct be_resources res; /* resources available for the func */
504 u16 num_vfs; /* Number of VFs provisioned by PF */
Sathya Perla39f1d942012-05-08 19:41:24 +0000505 u8 virtfn;
Sathya Perla11ac75e2011-12-13 00:58:50 +0000506 struct be_vf_cfg *vf_cfg;
507 bool be3_native;
Sathya Perlafe6d2a32010-11-21 23:25:50 +0000508 u32 sli_family;
Ajit Khaparde9e1453c2011-02-20 11:42:22 +0000509 u8 hba_port_num;
Ajit Khaparde3968fa12011-02-20 11:41:53 +0000510 u16 pvid;
Sathya Perlac9c47142014-03-27 10:46:19 +0530511 __be16 vxlan_port;
Ajit Khaparde42f11cf2012-04-21 18:53:22 +0000512 struct phy_info phy;
Ajit Khaparde4762f6c2012-03-18 06:23:11 +0000513 u8 wol_cap;
Suresh Reddy76a9e082014-01-15 13:23:40 +0530514 bool wol_en;
Ajit Khapardefbc13f02012-03-18 06:23:21 +0000515 u32 uc_macs; /* Count of secondary UC MAC programmed */
Vasundhara Volam0ad31572013-04-21 23:28:16 +0000516 u16 asic_rev;
Ajit Khapardebc0c3402013-04-24 11:52:50 +0000517 u16 qnq_vid;
Somnath Kotur941a77d2012-05-17 22:59:03 +0000518 u32 msg_enable;
Padmanabh Ratnakar7aeb2152012-07-12 03:56:46 +0000519 int be_get_temp_freq;
Padmanabh Ratnakard5c18472012-10-20 06:01:53 +0000520 u8 pf_number;
Venkata Duvvurue2557872014-04-21 15:38:00 +0530521 struct rss_info rss_info;
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700522};
523
Sathya Perla39f1d942012-05-08 19:41:24 +0000524#define be_physfn(adapter) (!adapter->virtfn)
Ajit Khaparde2c7a9dc2013-11-22 12:51:28 -0600525#define be_virtfn(adapter) (adapter->virtfn)
Sathya Perla11ac75e2011-12-13 00:58:50 +0000526#define sriov_enabled(adapter) (adapter->num_vfs > 0)
Vasundhara Volamb905b5d2013-10-01 15:59:56 +0530527#define sriov_want(adapter) (be_physfn(adapter) && \
528 (num_vfs || pci_num_vf(adapter->pdev)))
Sathya Perla11ac75e2011-12-13 00:58:50 +0000529#define for_all_vfs(adapter, vf_cfg, i) \
530 for (i = 0, vf_cfg = &adapter->vf_cfg[i]; i < adapter->num_vfs; \
531 i++, vf_cfg++)
Sarveshwar Bandiba343c72010-03-31 02:56:12 +0000532
Sathya Perla5b8821b2011-08-02 19:57:44 +0000533#define ON 1
534#define OFF 0
Sathya Perlaca34fe382012-11-06 17:48:56 +0000535
Sathya Perla92bf14a2013-08-27 16:57:32 +0530536#define be_max_vlans(adapter) (adapter->res.max_vlans)
537#define be_max_uc(adapter) (adapter->res.max_uc_mac)
538#define be_max_mc(adapter) (adapter->res.max_mcast_mac)
539#define be_max_vfs(adapter) (adapter->res.max_vfs)
540#define be_max_rss(adapter) (adapter->res.max_rss_qs)
541#define be_max_txqs(adapter) (adapter->res.max_tx_qs)
542#define be_max_prio_txqs(adapter) (adapter->res.max_prio_tx_qs)
543#define be_max_rxqs(adapter) (adapter->res.max_rx_qs)
544#define be_max_eqs(adapter) (adapter->res.max_evt_qs)
545#define be_if_cap_flags(adapter) (adapter->res.if_cap_flags)
546
547static inline u16 be_max_qs(struct be_adapter *adapter)
548{
549 /* If no RSS, need atleast the one def RXQ */
550 u16 num = max_t(u16, be_max_rss(adapter), 1);
551
552 num = min(num, be_max_eqs(adapter));
553 return min_t(u16, num, num_online_cpus());
554}
555
Vasundhara Volamf93f1602014-02-12 16:09:25 +0530556/* Is BE in pvid_tagging mode */
557#define be_pvid_tagging_enabled(adapter) (adapter->pvid)
558
559/* Is BE in QNQ multi-channel mode */
560#define be_is_qnq_mode(adapter) (adapter->mc_type == FLEX10 || \
561 adapter->mc_type == vNIC1 || \
562 adapter->mc_type == UFP)
563
Sathya Perlaca34fe382012-11-06 17:48:56 +0000564#define lancer_chip(adapter) (adapter->pdev->device == OC_DEVICE_ID3 || \
565 adapter->pdev->device == OC_DEVICE_ID4)
Sathya Perlafe6d2a32010-11-21 23:25:50 +0000566
Padmanabh Ratnakar76b73532012-10-20 06:04:40 +0000567#define skyhawk_chip(adapter) (adapter->pdev->device == OC_DEVICE_ID5 || \
568 adapter->pdev->device == OC_DEVICE_ID6)
Padmanabh Ratnakard3bd3a52012-07-12 03:57:47 +0000569
Sathya Perlaca34fe382012-11-06 17:48:56 +0000570#define BE3_chip(adapter) (adapter->pdev->device == BE_DEVICE_ID2 || \
571 adapter->pdev->device == OC_DEVICE_ID2)
572
573#define BE2_chip(adapter) (adapter->pdev->device == BE_DEVICE_ID1 || \
574 adapter->pdev->device == OC_DEVICE_ID1)
575
576#define BEx_chip(adapter) (BE3_chip(adapter) || BE2_chip(adapter))
Padmanabh Ratnakard3bd3a52012-07-12 03:57:47 +0000577
Sathya Perladbf0f2a2012-11-06 17:49:00 +0000578#define be_roce_supported(adapter) (skyhawk_chip(adapter) && \
579 (adapter->function_mode & RDMA_ENABLED))
Parav Pandit045508a2012-03-26 14:27:13 +0000580
Stephen Hemminger0fc0b732009-09-02 01:03:33 -0700581extern const struct ethtool_ops be_ethtool_ops;
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700582
Sathya Perlaac6a0c42011-03-21 20:49:25 +0000583#define msix_enabled(adapter) (adapter->num_msix_vec > 0)
Sathya Perla10ef9ab2012-02-09 18:05:27 +0000584#define num_irqs(adapter) (msix_enabled(adapter) ? \
585 adapter->num_msix_vec : 1)
586#define tx_stats(txo) (&(txo)->stats)
587#define rx_stats(rxo) (&(rxo)->stats)
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700588
Sathya Perla10ef9ab2012-02-09 18:05:27 +0000589/* The default RXQ is the last RXQ */
590#define default_rxo(adpt) (&adpt->rx_obj[adpt->num_rx_qs - 1])
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700591
Sathya Perla3abcded2010-10-03 22:12:27 -0700592#define for_all_rx_queues(adapter, rxo, i) \
593 for (i = 0, rxo = &adapter->rx_obj[i]; i < adapter->num_rx_qs; \
594 i++, rxo++)
595
Sathya Perla10ef9ab2012-02-09 18:05:27 +0000596/* Skip the default non-rss queue (last one)*/
Sathya Perla3abcded2010-10-03 22:12:27 -0700597#define for_all_rss_queues(adapter, rxo, i) \
Sathya Perla10ef9ab2012-02-09 18:05:27 +0000598 for (i = 0, rxo = &adapter->rx_obj[i]; i < (adapter->num_rx_qs - 1);\
Sathya Perla3abcded2010-10-03 22:12:27 -0700599 i++, rxo++)
600
Sathya Perla3c8def92011-06-12 20:01:58 +0000601#define for_all_tx_queues(adapter, txo, i) \
602 for (i = 0, txo = &adapter->tx_obj[i]; i < adapter->num_tx_qs; \
603 i++, txo++)
604
Sathya Perla10ef9ab2012-02-09 18:05:27 +0000605#define for_all_evt_queues(adapter, eqo, i) \
606 for (i = 0, eqo = &adapter->eq_obj[i]; i < adapter->num_evt_qs; \
607 i++, eqo++)
608
Sathya Perla6384a4d2013-10-25 10:40:16 +0530609#define for_all_rx_queues_on_eq(adapter, eqo, rxo, i) \
610 for (i = eqo->idx, rxo = &adapter->rx_obj[i]; i < adapter->num_rx_qs;\
611 i += adapter->num_evt_qs, rxo += adapter->num_evt_qs)
612
Sathya Perla10ef9ab2012-02-09 18:05:27 +0000613#define is_mcc_eqo(eqo) (eqo->idx == 0)
614#define mcc_eqo(adapter) (&adapter->eq_obj[0])
615
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700616#define PAGE_SHIFT_4K 12
617#define PAGE_SIZE_4K (1 << PAGE_SHIFT_4K)
618
619/* Returns number of pages spanned by the data starting at the given addr */
620#define PAGES_4K_SPANNED(_address, size) \
621 ((u32)((((size_t)(_address) & (PAGE_SIZE_4K - 1)) + \
622 (size) + (PAGE_SIZE_4K - 1)) >> PAGE_SHIFT_4K))
623
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700624/* Returns bit offset within a DWORD of a bitfield */
625#define AMAP_BIT_OFFSET(_struct, field) \
626 (((size_t)&(((_struct *)0)->field))%32)
627
628/* Returns the bit mask of the field that is NOT shifted into location. */
629static inline u32 amap_mask(u32 bitsize)
630{
631 return (bitsize == 32 ? 0xFFFFFFFF : (1 << bitsize) - 1);
632}
633
634static inline void
635amap_set(void *ptr, u32 dw_offset, u32 mask, u32 offset, u32 value)
636{
637 u32 *dw = (u32 *) ptr + dw_offset;
638 *dw &= ~(mask << offset);
639 *dw |= (mask & value) << offset;
640}
641
642#define AMAP_SET_BITS(_struct, field, ptr, val) \
643 amap_set(ptr, \
644 offsetof(_struct, field)/32, \
645 amap_mask(sizeof(((_struct *)0)->field)), \
646 AMAP_BIT_OFFSET(_struct, field), \
647 val)
648
649static inline u32 amap_get(void *ptr, u32 dw_offset, u32 mask, u32 offset)
650{
651 u32 *dw = (u32 *) ptr;
652 return mask & (*(dw + dw_offset) >> offset);
653}
654
655#define AMAP_GET_BITS(_struct, field, ptr) \
656 amap_get(ptr, \
657 offsetof(_struct, field)/32, \
658 amap_mask(sizeof(((_struct *)0)->field)), \
659 AMAP_BIT_OFFSET(_struct, field))
660
661#define be_dws_cpu_to_le(wrb, len) swap_dws(wrb, len)
662#define be_dws_le_to_cpu(wrb, len) swap_dws(wrb, len)
663static inline void swap_dws(void *wrb, int len)
664{
665#ifdef __BIG_ENDIAN
666 u32 *dw = wrb;
667 BUG_ON(len % 4);
668 do {
669 *dw = cpu_to_le32(*dw);
670 dw++;
671 len -= 4;
672 } while (len);
673#endif /* __BIG_ENDIAN */
674}
675
676static inline u8 is_tcp_pkt(struct sk_buff *skb)
677{
678 u8 val = 0;
679
680 if (ip_hdr(skb)->version == 4)
681 val = (ip_hdr(skb)->protocol == IPPROTO_TCP);
682 else if (ip_hdr(skb)->version == 6)
683 val = (ipv6_hdr(skb)->nexthdr == NEXTHDR_TCP);
684
685 return val;
686}
687
688static inline u8 is_udp_pkt(struct sk_buff *skb)
689{
690 u8 val = 0;
691
692 if (ip_hdr(skb)->version == 4)
693 val = (ip_hdr(skb)->protocol == IPPROTO_UDP);
694 else if (ip_hdr(skb)->version == 6)
695 val = (ipv6_hdr(skb)->nexthdr == NEXTHDR_UDP);
696
697 return val;
698}
699
Somnath Kotur93040ae2012-06-26 22:32:10 +0000700static inline bool is_ipv4_pkt(struct sk_buff *skb)
701{
Li RongQinge8efcec2012-07-04 16:05:42 +0000702 return skb->protocol == htons(ETH_P_IP) && ip_hdr(skb)->version == 4;
Somnath Kotur93040ae2012-06-26 22:32:10 +0000703}
704
Ajit Khaparde6d87f5c2010-08-25 00:32:33 +0000705static inline void be_vf_eth_addr_generate(struct be_adapter *adapter, u8 *mac)
706{
707 u32 addr;
708
709 addr = jhash(adapter->netdev->dev_addr, ETH_ALEN, 0);
710
711 mac[5] = (u8)(addr & 0xFF);
712 mac[4] = (u8)((addr >> 8) & 0xFF);
713 mac[3] = (u8)((addr >> 16) & 0xFF);
Ajit Khaparde7a2414a2011-02-11 13:36:18 +0000714 /* Use the OUI from the current MAC address */
715 memcpy(mac, adapter->netdev->dev_addr, 3);
Ajit Khaparde6d87f5c2010-08-25 00:32:33 +0000716}
717
Ajit Khaparde4b972912011-04-06 18:07:43 +0000718static inline bool be_multi_rxq(const struct be_adapter *adapter)
719{
720 return adapter->num_rx_qs > 1;
721}
722
Sathya Perla6589ade2011-11-10 19:18:00 +0000723static inline bool be_error(struct be_adapter *adapter)
724{
Padmanabh Ratnakarf67ef7b2012-07-12 03:57:09 +0000725 return adapter->eeh_error || adapter->hw_error || adapter->fw_timeout;
726}
727
Sathya Perlad23e9462012-12-17 19:38:51 +0000728static inline bool be_hw_error(struct be_adapter *adapter)
Padmanabh Ratnakarf67ef7b2012-07-12 03:57:09 +0000729{
730 return adapter->eeh_error || adapter->hw_error;
731}
732
733static inline void be_clear_all_error(struct be_adapter *adapter)
734{
735 adapter->eeh_error = false;
736 adapter->hw_error = false;
737 adapter->fw_timeout = false;
Sathya Perla6589ade2011-11-10 19:18:00 +0000738}
739
Ajit Khaparde4762f6c2012-03-18 06:23:11 +0000740static inline bool be_is_wol_excluded(struct be_adapter *adapter)
741{
742 struct pci_dev *pdev = adapter->pdev;
743
744 if (!be_physfn(adapter))
745 return true;
746
747 switch (pdev->subsystem_device) {
748 case OC_SUBSYS_DEVICE_ID1:
749 case OC_SUBSYS_DEVICE_ID2:
750 case OC_SUBSYS_DEVICE_ID3:
751 case OC_SUBSYS_DEVICE_ID4:
752 return true;
753 default:
754 return false;
755 }
756}
757
Ajit Khapardebc0c3402013-04-24 11:52:50 +0000758static inline int qnq_async_evt_rcvd(struct be_adapter *adapter)
759{
760 return adapter->flags & BE_FLAGS_QNQ_ASYNC_EVT_RCVD;
761}
762
Sathya Perla6384a4d2013-10-25 10:40:16 +0530763#ifdef CONFIG_NET_RX_BUSY_POLL
764static inline bool be_lock_napi(struct be_eq_obj *eqo)
765{
766 bool status = true;
767
768 spin_lock(&eqo->lock); /* BH is already disabled */
769 if (eqo->state & BE_EQ_LOCKED) {
770 WARN_ON(eqo->state & BE_EQ_NAPI);
771 eqo->state |= BE_EQ_NAPI_YIELD;
772 status = false;
773 } else {
774 eqo->state = BE_EQ_NAPI;
775 }
776 spin_unlock(&eqo->lock);
777 return status;
778}
779
780static inline void be_unlock_napi(struct be_eq_obj *eqo)
781{
782 spin_lock(&eqo->lock); /* BH is already disabled */
783
784 WARN_ON(eqo->state & (BE_EQ_POLL | BE_EQ_NAPI_YIELD));
785 eqo->state = BE_EQ_IDLE;
786
787 spin_unlock(&eqo->lock);
788}
789
790static inline bool be_lock_busy_poll(struct be_eq_obj *eqo)
791{
792 bool status = true;
793
794 spin_lock_bh(&eqo->lock);
795 if (eqo->state & BE_EQ_LOCKED) {
796 eqo->state |= BE_EQ_POLL_YIELD;
797 status = false;
798 } else {
799 eqo->state |= BE_EQ_POLL;
800 }
801 spin_unlock_bh(&eqo->lock);
802 return status;
803}
804
805static inline void be_unlock_busy_poll(struct be_eq_obj *eqo)
806{
807 spin_lock_bh(&eqo->lock);
808
809 WARN_ON(eqo->state & (BE_EQ_NAPI));
810 eqo->state = BE_EQ_IDLE;
811
812 spin_unlock_bh(&eqo->lock);
813}
814
815static inline void be_enable_busy_poll(struct be_eq_obj *eqo)
816{
817 spin_lock_init(&eqo->lock);
818 eqo->state = BE_EQ_IDLE;
819}
820
821static inline void be_disable_busy_poll(struct be_eq_obj *eqo)
822{
823 local_bh_disable();
824
825 /* It's enough to just acquire napi lock on the eqo to stop
826 * be_busy_poll() from processing any queueus.
827 */
828 while (!be_lock_napi(eqo))
829 mdelay(1);
830
831 local_bh_enable();
832}
833
834#else /* CONFIG_NET_RX_BUSY_POLL */
835
836static inline bool be_lock_napi(struct be_eq_obj *eqo)
837{
838 return true;
839}
840
841static inline void be_unlock_napi(struct be_eq_obj *eqo)
842{
843}
844
845static inline bool be_lock_busy_poll(struct be_eq_obj *eqo)
846{
847 return false;
848}
849
850static inline void be_unlock_busy_poll(struct be_eq_obj *eqo)
851{
852}
853
854static inline void be_enable_busy_poll(struct be_eq_obj *eqo)
855{
856}
857
858static inline void be_disable_busy_poll(struct be_eq_obj *eqo)
859{
860}
861#endif /* CONFIG_NET_RX_BUSY_POLL */
862
Joe Perches31886e82013-09-23 15:11:36 -0700863void be_cq_notify(struct be_adapter *adapter, u16 qid, bool arm,
864 u16 num_popped);
865void be_link_status_update(struct be_adapter *adapter, u8 link_status);
866void be_parse_stats(struct be_adapter *adapter);
867int be_load_fw(struct be_adapter *adapter, u8 *func);
868bool be_is_wol_supported(struct be_adapter *adapter);
869bool be_pause_supported(struct be_adapter *adapter);
870u32 be_get_fw_log_level(struct be_adapter *adapter);
David S. Miller394efd12013-11-04 13:48:30 -0500871
Somnath Koture9e2a902013-10-24 14:37:53 +0530872static inline int fw_major_num(const char *fw_ver)
873{
874 int fw_major = 0;
875
876 sscanf(fw_ver, "%d.", &fw_major);
877
878 return fw_major;
879}
880
Sathya Perla68d7bdc2013-08-27 16:57:35 +0530881int be_update_queues(struct be_adapter *adapter);
882int be_poll(struct napi_struct *napi, int budget);
Somnath Kotur941a77d2012-05-17 22:59:03 +0000883
Parav Pandit045508a2012-03-26 14:27:13 +0000884/*
885 * internal function to initialize-cleanup roce device.
886 */
Joe Perches31886e82013-09-23 15:11:36 -0700887void be_roce_dev_add(struct be_adapter *);
888void be_roce_dev_remove(struct be_adapter *);
Parav Pandit045508a2012-03-26 14:27:13 +0000889
890/*
891 * internal function to open-close roce device during ifup-ifdown.
892 */
Joe Perches31886e82013-09-23 15:11:36 -0700893void be_roce_dev_open(struct be_adapter *);
894void be_roce_dev_close(struct be_adapter *);
Parav Pandit045508a2012-03-26 14:27:13 +0000895
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700896#endif /* BE_H */