Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1 | /* |
| 2 | * CXL Flash Device Driver |
| 3 | * |
| 4 | * Written by: Manoj N. Kumar <manoj@linux.vnet.ibm.com>, IBM Corporation |
| 5 | * Matthew R. Ochs <mrochs@linux.vnet.ibm.com>, IBM Corporation |
| 6 | * |
| 7 | * Copyright (C) 2015 IBM Corporation |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or |
| 10 | * modify it under the terms of the GNU General Public License |
| 11 | * as published by the Free Software Foundation; either version |
| 12 | * 2 of the License, or (at your option) any later version. |
| 13 | */ |
| 14 | |
| 15 | #ifndef _SISLITE_H |
| 16 | #define _SISLITE_H |
| 17 | |
| 18 | #include <linux/types.h> |
| 19 | |
| 20 | typedef u16 ctx_hndl_t; |
| 21 | typedef u32 res_hndl_t; |
| 22 | |
| 23 | #define SIZE_4K 4096 |
| 24 | #define SIZE_64K 65536 |
| 25 | |
| 26 | /* |
| 27 | * IOARCB: 64 bytes, min 16 byte alignment required, host native endianness |
| 28 | * except for SCSI CDB which remains big endian per SCSI standards. |
| 29 | */ |
| 30 | struct sisl_ioarcb { |
| 31 | u16 ctx_id; /* ctx_hndl_t */ |
| 32 | u16 req_flags; |
| 33 | #define SISL_REQ_FLAGS_RES_HNDL 0x8000U /* bit 0 (MSB) */ |
| 34 | #define SISL_REQ_FLAGS_PORT_LUN_ID 0x0000U |
| 35 | |
| 36 | #define SISL_REQ_FLAGS_SUP_UNDERRUN 0x4000U /* bit 1 */ |
| 37 | |
| 38 | #define SISL_REQ_FLAGS_TIMEOUT_SECS 0x0000U /* bits 8,9 */ |
| 39 | #define SISL_REQ_FLAGS_TIMEOUT_MSECS 0x0040U |
| 40 | #define SISL_REQ_FLAGS_TIMEOUT_USECS 0x0080U |
| 41 | #define SISL_REQ_FLAGS_TIMEOUT_CYCLES 0x00C0U |
| 42 | |
| 43 | #define SISL_REQ_FLAGS_TMF_CMD 0x0004u /* bit 13 */ |
| 44 | |
| 45 | #define SISL_REQ_FLAGS_AFU_CMD 0x0002U /* bit 14 */ |
| 46 | |
| 47 | #define SISL_REQ_FLAGS_HOST_WRITE 0x0001U /* bit 15 (LSB) */ |
| 48 | #define SISL_REQ_FLAGS_HOST_READ 0x0000U |
| 49 | |
| 50 | union { |
| 51 | u32 res_hndl; /* res_hndl_t */ |
| 52 | u32 port_sel; /* this is a selection mask: |
| 53 | * 0x1 -> port#0 can be selected, |
| 54 | * 0x2 -> port#1 can be selected. |
| 55 | * Can be bitwise ORed. |
| 56 | */ |
| 57 | }; |
| 58 | u64 lun_id; |
| 59 | u32 data_len; /* 4K for read/write */ |
| 60 | u32 ioadl_len; |
| 61 | union { |
| 62 | u64 data_ea; /* min 16 byte aligned */ |
| 63 | u64 ioadl_ea; |
| 64 | }; |
| 65 | u8 msi; /* LISN to send on RRQ write */ |
| 66 | #define SISL_MSI_CXL_PFAULT 0 /* reserved for CXL page faults */ |
| 67 | #define SISL_MSI_SYNC_ERROR 1 /* recommended for AFU sync error */ |
| 68 | #define SISL_MSI_RRQ_UPDATED 2 /* recommended for IO completion */ |
| 69 | #define SISL_MSI_ASYNC_ERROR 3 /* master only - for AFU async error */ |
| 70 | |
| 71 | u8 rrq; /* 0 for a single RRQ */ |
| 72 | u16 timeout; /* in units specified by req_flags */ |
| 73 | u32 rsvd1; |
| 74 | u8 cdb[16]; /* must be in big endian */ |
Matthew R. Ochs | cf24302 | 2017-06-21 21:15:31 -0500 | [diff] [blame] | 75 | #define SISL_AFU_CMD_SYNC 0xC0 /* AFU sync command */ |
Matthew R. Ochs | 9cf43a3 | 2017-06-21 21:16:13 -0500 | [diff] [blame] | 76 | #define SISL_AFU_CMD_LUN_PROVISION 0xD0 /* AFU LUN provision command */ |
Matthew R. Ochs | bc88ac4 | 2017-06-21 21:16:22 -0500 | [diff] [blame] | 77 | #define SISL_AFU_CMD_DEBUG 0xE0 /* AFU debug command */ |
Matthew R. Ochs | 9cf43a3 | 2017-06-21 21:16:13 -0500 | [diff] [blame] | 78 | |
| 79 | #define SISL_AFU_LUN_PROVISION_CREATE 0x00 /* LUN provision create type */ |
| 80 | #define SISL_AFU_LUN_PROVISION_DELETE 0x01 /* LUN provision delete type */ |
Matthew R. Ochs | cf24302 | 2017-06-21 21:15:31 -0500 | [diff] [blame] | 81 | |
Matthew R. Ochs | 696d0b0 | 2017-01-11 19:19:33 -0600 | [diff] [blame] | 82 | union { |
| 83 | u64 reserved; /* Reserved for IOARRIN mode */ |
| 84 | struct sisl_ioasa *ioasa; /* IOASA EA for SQ Mode */ |
| 85 | }; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 86 | } __packed; |
| 87 | |
| 88 | struct sisl_rc { |
| 89 | u8 flags; |
| 90 | #define SISL_RC_FLAGS_SENSE_VALID 0x80U |
| 91 | #define SISL_RC_FLAGS_FCP_RSP_CODE_VALID 0x40U |
| 92 | #define SISL_RC_FLAGS_OVERRUN 0x20U |
| 93 | #define SISL_RC_FLAGS_UNDERRUN 0x10U |
| 94 | |
| 95 | u8 afu_rc; |
| 96 | #define SISL_AFU_RC_RHT_INVALID 0x01U /* user error */ |
| 97 | #define SISL_AFU_RC_RHT_UNALIGNED 0x02U /* should never happen */ |
| 98 | #define SISL_AFU_RC_RHT_OUT_OF_BOUNDS 0x03u /* user error */ |
| 99 | #define SISL_AFU_RC_RHT_DMA_ERR 0x04u /* see afu_extra |
Matthew R. Ochs | fcc87e7 | 2017-04-12 14:15:20 -0500 | [diff] [blame] | 100 | * may retry if afu_retry is off |
| 101 | * possible on master exit |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 102 | */ |
| 103 | #define SISL_AFU_RC_RHT_RW_PERM 0x05u /* no RW perms, user error */ |
| 104 | #define SISL_AFU_RC_LXT_UNALIGNED 0x12U /* should never happen */ |
| 105 | #define SISL_AFU_RC_LXT_OUT_OF_BOUNDS 0x13u /* user error */ |
| 106 | #define SISL_AFU_RC_LXT_DMA_ERR 0x14u /* see afu_extra |
Matthew R. Ochs | fcc87e7 | 2017-04-12 14:15:20 -0500 | [diff] [blame] | 107 | * may retry if afu_retry is off |
| 108 | * possible on master exit |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 109 | */ |
| 110 | #define SISL_AFU_RC_LXT_RW_PERM 0x15u /* no RW perms, user error */ |
| 111 | |
| 112 | #define SISL_AFU_RC_NOT_XLATE_HOST 0x1au /* possible if master exited */ |
| 113 | |
| 114 | /* NO_CHANNELS means the FC ports selected by dest_port in |
| 115 | * IOARCB or in the LXT entry are down when the AFU tried to select |
| 116 | * a FC port. If the port went down on an active IO, it will set |
| 117 | * fc_rc to =0x54(NOLOGI) or 0x57(LINKDOWN) instead. |
| 118 | */ |
| 119 | #define SISL_AFU_RC_NO_CHANNELS 0x20U /* see afu_extra, may retry */ |
| 120 | #define SISL_AFU_RC_CAP_VIOLATION 0x21U /* either user error or |
Matthew R. Ochs | fcc87e7 | 2017-04-12 14:15:20 -0500 | [diff] [blame] | 121 | * afu reset/master restart |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 122 | */ |
| 123 | #define SISL_AFU_RC_OUT_OF_DATA_BUFS 0x30U /* always retry */ |
| 124 | #define SISL_AFU_RC_DATA_DMA_ERR 0x31U /* see afu_extra |
Matthew R. Ochs | fcc87e7 | 2017-04-12 14:15:20 -0500 | [diff] [blame] | 125 | * may retry if afu_retry is off |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 126 | */ |
| 127 | |
| 128 | u8 scsi_rc; /* SCSI status byte, retry as appropriate */ |
| 129 | #define SISL_SCSI_RC_CHECK 0x02U |
| 130 | #define SISL_SCSI_RC_BUSY 0x08u |
| 131 | |
| 132 | u8 fc_rc; /* retry */ |
| 133 | /* |
| 134 | * We should only see fc_rc=0x57 (LINKDOWN) or 0x54(NOLOGI) for |
| 135 | * commands that are in flight when a link goes down or is logged out. |
| 136 | * If the link is down or logged out before AFU selects the port, either |
| 137 | * it will choose the other port or we will get afu_rc=0x20 (no_channel) |
| 138 | * if there is no valid port to use. |
| 139 | * |
| 140 | * ABORTPEND/ABORTOK/ABORTFAIL/TGTABORT can be retried, typically these |
| 141 | * would happen if a frame is dropped and something times out. |
| 142 | * NOLOGI or LINKDOWN can be retried if the other port is up. |
| 143 | * RESIDERR can be retried as well. |
| 144 | * |
| 145 | * ABORTFAIL might indicate that lots of frames are getting CRC errors. |
| 146 | * So it maybe retried once and reset the link if it happens again. |
| 147 | * The link can also be reset on the CRC error threshold interrupt. |
| 148 | */ |
| 149 | #define SISL_FC_RC_ABORTPEND 0x52 /* exchange timeout or abort request */ |
| 150 | #define SISL_FC_RC_WRABORTPEND 0x53 /* due to write XFER_RDY invalid */ |
| 151 | #define SISL_FC_RC_NOLOGI 0x54 /* port not logged in, in-flight cmds */ |
| 152 | #define SISL_FC_RC_NOEXP 0x55 /* FC protocol error or HW bug */ |
| 153 | #define SISL_FC_RC_INUSE 0x56 /* tag already in use, HW bug */ |
| 154 | #define SISL_FC_RC_LINKDOWN 0x57 /* link down, in-flight cmds */ |
| 155 | #define SISL_FC_RC_ABORTOK 0x58 /* pending abort completed w/success */ |
| 156 | #define SISL_FC_RC_ABORTFAIL 0x59 /* pending abort completed w/fail */ |
| 157 | #define SISL_FC_RC_RESID 0x5A /* ioasa underrun/overrun flags set */ |
| 158 | #define SISL_FC_RC_RESIDERR 0x5B /* actual data len does not match SCSI |
Matthew R. Ochs | fcc87e7 | 2017-04-12 14:15:20 -0500 | [diff] [blame] | 159 | * reported len, possibly due to dropped |
| 160 | * frames |
| 161 | */ |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 162 | #define SISL_FC_RC_TGTABORT 0x5C /* command aborted by target */ |
| 163 | }; |
| 164 | |
| 165 | #define SISL_SENSE_DATA_LEN 20 /* Sense data length */ |
Matthew R. Ochs | 9cf43a3 | 2017-06-21 21:16:13 -0500 | [diff] [blame] | 166 | #define SISL_WWID_DATA_LEN 16 /* WWID data length */ |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 167 | |
| 168 | /* |
| 169 | * IOASA: 64 bytes & must follow IOARCB, min 16 byte alignment required, |
| 170 | * host native endianness |
| 171 | */ |
| 172 | struct sisl_ioasa { |
| 173 | union { |
| 174 | struct sisl_rc rc; |
| 175 | u32 ioasc; |
| 176 | #define SISL_IOASC_GOOD_COMPLETION 0x00000000U |
| 177 | }; |
Matthew R. Ochs | 9cf43a3 | 2017-06-21 21:16:13 -0500 | [diff] [blame] | 178 | |
| 179 | union { |
| 180 | u32 resid; |
| 181 | u32 lunid_hi; |
| 182 | }; |
| 183 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 184 | u8 port; |
| 185 | u8 afu_extra; |
| 186 | /* when afu_rc=0x04, 0x14, 0x31 (_xxx_DMA_ERR): |
| 187 | * afu_exta contains PSL response code. Useful codes are: |
| 188 | */ |
| 189 | #define SISL_AFU_DMA_ERR_PAGE_IN 0x0A /* AFU_retry_on_pagein Action |
| 190 | * Enabled N/A |
| 191 | * Disabled retry |
| 192 | */ |
| 193 | #define SISL_AFU_DMA_ERR_INVALID_EA 0x0B /* this is a hard error |
| 194 | * afu_rc Implies |
| 195 | * 0x04, 0x14 master exit. |
| 196 | * 0x31 user error. |
| 197 | */ |
| 198 | /* when afu rc=0x20 (no channels): |
| 199 | * afu_extra bits [4:5]: available portmask, [6:7]: requested portmask. |
| 200 | */ |
| 201 | #define SISL_AFU_NO_CLANNELS_AMASK(afu_extra) (((afu_extra) & 0x0C) >> 2) |
| 202 | #define SISL_AFU_NO_CLANNELS_RMASK(afu_extra) ((afu_extra) & 0x03) |
| 203 | |
| 204 | u8 scsi_extra; |
| 205 | u8 fc_extra; |
Matthew R. Ochs | 9cf43a3 | 2017-06-21 21:16:13 -0500 | [diff] [blame] | 206 | |
| 207 | union { |
| 208 | u8 sense_data[SISL_SENSE_DATA_LEN]; |
| 209 | struct { |
| 210 | u32 lunid_lo; |
| 211 | u8 wwid[SISL_WWID_DATA_LEN]; |
| 212 | }; |
| 213 | }; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 214 | |
| 215 | /* These fields are defined by the SISlite architecture for the |
| 216 | * host to use as they see fit for their implementation. |
| 217 | */ |
| 218 | union { |
| 219 | u64 host_use[4]; |
| 220 | u8 host_use_b[32]; |
| 221 | }; |
| 222 | } __packed; |
| 223 | |
| 224 | #define SISL_RESP_HANDLE_T_BIT 0x1ULL /* Toggle bit */ |
| 225 | |
| 226 | /* MMIO space is required to support only 64-bit access */ |
| 227 | |
| 228 | /* |
| 229 | * This AFU has two mechanisms to deal with endian-ness. |
| 230 | * One is a global configuration (in the afu_config) register |
| 231 | * below that specifies the endian-ness of the host. |
| 232 | * The other is a per context (i.e. application) specification |
| 233 | * controlled by the endian_ctrl field here. Since the master |
| 234 | * context is one such application the master context's |
| 235 | * endian-ness is set to be the same as the host. |
| 236 | * |
| 237 | * As per the SISlite spec, the MMIO registers are always |
| 238 | * big endian. |
| 239 | */ |
| 240 | #define SISL_ENDIAN_CTRL_BE 0x8000000000000080ULL |
| 241 | #define SISL_ENDIAN_CTRL_LE 0x0000000000000000ULL |
| 242 | |
| 243 | #ifdef __BIG_ENDIAN |
| 244 | #define SISL_ENDIAN_CTRL SISL_ENDIAN_CTRL_BE |
| 245 | #else |
| 246 | #define SISL_ENDIAN_CTRL SISL_ENDIAN_CTRL_LE |
| 247 | #endif |
| 248 | |
| 249 | /* per context host transport MMIO */ |
| 250 | struct sisl_host_map { |
Matthew R. Ochs | fcc87e7 | 2017-04-12 14:15:20 -0500 | [diff] [blame] | 251 | __be64 endian_ctrl; /* Per context Endian Control. The AFU will |
| 252 | * operate on whatever the context is of the |
| 253 | * host application. |
| 254 | */ |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 255 | |
| 256 | __be64 intr_status; /* this sends LISN# programmed in ctx_ctrl. |
| 257 | * Only recovery in a PERM_ERR is a context |
| 258 | * exit since there is no way to tell which |
| 259 | * command caused the error. |
| 260 | */ |
Uma Krishnan | d91dd3a | 2018-03-26 11:34:55 -0500 | [diff] [blame] | 261 | #define SISL_ISTATUS_PERM_ERR_LISN_3_EA 0x0400ULL /* b53, user error */ |
| 262 | #define SISL_ISTATUS_PERM_ERR_LISN_2_EA 0x0200ULL /* b54, user error */ |
| 263 | #define SISL_ISTATUS_PERM_ERR_LISN_1_EA 0x0100ULL /* b55, user error */ |
| 264 | #define SISL_ISTATUS_PERM_ERR_LISN_3_PASID 0x0080ULL /* b56, user error */ |
| 265 | #define SISL_ISTATUS_PERM_ERR_LISN_2_PASID 0x0040ULL /* b57, user error */ |
| 266 | #define SISL_ISTATUS_PERM_ERR_LISN_1_PASID 0x0020ULL /* b58, user error */ |
| 267 | #define SISL_ISTATUS_PERM_ERR_CMDROOM 0x0010ULL /* b59, user error */ |
| 268 | #define SISL_ISTATUS_PERM_ERR_RCB_READ 0x0008ULL /* b60, user error */ |
| 269 | #define SISL_ISTATUS_PERM_ERR_SA_WRITE 0x0004ULL /* b61, user error */ |
| 270 | #define SISL_ISTATUS_PERM_ERR_RRQ_WRITE 0x0002ULL /* b62, user error */ |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 271 | /* Page in wait accessing RCB/IOASA/RRQ is reported in b63. |
| 272 | * Same error in data/LXT/RHT access is reported via IOASA. |
| 273 | */ |
Uma Krishnan | d91dd3a | 2018-03-26 11:34:55 -0500 | [diff] [blame] | 274 | #define SISL_ISTATUS_TEMP_ERR_PAGEIN 0x0001ULL /* b63, can only be |
| 275 | * generated when AFU |
| 276 | * auto retry is |
| 277 | * disabled. If user |
| 278 | * can determine the |
| 279 | * command that caused |
| 280 | * the error, it can |
| 281 | * be retried. |
| 282 | */ |
| 283 | #define SISL_ISTATUS_UNMASK (0x07FFULL) /* 1 means unmasked */ |
| 284 | #define SISL_ISTATUS_MASK ~(SISL_ISTATUS_UNMASK) /* 1 means masked */ |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 285 | |
| 286 | __be64 intr_clear; |
| 287 | __be64 intr_mask; |
| 288 | __be64 ioarrin; /* only write what cmd_room permits */ |
| 289 | __be64 rrq_start; /* start & end are both inclusive */ |
| 290 | __be64 rrq_end; /* write sequence: start followed by end */ |
| 291 | __be64 cmd_room; |
Matthew R. Ochs | f15fbf8 | 2015-10-21 15:15:06 -0500 | [diff] [blame] | 292 | __be64 ctx_ctrl; /* least significant byte or b56:63 is LISN# */ |
Matthew R. Ochs | 3223c01 | 2017-06-21 21:16:33 -0500 | [diff] [blame] | 293 | #define SISL_CTX_CTRL_UNMAP_SECTOR 0x8000000000000000ULL /* b0 */ |
Matthew R. Ochs | 465891f | 2018-03-26 11:30:22 -0500 | [diff] [blame] | 294 | #define SISL_CTX_CTRL_LISN_MASK (0xFFULL) |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 295 | __be64 mbox_w; /* restricted use */ |
Matthew R. Ochs | 696d0b0 | 2017-01-11 19:19:33 -0600 | [diff] [blame] | 296 | __be64 sq_start; /* Submission Queue (R/W): write sequence and */ |
| 297 | __be64 sq_end; /* inclusion semantics are the same as RRQ */ |
| 298 | __be64 sq_head; /* Submission Queue Head (R): for debugging */ |
| 299 | __be64 sq_tail; /* Submission Queue TAIL (R/W): next IOARCB */ |
| 300 | __be64 sq_ctx_reset; /* Submission Queue Context Reset (R/W) */ |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 301 | }; |
| 302 | |
| 303 | /* per context provisioning & control MMIO */ |
| 304 | struct sisl_ctrl_map { |
| 305 | __be64 rht_start; |
| 306 | __be64 rht_cnt_id; |
| 307 | /* both cnt & ctx_id args must be ULL */ |
| 308 | #define SISL_RHT_CNT_ID(cnt, ctx_id) (((cnt) << 48) | ((ctx_id) << 32)) |
| 309 | |
| 310 | __be64 ctx_cap; /* afu_rc below is when the capability is violated */ |
| 311 | #define SISL_CTX_CAP_PROXY_ISSUE 0x8000000000000000ULL /* afu_rc 0x21 */ |
| 312 | #define SISL_CTX_CAP_REAL_MODE 0x4000000000000000ULL /* afu_rc 0x21 */ |
| 313 | #define SISL_CTX_CAP_HOST_XLATE 0x2000000000000000ULL /* afu_rc 0x1a */ |
| 314 | #define SISL_CTX_CAP_PROXY_TARGET 0x1000000000000000ULL /* afu_rc 0x21 */ |
| 315 | #define SISL_CTX_CAP_AFU_CMD 0x0000000000000008ULL /* afu_rc 0x21 */ |
| 316 | #define SISL_CTX_CAP_GSCSI_CMD 0x0000000000000004ULL /* afu_rc 0x21 */ |
| 317 | #define SISL_CTX_CAP_WRITE_CMD 0x0000000000000002ULL /* afu_rc 0x21 */ |
| 318 | #define SISL_CTX_CAP_READ_CMD 0x0000000000000001ULL /* afu_rc 0x21 */ |
| 319 | __be64 mbox_r; |
Uma Krishnan | 23239ee | 2018-03-26 11:34:42 -0500 | [diff] [blame] | 320 | __be64 lisn_pasid[2]; |
| 321 | /* pasid _a arg must be ULL */ |
| 322 | #define SISL_LISN_PASID(_a, _b) (((_a) << 32) | (_b)) |
| 323 | __be64 lisn_ea[3]; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 324 | }; |
| 325 | |
| 326 | /* single copy global regs */ |
| 327 | struct sisl_global_regs { |
| 328 | __be64 aintr_status; |
Matthew R. Ochs | 56518072 | 2017-04-12 14:14:28 -0500 | [diff] [blame] | 329 | /* |
| 330 | * In cxlflash, FC port/link are arranged in port pairs, each |
| 331 | * gets a byte of status: |
| 332 | * |
| 333 | * *_OTHER: other err, FC_ERRCAP[31:20] |
| 334 | * *_LOGO: target sent FLOGI/PLOGI/LOGO while logged in |
| 335 | * *_CRC_T: CRC threshold exceeded |
| 336 | * *_LOGI_R: login state machine timed out and retrying |
| 337 | * *_LOGI_F: login failed, FC_ERROR[19:0] |
| 338 | * *_LOGI_S: login succeeded |
| 339 | * *_LINK_DN: link online to offline |
| 340 | * *_LINK_UP: link offline to online |
| 341 | */ |
| 342 | #define SISL_ASTATUS_FC2_OTHER 0x80000000ULL /* b32 */ |
| 343 | #define SISL_ASTATUS_FC2_LOGO 0x40000000ULL /* b33 */ |
| 344 | #define SISL_ASTATUS_FC2_CRC_T 0x20000000ULL /* b34 */ |
| 345 | #define SISL_ASTATUS_FC2_LOGI_R 0x10000000ULL /* b35 */ |
| 346 | #define SISL_ASTATUS_FC2_LOGI_F 0x08000000ULL /* b36 */ |
| 347 | #define SISL_ASTATUS_FC2_LOGI_S 0x04000000ULL /* b37 */ |
| 348 | #define SISL_ASTATUS_FC2_LINK_DN 0x02000000ULL /* b38 */ |
| 349 | #define SISL_ASTATUS_FC2_LINK_UP 0x01000000ULL /* b39 */ |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 350 | |
Matthew R. Ochs | 56518072 | 2017-04-12 14:14:28 -0500 | [diff] [blame] | 351 | #define SISL_ASTATUS_FC3_OTHER 0x00800000ULL /* b40 */ |
| 352 | #define SISL_ASTATUS_FC3_LOGO 0x00400000ULL /* b41 */ |
| 353 | #define SISL_ASTATUS_FC3_CRC_T 0x00200000ULL /* b42 */ |
| 354 | #define SISL_ASTATUS_FC3_LOGI_R 0x00100000ULL /* b43 */ |
| 355 | #define SISL_ASTATUS_FC3_LOGI_F 0x00080000ULL /* b44 */ |
| 356 | #define SISL_ASTATUS_FC3_LOGI_S 0x00040000ULL /* b45 */ |
| 357 | #define SISL_ASTATUS_FC3_LINK_DN 0x00020000ULL /* b46 */ |
| 358 | #define SISL_ASTATUS_FC3_LINK_UP 0x00010000ULL /* b47 */ |
| 359 | |
| 360 | #define SISL_ASTATUS_FC0_OTHER 0x00008000ULL /* b48 */ |
| 361 | #define SISL_ASTATUS_FC0_LOGO 0x00004000ULL /* b49 */ |
| 362 | #define SISL_ASTATUS_FC0_CRC_T 0x00002000ULL /* b50 */ |
| 363 | #define SISL_ASTATUS_FC0_LOGI_R 0x00001000ULL /* b51 */ |
| 364 | #define SISL_ASTATUS_FC0_LOGI_F 0x00000800ULL /* b52 */ |
| 365 | #define SISL_ASTATUS_FC0_LOGI_S 0x00000400ULL /* b53 */ |
| 366 | #define SISL_ASTATUS_FC0_LINK_DN 0x00000200ULL /* b54 */ |
| 367 | #define SISL_ASTATUS_FC0_LINK_UP 0x00000100ULL /* b55 */ |
| 368 | |
| 369 | #define SISL_ASTATUS_FC1_OTHER 0x00000080ULL /* b56 */ |
| 370 | #define SISL_ASTATUS_FC1_LOGO 0x00000040ULL /* b57 */ |
| 371 | #define SISL_ASTATUS_FC1_CRC_T 0x00000020ULL /* b58 */ |
| 372 | #define SISL_ASTATUS_FC1_LOGI_R 0x00000010ULL /* b59 */ |
| 373 | #define SISL_ASTATUS_FC1_LOGI_F 0x00000008ULL /* b60 */ |
| 374 | #define SISL_ASTATUS_FC1_LOGI_S 0x00000004ULL /* b61 */ |
| 375 | #define SISL_ASTATUS_FC1_LINK_DN 0x00000002ULL /* b62 */ |
| 376 | #define SISL_ASTATUS_FC1_LINK_UP 0x00000001ULL /* b63 */ |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 377 | |
| 378 | #define SISL_FC_INTERNAL_UNMASK 0x0000000300000000ULL /* 1 means unmasked */ |
| 379 | #define SISL_FC_INTERNAL_MASK ~(SISL_FC_INTERNAL_UNMASK) |
| 380 | #define SISL_FC_INTERNAL_SHIFT 32 |
| 381 | |
Uma Krishnan | 704c4b0 | 2016-06-15 18:49:57 -0500 | [diff] [blame] | 382 | #define SISL_FC_SHUTDOWN_NORMAL 0x0000000000000010ULL |
| 383 | #define SISL_FC_SHUTDOWN_ABRUPT 0x0000000000000020ULL |
| 384 | |
| 385 | #define SISL_STATUS_SHUTDOWN_ACTIVE 0x0000000000000010ULL |
| 386 | #define SISL_STATUS_SHUTDOWN_COMPLETE 0x0000000000000020ULL |
| 387 | |
Matthew R. Ochs | 56518072 | 2017-04-12 14:14:28 -0500 | [diff] [blame] | 388 | #define SISL_ASTATUS_UNMASK 0xFFFFFFFFULL /* 1 means unmasked */ |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 389 | #define SISL_ASTATUS_MASK ~(SISL_ASTATUS_UNMASK) /* 1 means masked */ |
| 390 | |
| 391 | __be64 aintr_clear; |
| 392 | __be64 aintr_mask; |
| 393 | __be64 afu_ctrl; |
| 394 | __be64 afu_hb; |
| 395 | __be64 afu_scratch_pad; |
| 396 | __be64 afu_port_sel; |
| 397 | #define SISL_AFUCONF_AR_IOARCB 0x4000ULL |
| 398 | #define SISL_AFUCONF_AR_LXT 0x2000ULL |
| 399 | #define SISL_AFUCONF_AR_RHT 0x1000ULL |
| 400 | #define SISL_AFUCONF_AR_DATA 0x0800ULL |
| 401 | #define SISL_AFUCONF_AR_RSRC 0x0400ULL |
| 402 | #define SISL_AFUCONF_AR_IOASA 0x0200ULL |
| 403 | #define SISL_AFUCONF_AR_RRQ 0x0100ULL |
| 404 | /* Aggregate all Auto Retry Bits */ |
| 405 | #define SISL_AFUCONF_AR_ALL (SISL_AFUCONF_AR_IOARCB|SISL_AFUCONF_AR_LXT| \ |
| 406 | SISL_AFUCONF_AR_RHT|SISL_AFUCONF_AR_DATA| \ |
| 407 | SISL_AFUCONF_AR_RSRC|SISL_AFUCONF_AR_IOASA| \ |
| 408 | SISL_AFUCONF_AR_RRQ) |
| 409 | #ifdef __BIG_ENDIAN |
| 410 | #define SISL_AFUCONF_ENDIAN 0x0000ULL |
| 411 | #else |
| 412 | #define SISL_AFUCONF_ENDIAN 0x0020ULL |
| 413 | #endif |
| 414 | #define SISL_AFUCONF_MBOX_CLR_READ 0x0010ULL |
| 415 | __be64 afu_config; |
| 416 | __be64 rsvd[0xf8]; |
Matthew R. Ochs | e5ce067 | 2015-10-21 15:14:01 -0500 | [diff] [blame] | 417 | __le64 afu_version; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 418 | __be64 interface_version; |
Matthew R. Ochs | 696d0b0 | 2017-01-11 19:19:33 -0600 | [diff] [blame] | 419 | #define SISL_INTVER_CAP_SHIFT 16 |
| 420 | #define SISL_INTVER_MAJ_SHIFT 8 |
| 421 | #define SISL_INTVER_CAP_MASK 0xFFFFFFFF00000000ULL |
| 422 | #define SISL_INTVER_MAJ_MASK 0x00000000FFFF0000ULL |
| 423 | #define SISL_INTVER_MIN_MASK 0x000000000000FFFFULL |
| 424 | #define SISL_INTVER_CAP_IOARRIN_CMD_MODE 0x800000000000ULL |
| 425 | #define SISL_INTVER_CAP_SQ_CMD_MODE 0x400000000000ULL |
| 426 | #define SISL_INTVER_CAP_RESERVED_CMD_MODE_A 0x200000000000ULL |
| 427 | #define SISL_INTVER_CAP_RESERVED_CMD_MODE_B 0x100000000000ULL |
Matthew R. Ochs | 9cf43a3 | 2017-06-21 21:16:13 -0500 | [diff] [blame] | 428 | #define SISL_INTVER_CAP_LUN_PROVISION 0x080000000000ULL |
Matthew R. Ochs | bc88ac4 | 2017-06-21 21:16:22 -0500 | [diff] [blame] | 429 | #define SISL_INTVER_CAP_AFU_DEBUG 0x040000000000ULL |
Uma Krishnan | 23239ee | 2018-03-26 11:34:42 -0500 | [diff] [blame] | 430 | #define SISL_INTVER_CAP_OCXL_LISN 0x020000000000ULL |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 431 | }; |
| 432 | |
Matthew R. Ochs | 56518072 | 2017-04-12 14:14:28 -0500 | [diff] [blame] | 433 | #define CXLFLASH_NUM_FC_PORTS_PER_BANK 2 /* fixed # of ports per bank */ |
Matthew R. Ochs | 1cd7fab | 2017-04-12 14:14:41 -0500 | [diff] [blame] | 434 | #define CXLFLASH_MAX_FC_BANKS 2 /* max # of banks supported */ |
Matthew R. Ochs | 56518072 | 2017-04-12 14:14:28 -0500 | [diff] [blame] | 435 | #define CXLFLASH_MAX_FC_PORTS (CXLFLASH_NUM_FC_PORTS_PER_BANK * \ |
| 436 | CXLFLASH_MAX_FC_BANKS) |
| 437 | #define CXLFLASH_MAX_CONTEXT 512 /* number of contexts per AFU */ |
| 438 | #define CXLFLASH_NUM_VLUNS 512 /* number of vluns per AFU/port */ |
| 439 | #define CXLFLASH_NUM_REGS 512 /* number of registers per port */ |
| 440 | |
| 441 | struct fc_port_bank { |
| 442 | __be64 fc_port_regs[CXLFLASH_NUM_FC_PORTS_PER_BANK][CXLFLASH_NUM_REGS]; |
| 443 | __be64 fc_port_luns[CXLFLASH_NUM_FC_PORTS_PER_BANK][CXLFLASH_NUM_VLUNS]; |
| 444 | }; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 445 | |
| 446 | struct sisl_global_map { |
| 447 | union { |
| 448 | struct sisl_global_regs regs; |
| 449 | char page0[SIZE_4K]; /* page 0 */ |
| 450 | }; |
| 451 | |
| 452 | char page1[SIZE_4K]; /* page 1 */ |
| 453 | |
Matthew R. Ochs | 1cd7fab | 2017-04-12 14:14:41 -0500 | [diff] [blame] | 454 | struct fc_port_bank bank[CXLFLASH_MAX_FC_BANKS]; /* pages 2 - 9 */ |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 455 | |
Matthew R. Ochs | 1cd7fab | 2017-04-12 14:14:41 -0500 | [diff] [blame] | 456 | /* pages 10 - 15 are reserved */ |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 457 | |
| 458 | }; |
| 459 | |
| 460 | /* |
| 461 | * CXL Flash Memory Map |
| 462 | * |
| 463 | * +-------------------------------+ |
| 464 | * | 512 * 64 KB User MMIO | |
| 465 | * | (per context) | |
| 466 | * | User Accessible | |
| 467 | * +-------------------------------+ |
| 468 | * | 512 * 128 B per context | |
| 469 | * | Provisioning and Control | |
| 470 | * | Trusted Process accessible | |
| 471 | * +-------------------------------+ |
| 472 | * | 64 KB Global | |
| 473 | * | Trusted Process accessible | |
| 474 | * +-------------------------------+ |
Matthew R. Ochs | fcc87e7 | 2017-04-12 14:15:20 -0500 | [diff] [blame] | 475 | */ |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 476 | struct cxlflash_afu_map { |
| 477 | union { |
| 478 | struct sisl_host_map host; |
| 479 | char harea[SIZE_64K]; /* 64KB each */ |
| 480 | } hosts[CXLFLASH_MAX_CONTEXT]; |
| 481 | |
| 482 | union { |
| 483 | struct sisl_ctrl_map ctrl; |
| 484 | char carea[cache_line_size()]; /* 128B each */ |
| 485 | } ctrls[CXLFLASH_MAX_CONTEXT]; |
| 486 | |
| 487 | union { |
| 488 | struct sisl_global_map global; |
| 489 | char garea[SIZE_64K]; /* 64KB single block */ |
| 490 | }; |
| 491 | }; |
| 492 | |
Matthew R. Ochs | 2cb7926 | 2015-08-13 21:47:53 -0500 | [diff] [blame] | 493 | /* |
| 494 | * LXT - LBA Translation Table |
| 495 | * LXT control blocks |
| 496 | */ |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 497 | struct sisl_lxt_entry { |
| 498 | u64 rlba_base; /* bits 0:47 is base |
Matthew R. Ochs | 2cb7926 | 2015-08-13 21:47:53 -0500 | [diff] [blame] | 499 | * b48:55 is lun index |
| 500 | * b58:59 is write & read perms |
| 501 | * (if no perm, afu_rc=0x15) |
| 502 | * b60:63 is port_sel mask |
| 503 | */ |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 504 | }; |
| 505 | |
Matthew R. Ochs | 65be2c7 | 2015-08-13 21:47:43 -0500 | [diff] [blame] | 506 | /* |
| 507 | * RHT - Resource Handle Table |
| 508 | * Per the SISlite spec, RHT entries are to be 16-byte aligned |
| 509 | */ |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 510 | struct sisl_rht_entry { |
| 511 | struct sisl_lxt_entry *lxt_start; |
| 512 | u32 lxt_cnt; |
| 513 | u16 rsvd; |
| 514 | u8 fp; /* format & perm nibbles. |
| 515 | * (if no perm, afu_rc=0x05) |
| 516 | */ |
| 517 | u8 nmask; |
| 518 | } __packed __aligned(16); |
| 519 | |
| 520 | struct sisl_rht_entry_f1 { |
| 521 | u64 lun_id; |
| 522 | union { |
| 523 | struct { |
| 524 | u8 valid; |
| 525 | u8 rsvd[5]; |
| 526 | u8 fp; |
| 527 | u8 port_sel; |
| 528 | }; |
| 529 | |
| 530 | u64 dw; |
| 531 | }; |
| 532 | } __packed __aligned(16); |
| 533 | |
| 534 | /* make the fp byte */ |
| 535 | #define SISL_RHT_FP(fmt, perm) (((fmt) << 4) | (perm)) |
| 536 | |
| 537 | /* make the fp byte for a clone from a source fp and clone flags |
| 538 | * flags must be only 2 LSB bits. |
| 539 | */ |
| 540 | #define SISL_RHT_FP_CLONE(src_fp, cln_flags) ((src_fp) & (0xFC | (cln_flags))) |
| 541 | |
| 542 | #define RHT_PERM_READ 0x01U |
| 543 | #define RHT_PERM_WRITE 0x02U |
| 544 | #define RHT_PERM_RW (RHT_PERM_READ | RHT_PERM_WRITE) |
| 545 | |
| 546 | /* extract the perm bits from a fp */ |
| 547 | #define SISL_RHT_PERM(fp) ((fp) & RHT_PERM_RW) |
| 548 | |
| 549 | #define PORT0 0x01U |
| 550 | #define PORT1 0x02U |
Matthew R. Ochs | 56518072 | 2017-04-12 14:14:28 -0500 | [diff] [blame] | 551 | #define PORT2 0x04U |
| 552 | #define PORT3 0x08U |
Matthew R. Ochs | 8fa4f17 | 2017-04-12 14:14:05 -0500 | [diff] [blame] | 553 | #define PORT_MASK(_n) ((1 << (_n)) - 1) |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 554 | |
| 555 | /* AFU Sync Mode byte */ |
| 556 | #define AFU_LW_SYNC 0x0U |
| 557 | #define AFU_HW_SYNC 0x1U |
| 558 | #define AFU_GSYNC 0x2U |
| 559 | |
| 560 | /* Special Task Management Function CDB */ |
| 561 | #define TMF_LUN_RESET 0x1U |
| 562 | #define TMF_CLEAR_ACA 0x2U |
| 563 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 564 | #endif /* _SISLITE_H */ |