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Thomas Gleixner9f806852019-05-29 07:18:08 -07001// SPDX-License-Identifier: GPL-2.0-only
Denis Turischeve82c60a2010-02-19 11:26:25 +01002/*
3 * lpc_sch.c - LPC interface for Intel Poulsbo SCH
4 *
5 * LPC bridge function of the Intel SCH contains many other
6 * functional units, such as Interrupt controllers, Timers,
7 * Power Management, System Management, GPIO, RTC, and LPC
8 * Configuration Registers.
9 *
10 * Copyright (c) 2010 CompuLab Ltd
Andy Shevchenko85de80e2014-09-02 13:45:22 +030011 * Copyright (c) 2014 Intel Corp.
Denis Turischeve82c60a2010-02-19 11:26:25 +010012 * Author: Denis Turischev <denis@compulab.co.il>
Denis Turischeve82c60a2010-02-19 11:26:25 +010013 */
14
Denis Turischeve82c60a2010-02-19 11:26:25 +010015#include <linux/kernel.h>
16#include <linux/module.h>
17#include <linux/errno.h>
18#include <linux/acpi.h>
19#include <linux/pci.h>
20#include <linux/mfd/core.h>
21
22#define SMBASE 0x40
23#define SMBUS_IO_SIZE 64
24
25#define GPIOBASE 0x44
26#define GPIO_IO_SIZE 64
Seth Heasley8ee3c2a2012-04-17 14:09:22 -070027#define GPIO_IO_SIZE_CENTERTON 128
Denis Turischeve82c60a2010-02-19 11:26:25 +010028
Andy Shevchenkoec689a82014-09-02 13:45:21 +030029/* Intel Quark X1000 GPIO IRQ Number */
30#define GPIO_IRQ_QUARK_X1000 9
31
Alexander Stein19921ef2011-06-16 13:05:49 +020032#define WDTBASE 0x84
33#define WDT_IO_SIZE 64
34
Andy Shevchenkob24512c2014-09-02 13:45:19 +030035enum sch_chipsets {
36 LPC_SCH = 0, /* Intel Poulsbo SCH */
37 LPC_ITC, /* Intel Tunnel Creek */
38 LPC_CENTERTON, /* Intel Centerton */
Andy Shevchenkoec689a82014-09-02 13:45:21 +030039 LPC_QUARK_X1000, /* Intel Quark X1000 */
Denis Turischeve82c60a2010-02-19 11:26:25 +010040};
41
Andy Shevchenkob24512c2014-09-02 13:45:19 +030042struct lpc_sch_info {
43 unsigned int io_size_smbus;
44 unsigned int io_size_gpio;
45 unsigned int io_size_wdt;
Andy Shevchenkoec689a82014-09-02 13:45:21 +030046 int irq_gpio;
Denis Turischeve82c60a2010-02-19 11:26:25 +010047};
48
Andy Shevchenkob24512c2014-09-02 13:45:19 +030049static struct lpc_sch_info sch_chipset_info[] = {
50 [LPC_SCH] = {
51 .io_size_smbus = SMBUS_IO_SIZE,
52 .io_size_gpio = GPIO_IO_SIZE,
Andy Shevchenkoec689a82014-09-02 13:45:21 +030053 .irq_gpio = -1,
Andy Shevchenkob24512c2014-09-02 13:45:19 +030054 },
55 [LPC_ITC] = {
56 .io_size_smbus = SMBUS_IO_SIZE,
57 .io_size_gpio = GPIO_IO_SIZE,
58 .io_size_wdt = WDT_IO_SIZE,
Andy Shevchenkoec689a82014-09-02 13:45:21 +030059 .irq_gpio = -1,
Andy Shevchenkob24512c2014-09-02 13:45:19 +030060 },
61 [LPC_CENTERTON] = {
62 .io_size_smbus = SMBUS_IO_SIZE,
63 .io_size_gpio = GPIO_IO_SIZE_CENTERTON,
64 .io_size_wdt = WDT_IO_SIZE,
Andy Shevchenkoec689a82014-09-02 13:45:21 +030065 .irq_gpio = -1,
66 },
67 [LPC_QUARK_X1000] = {
68 .io_size_gpio = GPIO_IO_SIZE,
69 .irq_gpio = GPIO_IRQ_QUARK_X1000,
Ong Boon Leongc68a8652015-01-14 16:20:20 +080070 .io_size_wdt = WDT_IO_SIZE,
Andy Shevchenkob24512c2014-09-02 13:45:19 +030071 },
Alexander Stein19921ef2011-06-16 13:05:49 +020072};
73
Jingoo Han36fcd062013-12-03 08:15:39 +090074static const struct pci_device_id lpc_sch_ids[] = {
Andy Shevchenkob24512c2014-09-02 13:45:19 +030075 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_SCH_LPC), LPC_SCH },
76 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ITC_LPC), LPC_ITC },
77 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_CENTERTON_ILB), LPC_CENTERTON },
Andy Shevchenkoec689a82014-09-02 13:45:21 +030078 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_QUARK_X1000_ILB), LPC_QUARK_X1000 },
Denis Turischeve82c60a2010-02-19 11:26:25 +010079 { 0, }
80};
81MODULE_DEVICE_TABLE(pci, lpc_sch_ids);
82
Andy Shevchenkob24512c2014-09-02 13:45:19 +030083#define LPC_NO_RESOURCE 1
84#define LPC_SKIP_RESOURCE 2
85
86static int lpc_sch_get_io(struct pci_dev *pdev, int where, const char *name,
87 struct resource *res, int size)
Denis Turischeve82c60a2010-02-19 11:26:25 +010088{
89 unsigned int base_addr_cfg;
90 unsigned short base_addr;
Andy Shevchenkob24512c2014-09-02 13:45:19 +030091
92 if (size == 0)
93 return LPC_NO_RESOURCE;
94
95 pci_read_config_dword(pdev, where, &base_addr_cfg);
96 base_addr = 0;
97 if (!(base_addr_cfg & (1 << 31)))
98 dev_warn(&pdev->dev, "Decode of the %s I/O range disabled\n",
99 name);
100 else
101 base_addr = (unsigned short)base_addr_cfg;
102
103 if (base_addr == 0) {
104 dev_warn(&pdev->dev, "I/O space for %s uninitialized\n", name);
105 return LPC_SKIP_RESOURCE;
106 }
107
108 res->start = base_addr;
109 res->end = base_addr + size - 1;
110 res->flags = IORESOURCE_IO;
111
112 return 0;
113}
114
115static int lpc_sch_populate_cell(struct pci_dev *pdev, int where,
Andy Shevchenkoec689a82014-09-02 13:45:21 +0300116 const char *name, int size, int irq,
117 int id, struct mfd_cell *cell)
Andy Shevchenkob24512c2014-09-02 13:45:19 +0300118{
119 struct resource *res;
Alexander Stein19921ef2011-06-16 13:05:49 +0200120 int ret;
Denis Turischeve82c60a2010-02-19 11:26:25 +0100121
Andy Shevchenkoec689a82014-09-02 13:45:21 +0300122 res = devm_kcalloc(&pdev->dev, 2, sizeof(*res), GFP_KERNEL);
Andy Shevchenkob24512c2014-09-02 13:45:19 +0300123 if (!res)
124 return -ENOMEM;
Denis Turischeve82c60a2010-02-19 11:26:25 +0100125
Andy Shevchenkob24512c2014-09-02 13:45:19 +0300126 ret = lpc_sch_get_io(pdev, where, name, res, size);
127 if (ret)
128 return ret;
Denis Turischeve82c60a2010-02-19 11:26:25 +0100129
Andy Shevchenkob24512c2014-09-02 13:45:19 +0300130 memset(cell, 0, sizeof(*cell));
Denis Turischeve82c60a2010-02-19 11:26:25 +0100131
Andy Shevchenkob24512c2014-09-02 13:45:19 +0300132 cell->name = name;
133 cell->resources = res;
134 cell->num_resources = 1;
135 cell->ignore_resource_conflicts = true;
136 cell->id = id;
Alexander Stein19921ef2011-06-16 13:05:49 +0200137
Andy Shevchenkoec689a82014-09-02 13:45:21 +0300138 /* Check if we need to add an IRQ resource */
139 if (irq < 0)
140 return 0;
141
142 res++;
143
144 res->start = irq;
145 res->end = irq;
146 res->flags = IORESOURCE_IRQ;
147
148 cell->num_resources++;
149
Andy Shevchenkob24512c2014-09-02 13:45:19 +0300150 return 0;
151}
Alexander Stein19921ef2011-06-16 13:05:49 +0200152
Andy Shevchenkob24512c2014-09-02 13:45:19 +0300153static int lpc_sch_probe(struct pci_dev *dev, const struct pci_device_id *id)
154{
155 struct mfd_cell lpc_sch_cells[3];
156 struct lpc_sch_info *info = &sch_chipset_info[id->driver_data];
157 unsigned int cells = 0;
158 int ret;
159
160 ret = lpc_sch_populate_cell(dev, SMBASE, "isch_smbus",
Andy Shevchenkoec689a82014-09-02 13:45:21 +0300161 info->io_size_smbus, -1,
Andy Shevchenkob24512c2014-09-02 13:45:19 +0300162 id->device, &lpc_sch_cells[cells]);
163 if (ret < 0)
164 return ret;
165 if (ret == 0)
166 cells++;
167
168 ret = lpc_sch_populate_cell(dev, GPIOBASE, "sch_gpio",
Andy Shevchenkoec689a82014-09-02 13:45:21 +0300169 info->io_size_gpio, info->irq_gpio,
Andy Shevchenkob24512c2014-09-02 13:45:19 +0300170 id->device, &lpc_sch_cells[cells]);
171 if (ret < 0)
172 return ret;
173 if (ret == 0)
174 cells++;
175
176 ret = lpc_sch_populate_cell(dev, WDTBASE, "ie6xx_wdt",
Andy Shevchenkoec689a82014-09-02 13:45:21 +0300177 info->io_size_wdt, -1,
Andy Shevchenkob24512c2014-09-02 13:45:19 +0300178 id->device, &lpc_sch_cells[cells]);
179 if (ret < 0)
180 return ret;
181 if (ret == 0)
182 cells++;
Darren Hart5829e9b2013-02-08 15:20:36 -0800183
184 if (cells == 0) {
185 dev_err(&dev->dev, "All decode registers disabled.\n");
186 return -ENODEV;
187 }
188
Andy Shevchenkobde3e702014-11-03 19:29:23 +0200189 return mfd_add_devices(&dev->dev, 0, lpc_sch_cells, cells, NULL, 0, NULL);
Denis Turischeve82c60a2010-02-19 11:26:25 +0100190}
191
Bill Pemberton4740f732012-11-19 13:26:01 -0500192static void lpc_sch_remove(struct pci_dev *dev)
Denis Turischeve82c60a2010-02-19 11:26:25 +0100193{
194 mfd_remove_devices(&dev->dev);
195}
196
197static struct pci_driver lpc_sch_driver = {
198 .name = "lpc_sch",
199 .id_table = lpc_sch_ids,
200 .probe = lpc_sch_probe,
Bill Pemberton84449212012-11-19 13:20:24 -0500201 .remove = lpc_sch_remove,
Denis Turischeve82c60a2010-02-19 11:26:25 +0100202};
203
Axel Lin38a36f52012-04-03 09:09:19 +0800204module_pci_driver(lpc_sch_driver);
Denis Turischeve82c60a2010-02-19 11:26:25 +0100205
206MODULE_AUTHOR("Denis Turischev <denis@compulab.co.il>");
207MODULE_DESCRIPTION("LPC interface for Intel Poulsbo SCH");
208MODULE_LICENSE("GPL");