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Thomas Gleixner2025cf92019-05-29 07:18:02 -07001/* SPDX-License-Identifier: GPL-2.0-only */
Dan Williamse1455742015-07-30 17:57:47 -04002/*
3 * Copyright (c) 2014-2015, Intel Corporation.
Dan Williamse1455742015-07-30 17:57:47 -04004 */
5
6#ifndef __NVDIMM_PFN_H
7#define __NVDIMM_PFN_H
8
9#include <linux/types.h>
Dan Williamsd9cbe092016-03-03 09:14:36 -080010#include <linux/mmzone.h>
Dan Williamse1455742015-07-30 17:57:47 -040011
12#define PFN_SIG_LEN 16
13#define PFN_SIG "NVDIMM_PFN_INFO\0"
Dan Williamsc5ed9262016-05-18 14:50:12 -070014#define DAX_SIG "NVDIMM_DAX_INFO\0"
Dan Williamse1455742015-07-30 17:57:47 -040015
16struct nd_pfn_sb {
17 u8 signature[PFN_SIG_LEN];
18 u8 uuid[16];
19 u8 parent_uuid[16];
20 __le32 flags;
21 __le16 version_major;
22 __le16 version_minor;
Dan Williamscfe30b82016-03-03 09:38:00 -080023 __le64 dataoff; /* relative to namespace_base + start_pad */
Dan Williamse1455742015-07-30 17:57:47 -040024 __le64 npfns;
25 __le32 mode;
Dan Williamscfe30b82016-03-03 09:38:00 -080026 /* minor-version-1 additions for section alignment */
27 __le32 start_pad;
28 __le32 end_trunc;
Dan Williams45a0dac2016-03-31 15:41:18 -070029 /* minor-version-2 record the base alignment of the mapping */
30 __le32 align;
31 u8 padding[4000];
Dan Williamse1455742015-07-30 17:57:47 -040032 __le64 checksum;
33};
Dan Williamsd9cbe092016-03-03 09:14:36 -080034
35#ifdef CONFIG_SPARSEMEM
36#define PFN_SECTION_ALIGN_DOWN(x) SECTION_ALIGN_DOWN(x)
37#define PFN_SECTION_ALIGN_UP(x) SECTION_ALIGN_UP(x)
38#else
39/*
40 * In this case ZONE_DEVICE=n and we will disable 'pfn' device support,
41 * but we still want pmem to compile.
42 */
43#define PFN_SECTION_ALIGN_DOWN(x) (x)
44#define PFN_SECTION_ALIGN_UP(x) (x)
45#endif
Dan Williamscfe30b82016-03-03 09:38:00 -080046
47#define PHYS_SECTION_ALIGN_DOWN(x) PFN_PHYS(PFN_SECTION_ALIGN_DOWN(PHYS_PFN(x)))
48#define PHYS_SECTION_ALIGN_UP(x) PFN_PHYS(PFN_SECTION_ALIGN_UP(PHYS_PFN(x)))
Dan Williamse1455742015-07-30 17:57:47 -040049#endif /* __NVDIMM_PFN_H */