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Graeme Gregory518fb722011-05-02 16:20:08 -05001/*
2 * tps65910.c -- TI tps65910
3 *
4 * Copyright 2010 Texas Instruments Inc.
5 *
6 * Author: Graeme Gregory <gg@slimlogic.co.uk>
7 * Author: Jorge Eduardo Candelaria <jedu@slimlogic.co.uk>
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 */
15
16#include <linux/kernel.h>
17#include <linux/module.h>
18#include <linux/init.h>
19#include <linux/err.h>
20#include <linux/platform_device.h>
21#include <linux/regulator/driver.h>
22#include <linux/regulator/machine.h>
Graeme Gregory518fb722011-05-02 16:20:08 -050023#include <linux/slab.h>
24#include <linux/gpio.h>
25#include <linux/mfd/tps65910.h>
26
Graeme Gregory518fb722011-05-02 16:20:08 -050027#define TPS65910_SUPPLY_STATE_ENABLED 0x1
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +053028#define EXT_SLEEP_CONTROL (TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1 | \
29 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2 | \
Laxman Dewanganf30b0712012-03-07 18:21:49 +053030 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3 | \
31 TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP)
Graeme Gregory518fb722011-05-02 16:20:08 -050032
33/* supported VIO voltages in milivolts */
34static const u16 VIO_VSEL_table[] = {
35 1500, 1800, 2500, 3300,
36};
37
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -050038/* VSEL tables for TPS65910 specific LDOs and dcdc's */
39
40/* supported VDD3 voltages in milivolts */
Graeme Gregory518fb722011-05-02 16:20:08 -050041static const u16 VDD3_VSEL_table[] = {
42 5000,
43};
44
45/* supported VDIG1 voltages in milivolts */
46static const u16 VDIG1_VSEL_table[] = {
47 1200, 1500, 1800, 2700,
48};
49
50/* supported VDIG2 voltages in milivolts */
51static const u16 VDIG2_VSEL_table[] = {
52 1000, 1100, 1200, 1800,
53};
54
55/* supported VPLL voltages in milivolts */
56static const u16 VPLL_VSEL_table[] = {
57 1000, 1100, 1800, 2500,
58};
59
60/* supported VDAC voltages in milivolts */
61static const u16 VDAC_VSEL_table[] = {
62 1800, 2600, 2800, 2850,
63};
64
65/* supported VAUX1 voltages in milivolts */
66static const u16 VAUX1_VSEL_table[] = {
67 1800, 2500, 2800, 2850,
68};
69
70/* supported VAUX2 voltages in milivolts */
71static const u16 VAUX2_VSEL_table[] = {
72 1800, 2800, 2900, 3300,
73};
74
75/* supported VAUX33 voltages in milivolts */
76static const u16 VAUX33_VSEL_table[] = {
77 1800, 2000, 2800, 3300,
78};
79
80/* supported VMMC voltages in milivolts */
81static const u16 VMMC_VSEL_table[] = {
82 1800, 2800, 3000, 3300,
83};
84
85struct tps_info {
86 const char *name;
87 unsigned min_uV;
88 unsigned max_uV;
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +053089 u8 n_voltages;
90 const u16 *voltage_table;
Laxman Dewangan0651eed2012-03-13 11:35:20 +053091 int enable_time_us;
Graeme Gregory518fb722011-05-02 16:20:08 -050092};
93
94static struct tps_info tps65910_regs[] = {
95 {
96 .name = "VRTC",
Laxman Dewangan0651eed2012-03-13 11:35:20 +053097 .enable_time_us = 2200,
Graeme Gregory518fb722011-05-02 16:20:08 -050098 },
99 {
100 .name = "VIO",
101 .min_uV = 1500000,
102 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530103 .n_voltages = ARRAY_SIZE(VIO_VSEL_table),
104 .voltage_table = VIO_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530105 .enable_time_us = 350,
Graeme Gregory518fb722011-05-02 16:20:08 -0500106 },
107 {
108 .name = "VDD1",
109 .min_uV = 600000,
110 .max_uV = 4500000,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530111 .enable_time_us = 350,
Graeme Gregory518fb722011-05-02 16:20:08 -0500112 },
113 {
114 .name = "VDD2",
115 .min_uV = 600000,
116 .max_uV = 4500000,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530117 .enable_time_us = 350,
Graeme Gregory518fb722011-05-02 16:20:08 -0500118 },
119 {
120 .name = "VDD3",
121 .min_uV = 5000000,
122 .max_uV = 5000000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530123 .n_voltages = ARRAY_SIZE(VDD3_VSEL_table),
124 .voltage_table = VDD3_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530125 .enable_time_us = 200,
Graeme Gregory518fb722011-05-02 16:20:08 -0500126 },
127 {
128 .name = "VDIG1",
129 .min_uV = 1200000,
130 .max_uV = 2700000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530131 .n_voltages = ARRAY_SIZE(VDIG1_VSEL_table),
132 .voltage_table = VDIG1_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530133 .enable_time_us = 100,
Graeme Gregory518fb722011-05-02 16:20:08 -0500134 },
135 {
136 .name = "VDIG2",
137 .min_uV = 1000000,
138 .max_uV = 1800000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530139 .n_voltages = ARRAY_SIZE(VDIG2_VSEL_table),
140 .voltage_table = VDIG2_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530141 .enable_time_us = 100,
Graeme Gregory518fb722011-05-02 16:20:08 -0500142 },
143 {
144 .name = "VPLL",
145 .min_uV = 1000000,
146 .max_uV = 2500000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530147 .n_voltages = ARRAY_SIZE(VPLL_VSEL_table),
148 .voltage_table = VPLL_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530149 .enable_time_us = 100,
Graeme Gregory518fb722011-05-02 16:20:08 -0500150 },
151 {
152 .name = "VDAC",
153 .min_uV = 1800000,
154 .max_uV = 2850000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530155 .n_voltages = ARRAY_SIZE(VDAC_VSEL_table),
156 .voltage_table = VDAC_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530157 .enable_time_us = 100,
Graeme Gregory518fb722011-05-02 16:20:08 -0500158 },
159 {
160 .name = "VAUX1",
161 .min_uV = 1800000,
162 .max_uV = 2850000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530163 .n_voltages = ARRAY_SIZE(VAUX1_VSEL_table),
164 .voltage_table = VAUX1_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530165 .enable_time_us = 100,
Graeme Gregory518fb722011-05-02 16:20:08 -0500166 },
167 {
168 .name = "VAUX2",
169 .min_uV = 1800000,
170 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530171 .n_voltages = ARRAY_SIZE(VAUX2_VSEL_table),
172 .voltage_table = VAUX2_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530173 .enable_time_us = 100,
Graeme Gregory518fb722011-05-02 16:20:08 -0500174 },
175 {
176 .name = "VAUX33",
177 .min_uV = 1800000,
178 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530179 .n_voltages = ARRAY_SIZE(VAUX33_VSEL_table),
180 .voltage_table = VAUX33_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530181 .enable_time_us = 100,
Graeme Gregory518fb722011-05-02 16:20:08 -0500182 },
183 {
184 .name = "VMMC",
185 .min_uV = 1800000,
186 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530187 .n_voltages = ARRAY_SIZE(VMMC_VSEL_table),
188 .voltage_table = VMMC_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530189 .enable_time_us = 100,
Graeme Gregory518fb722011-05-02 16:20:08 -0500190 },
191};
192
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500193static struct tps_info tps65911_regs[] = {
194 {
Laxman Dewanganc2f8efd2012-01-18 20:46:56 +0530195 .name = "VRTC",
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530196 .enable_time_us = 2200,
Laxman Dewanganc2f8efd2012-01-18 20:46:56 +0530197 },
198 {
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500199 .name = "VIO",
200 .min_uV = 1500000,
201 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530202 .n_voltages = ARRAY_SIZE(VIO_VSEL_table),
203 .voltage_table = VIO_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530204 .enable_time_us = 350,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500205 },
206 {
207 .name = "VDD1",
208 .min_uV = 600000,
209 .max_uV = 4500000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530210 .n_voltages = 73,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530211 .enable_time_us = 350,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500212 },
213 {
214 .name = "VDD2",
215 .min_uV = 600000,
216 .max_uV = 4500000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530217 .n_voltages = 73,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530218 .enable_time_us = 350,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500219 },
220 {
221 .name = "VDDCTRL",
222 .min_uV = 600000,
223 .max_uV = 1400000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530224 .n_voltages = 65,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530225 .enable_time_us = 900,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500226 },
227 {
228 .name = "LDO1",
229 .min_uV = 1000000,
230 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530231 .n_voltages = 47,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530232 .enable_time_us = 420,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500233 },
234 {
235 .name = "LDO2",
236 .min_uV = 1000000,
237 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530238 .n_voltages = 47,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530239 .enable_time_us = 420,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500240 },
241 {
242 .name = "LDO3",
243 .min_uV = 1000000,
244 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530245 .n_voltages = 24,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530246 .enable_time_us = 230,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500247 },
248 {
249 .name = "LDO4",
250 .min_uV = 1000000,
251 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530252 .n_voltages = 47,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530253 .enable_time_us = 230,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500254 },
255 {
256 .name = "LDO5",
257 .min_uV = 1000000,
258 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530259 .n_voltages = 24,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530260 .enable_time_us = 230,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500261 },
262 {
263 .name = "LDO6",
264 .min_uV = 1000000,
265 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530266 .n_voltages = 24,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530267 .enable_time_us = 230,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500268 },
269 {
270 .name = "LDO7",
271 .min_uV = 1000000,
272 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530273 .n_voltages = 24,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530274 .enable_time_us = 230,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500275 },
276 {
277 .name = "LDO8",
278 .min_uV = 1000000,
279 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530280 .n_voltages = 24,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530281 .enable_time_us = 230,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500282 },
283};
284
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530285#define EXT_CONTROL_REG_BITS(id, regs_offs, bits) (((regs_offs) << 8) | (bits))
286static unsigned int tps65910_ext_sleep_control[] = {
287 0,
288 EXT_CONTROL_REG_BITS(VIO, 1, 0),
289 EXT_CONTROL_REG_BITS(VDD1, 1, 1),
290 EXT_CONTROL_REG_BITS(VDD2, 1, 2),
291 EXT_CONTROL_REG_BITS(VDD3, 1, 3),
292 EXT_CONTROL_REG_BITS(VDIG1, 0, 1),
293 EXT_CONTROL_REG_BITS(VDIG2, 0, 2),
294 EXT_CONTROL_REG_BITS(VPLL, 0, 6),
295 EXT_CONTROL_REG_BITS(VDAC, 0, 7),
296 EXT_CONTROL_REG_BITS(VAUX1, 0, 3),
297 EXT_CONTROL_REG_BITS(VAUX2, 0, 4),
298 EXT_CONTROL_REG_BITS(VAUX33, 0, 5),
299 EXT_CONTROL_REG_BITS(VMMC, 0, 0),
300};
301
302static unsigned int tps65911_ext_sleep_control[] = {
303 0,
304 EXT_CONTROL_REG_BITS(VIO, 1, 0),
305 EXT_CONTROL_REG_BITS(VDD1, 1, 1),
306 EXT_CONTROL_REG_BITS(VDD2, 1, 2),
307 EXT_CONTROL_REG_BITS(VDDCTRL, 1, 3),
308 EXT_CONTROL_REG_BITS(LDO1, 0, 1),
309 EXT_CONTROL_REG_BITS(LDO2, 0, 2),
310 EXT_CONTROL_REG_BITS(LDO3, 0, 7),
311 EXT_CONTROL_REG_BITS(LDO4, 0, 6),
312 EXT_CONTROL_REG_BITS(LDO5, 0, 3),
313 EXT_CONTROL_REG_BITS(LDO6, 0, 0),
314 EXT_CONTROL_REG_BITS(LDO7, 0, 5),
315 EXT_CONTROL_REG_BITS(LDO8, 0, 4),
316};
317
Graeme Gregory518fb722011-05-02 16:20:08 -0500318struct tps65910_reg {
Axel Lin39aa9b62011-07-11 09:57:43 +0800319 struct regulator_desc *desc;
Graeme Gregory518fb722011-05-02 16:20:08 -0500320 struct tps65910 *mfd;
Axel Lin39aa9b62011-07-11 09:57:43 +0800321 struct regulator_dev **rdev;
322 struct tps_info **info;
Graeme Gregory518fb722011-05-02 16:20:08 -0500323 struct mutex mutex;
Axel Lin39aa9b62011-07-11 09:57:43 +0800324 int num_regulators;
Graeme Gregory518fb722011-05-02 16:20:08 -0500325 int mode;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500326 int (*get_ctrl_reg)(int);
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530327 unsigned int *ext_sleep_control;
328 unsigned int board_ext_control[TPS65910_NUM_REGS];
Graeme Gregory518fb722011-05-02 16:20:08 -0500329};
330
331static inline int tps65910_read(struct tps65910_reg *pmic, u8 reg)
332{
333 u8 val;
334 int err;
335
336 err = pmic->mfd->read(pmic->mfd, reg, 1, &val);
337 if (err)
338 return err;
339
340 return val;
341}
342
343static inline int tps65910_write(struct tps65910_reg *pmic, u8 reg, u8 val)
344{
345 return pmic->mfd->write(pmic->mfd, reg, 1, &val);
346}
347
348static int tps65910_modify_bits(struct tps65910_reg *pmic, u8 reg,
349 u8 set_mask, u8 clear_mask)
350{
351 int err, data;
352
353 mutex_lock(&pmic->mutex);
354
355 data = tps65910_read(pmic, reg);
356 if (data < 0) {
357 dev_err(pmic->mfd->dev, "Read from reg 0x%x failed\n", reg);
358 err = data;
359 goto out;
360 }
361
362 data &= ~clear_mask;
363 data |= set_mask;
364 err = tps65910_write(pmic, reg, data);
365 if (err)
366 dev_err(pmic->mfd->dev, "Write for reg 0x%x failed\n", reg);
367
368out:
369 mutex_unlock(&pmic->mutex);
370 return err;
371}
372
373static int tps65910_reg_read(struct tps65910_reg *pmic, u8 reg)
374{
375 int data;
376
377 mutex_lock(&pmic->mutex);
378
379 data = tps65910_read(pmic, reg);
380 if (data < 0)
381 dev_err(pmic->mfd->dev, "Read from reg 0x%x failed\n", reg);
382
383 mutex_unlock(&pmic->mutex);
384 return data;
385}
386
387static int tps65910_reg_write(struct tps65910_reg *pmic, u8 reg, u8 val)
388{
389 int err;
390
391 mutex_lock(&pmic->mutex);
392
393 err = tps65910_write(pmic, reg, val);
394 if (err < 0)
395 dev_err(pmic->mfd->dev, "Write for reg 0x%x failed\n", reg);
396
397 mutex_unlock(&pmic->mutex);
398 return err;
399}
400
401static int tps65910_get_ctrl_register(int id)
402{
403 switch (id) {
404 case TPS65910_REG_VRTC:
405 return TPS65910_VRTC;
406 case TPS65910_REG_VIO:
407 return TPS65910_VIO;
408 case TPS65910_REG_VDD1:
409 return TPS65910_VDD1;
410 case TPS65910_REG_VDD2:
411 return TPS65910_VDD2;
412 case TPS65910_REG_VDD3:
413 return TPS65910_VDD3;
414 case TPS65910_REG_VDIG1:
415 return TPS65910_VDIG1;
416 case TPS65910_REG_VDIG2:
417 return TPS65910_VDIG2;
418 case TPS65910_REG_VPLL:
419 return TPS65910_VPLL;
420 case TPS65910_REG_VDAC:
421 return TPS65910_VDAC;
422 case TPS65910_REG_VAUX1:
423 return TPS65910_VAUX1;
424 case TPS65910_REG_VAUX2:
425 return TPS65910_VAUX2;
426 case TPS65910_REG_VAUX33:
427 return TPS65910_VAUX33;
428 case TPS65910_REG_VMMC:
429 return TPS65910_VMMC;
430 default:
431 return -EINVAL;
432 }
433}
434
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500435static int tps65911_get_ctrl_register(int id)
436{
437 switch (id) {
438 case TPS65910_REG_VRTC:
439 return TPS65910_VRTC;
440 case TPS65910_REG_VIO:
441 return TPS65910_VIO;
442 case TPS65910_REG_VDD1:
443 return TPS65910_VDD1;
444 case TPS65910_REG_VDD2:
445 return TPS65910_VDD2;
446 case TPS65911_REG_VDDCTRL:
447 return TPS65911_VDDCTRL;
448 case TPS65911_REG_LDO1:
449 return TPS65911_LDO1;
450 case TPS65911_REG_LDO2:
451 return TPS65911_LDO2;
452 case TPS65911_REG_LDO3:
453 return TPS65911_LDO3;
454 case TPS65911_REG_LDO4:
455 return TPS65911_LDO4;
456 case TPS65911_REG_LDO5:
457 return TPS65911_LDO5;
458 case TPS65911_REG_LDO6:
459 return TPS65911_LDO6;
460 case TPS65911_REG_LDO7:
461 return TPS65911_LDO7;
462 case TPS65911_REG_LDO8:
463 return TPS65911_LDO8;
464 default:
465 return -EINVAL;
466 }
467}
468
Graeme Gregory518fb722011-05-02 16:20:08 -0500469static int tps65910_is_enabled(struct regulator_dev *dev)
470{
471 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
472 int reg, value, id = rdev_get_id(dev);
473
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500474 reg = pmic->get_ctrl_reg(id);
Graeme Gregory518fb722011-05-02 16:20:08 -0500475 if (reg < 0)
476 return reg;
477
478 value = tps65910_reg_read(pmic, reg);
479 if (value < 0)
480 return value;
481
482 return value & TPS65910_SUPPLY_STATE_ENABLED;
483}
484
485static int tps65910_enable(struct regulator_dev *dev)
486{
487 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
488 struct tps65910 *mfd = pmic->mfd;
489 int reg, id = rdev_get_id(dev);
490
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500491 reg = pmic->get_ctrl_reg(id);
Graeme Gregory518fb722011-05-02 16:20:08 -0500492 if (reg < 0)
493 return reg;
494
495 return tps65910_set_bits(mfd, reg, TPS65910_SUPPLY_STATE_ENABLED);
496}
497
498static int tps65910_disable(struct regulator_dev *dev)
499{
500 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
501 struct tps65910 *mfd = pmic->mfd;
502 int reg, id = rdev_get_id(dev);
503
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500504 reg = pmic->get_ctrl_reg(id);
Graeme Gregory518fb722011-05-02 16:20:08 -0500505 if (reg < 0)
506 return reg;
507
508 return tps65910_clear_bits(mfd, reg, TPS65910_SUPPLY_STATE_ENABLED);
509}
510
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530511static int tps65910_enable_time(struct regulator_dev *dev)
512{
513 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
514 int id = rdev_get_id(dev);
515 return pmic->info[id]->enable_time_us;
516}
Graeme Gregory518fb722011-05-02 16:20:08 -0500517
518static int tps65910_set_mode(struct regulator_dev *dev, unsigned int mode)
519{
520 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
521 struct tps65910 *mfd = pmic->mfd;
522 int reg, value, id = rdev_get_id(dev);
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500523
524 reg = pmic->get_ctrl_reg(id);
Graeme Gregory518fb722011-05-02 16:20:08 -0500525 if (reg < 0)
526 return reg;
527
528 switch (mode) {
529 case REGULATOR_MODE_NORMAL:
530 return tps65910_modify_bits(pmic, reg, LDO_ST_ON_BIT,
531 LDO_ST_MODE_BIT);
532 case REGULATOR_MODE_IDLE:
533 value = LDO_ST_ON_BIT | LDO_ST_MODE_BIT;
534 return tps65910_set_bits(mfd, reg, value);
535 case REGULATOR_MODE_STANDBY:
536 return tps65910_clear_bits(mfd, reg, LDO_ST_ON_BIT);
537 }
538
539 return -EINVAL;
540}
541
542static unsigned int tps65910_get_mode(struct regulator_dev *dev)
543{
544 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
545 int reg, value, id = rdev_get_id(dev);
546
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500547 reg = pmic->get_ctrl_reg(id);
Graeme Gregory518fb722011-05-02 16:20:08 -0500548 if (reg < 0)
549 return reg;
550
551 value = tps65910_reg_read(pmic, reg);
552 if (value < 0)
553 return value;
554
Axel Lin58599392012-03-13 07:15:27 +0800555 if (!(value & LDO_ST_ON_BIT))
Graeme Gregory518fb722011-05-02 16:20:08 -0500556 return REGULATOR_MODE_STANDBY;
557 else if (value & LDO_ST_MODE_BIT)
558 return REGULATOR_MODE_IDLE;
559 else
560 return REGULATOR_MODE_NORMAL;
561}
562
Laxman Dewangan18039e02012-03-14 13:00:58 +0530563static int tps65910_get_voltage_dcdc_sel(struct regulator_dev *dev)
Graeme Gregory518fb722011-05-02 16:20:08 -0500564{
565 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
Laxman Dewangan18039e02012-03-14 13:00:58 +0530566 int id = rdev_get_id(dev);
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500567 int opvsel = 0, srvsel = 0, vselmax = 0, mult = 0, sr = 0;
Graeme Gregory518fb722011-05-02 16:20:08 -0500568
569 switch (id) {
570 case TPS65910_REG_VDD1:
571 opvsel = tps65910_reg_read(pmic, TPS65910_VDD1_OP);
572 mult = tps65910_reg_read(pmic, TPS65910_VDD1);
573 mult = (mult & VDD1_VGAIN_SEL_MASK) >> VDD1_VGAIN_SEL_SHIFT;
574 srvsel = tps65910_reg_read(pmic, TPS65910_VDD1_SR);
575 sr = opvsel & VDD1_OP_CMD_MASK;
576 opvsel &= VDD1_OP_SEL_MASK;
577 srvsel &= VDD1_SR_SEL_MASK;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500578 vselmax = 75;
Graeme Gregory518fb722011-05-02 16:20:08 -0500579 break;
580 case TPS65910_REG_VDD2:
581 opvsel = tps65910_reg_read(pmic, TPS65910_VDD2_OP);
582 mult = tps65910_reg_read(pmic, TPS65910_VDD2);
583 mult = (mult & VDD2_VGAIN_SEL_MASK) >> VDD2_VGAIN_SEL_SHIFT;
584 srvsel = tps65910_reg_read(pmic, TPS65910_VDD2_SR);
585 sr = opvsel & VDD2_OP_CMD_MASK;
586 opvsel &= VDD2_OP_SEL_MASK;
587 srvsel &= VDD2_SR_SEL_MASK;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500588 vselmax = 75;
589 break;
590 case TPS65911_REG_VDDCTRL:
591 opvsel = tps65910_reg_read(pmic, TPS65911_VDDCTRL_OP);
592 srvsel = tps65910_reg_read(pmic, TPS65911_VDDCTRL_SR);
593 sr = opvsel & VDDCTRL_OP_CMD_MASK;
594 opvsel &= VDDCTRL_OP_SEL_MASK;
595 srvsel &= VDDCTRL_SR_SEL_MASK;
596 vselmax = 64;
Graeme Gregory518fb722011-05-02 16:20:08 -0500597 break;
598 }
599
600 /* multiplier 0 == 1 but 2,3 normal */
601 if (!mult)
602 mult=1;
603
604 if (sr) {
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500605 /* normalise to valid range */
606 if (srvsel < 3)
607 srvsel = 3;
608 if (srvsel > vselmax)
609 srvsel = vselmax;
Laxman Dewangan18039e02012-03-14 13:00:58 +0530610 return srvsel - 3;
Graeme Gregory518fb722011-05-02 16:20:08 -0500611 } else {
612
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500613 /* normalise to valid range*/
614 if (opvsel < 3)
615 opvsel = 3;
616 if (opvsel > vselmax)
617 opvsel = vselmax;
Laxman Dewangan18039e02012-03-14 13:00:58 +0530618 return opvsel - 3;
Graeme Gregory518fb722011-05-02 16:20:08 -0500619 }
Laxman Dewangan18039e02012-03-14 13:00:58 +0530620 return -EINVAL;
Graeme Gregory518fb722011-05-02 16:20:08 -0500621}
622
Axel Lin1f904fd2012-05-09 09:22:47 +0800623static int tps65910_get_voltage_sel(struct regulator_dev *dev)
Graeme Gregory518fb722011-05-02 16:20:08 -0500624{
625 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
Axel Lin1f904fd2012-05-09 09:22:47 +0800626 int reg, value, id = rdev_get_id(dev);
Graeme Gregory518fb722011-05-02 16:20:08 -0500627
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500628 reg = pmic->get_ctrl_reg(id);
Graeme Gregory518fb722011-05-02 16:20:08 -0500629 if (reg < 0)
630 return reg;
631
632 value = tps65910_reg_read(pmic, reg);
633 if (value < 0)
634 return value;
635
636 switch (id) {
637 case TPS65910_REG_VIO:
638 case TPS65910_REG_VDIG1:
639 case TPS65910_REG_VDIG2:
640 case TPS65910_REG_VPLL:
641 case TPS65910_REG_VDAC:
642 case TPS65910_REG_VAUX1:
643 case TPS65910_REG_VAUX2:
644 case TPS65910_REG_VAUX33:
645 case TPS65910_REG_VMMC:
646 value &= LDO_SEL_MASK;
647 value >>= LDO_SEL_SHIFT;
648 break;
649 default:
650 return -EINVAL;
651 }
652
Axel Lin1f904fd2012-05-09 09:22:47 +0800653 return value;
Graeme Gregory518fb722011-05-02 16:20:08 -0500654}
655
656static int tps65910_get_voltage_vdd3(struct regulator_dev *dev)
657{
658 return 5 * 1000 * 1000;
659}
660
Axel Lin1f904fd2012-05-09 09:22:47 +0800661static int tps65911_get_voltage_sel(struct regulator_dev *dev)
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500662{
663 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
Axel Lin1f904fd2012-05-09 09:22:47 +0800664 int id = rdev_get_id(dev);
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500665 u8 value, reg;
666
667 reg = pmic->get_ctrl_reg(id);
668
669 value = tps65910_reg_read(pmic, reg);
670
671 switch (id) {
672 case TPS65911_REG_LDO1:
673 case TPS65911_REG_LDO2:
674 case TPS65911_REG_LDO4:
675 value &= LDO1_SEL_MASK;
676 value >>= LDO_SEL_SHIFT;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500677 break;
678 case TPS65911_REG_LDO3:
679 case TPS65911_REG_LDO5:
680 case TPS65911_REG_LDO6:
681 case TPS65911_REG_LDO7:
682 case TPS65911_REG_LDO8:
683 value &= LDO3_SEL_MASK;
684 value >>= LDO_SEL_SHIFT;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500685 break;
686 case TPS65910_REG_VIO:
Laxman Dewangane882eae2012-02-17 18:56:11 +0530687 value &= LDO_SEL_MASK;
688 value >>= LDO_SEL_SHIFT;
Axel Lin1f904fd2012-05-09 09:22:47 +0800689 break;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500690 default:
691 return -EINVAL;
692 }
693
Axel Lin1f904fd2012-05-09 09:22:47 +0800694 return value;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500695}
696
Axel Lin94732b92012-03-09 10:22:20 +0800697static int tps65910_set_voltage_dcdc_sel(struct regulator_dev *dev,
698 unsigned selector)
Graeme Gregory518fb722011-05-02 16:20:08 -0500699{
700 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
701 int id = rdev_get_id(dev), vsel;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500702 int dcdc_mult = 0;
Graeme Gregory518fb722011-05-02 16:20:08 -0500703
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500704 switch (id) {
705 case TPS65910_REG_VDD1:
Afzal Mohammed780dc9b2011-11-08 18:54:10 +0530706 dcdc_mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500707 if (dcdc_mult == 1)
708 dcdc_mult--;
Afzal Mohammed780dc9b2011-11-08 18:54:10 +0530709 vsel = (selector % VDD1_2_NUM_VOLT_FINE) + 3;
Graeme Gregory518fb722011-05-02 16:20:08 -0500710
Graeme Gregory518fb722011-05-02 16:20:08 -0500711 tps65910_modify_bits(pmic, TPS65910_VDD1,
712 (dcdc_mult << VDD1_VGAIN_SEL_SHIFT),
713 VDD1_VGAIN_SEL_MASK);
714 tps65910_reg_write(pmic, TPS65910_VDD1_OP, vsel);
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500715 break;
716 case TPS65910_REG_VDD2:
Afzal Mohammed780dc9b2011-11-08 18:54:10 +0530717 dcdc_mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500718 if (dcdc_mult == 1)
719 dcdc_mult--;
Afzal Mohammed780dc9b2011-11-08 18:54:10 +0530720 vsel = (selector % VDD1_2_NUM_VOLT_FINE) + 3;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500721
Graeme Gregory518fb722011-05-02 16:20:08 -0500722 tps65910_modify_bits(pmic, TPS65910_VDD2,
723 (dcdc_mult << VDD2_VGAIN_SEL_SHIFT),
724 VDD1_VGAIN_SEL_MASK);
725 tps65910_reg_write(pmic, TPS65910_VDD2_OP, vsel);
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500726 break;
727 case TPS65911_REG_VDDCTRL:
Laxman Dewanganc4632ae2012-03-07 16:39:05 +0530728 vsel = selector + 3;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500729 tps65910_reg_write(pmic, TPS65911_VDDCTRL_OP, vsel);
Graeme Gregory518fb722011-05-02 16:20:08 -0500730 }
731
732 return 0;
733}
734
Axel Lin94732b92012-03-09 10:22:20 +0800735static int tps65910_set_voltage_sel(struct regulator_dev *dev,
736 unsigned selector)
Graeme Gregory518fb722011-05-02 16:20:08 -0500737{
738 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
739 int reg, id = rdev_get_id(dev);
740
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500741 reg = pmic->get_ctrl_reg(id);
Graeme Gregory518fb722011-05-02 16:20:08 -0500742 if (reg < 0)
743 return reg;
744
745 switch (id) {
746 case TPS65910_REG_VIO:
747 case TPS65910_REG_VDIG1:
748 case TPS65910_REG_VDIG2:
749 case TPS65910_REG_VPLL:
750 case TPS65910_REG_VDAC:
751 case TPS65910_REG_VAUX1:
752 case TPS65910_REG_VAUX2:
753 case TPS65910_REG_VAUX33:
754 case TPS65910_REG_VMMC:
755 return tps65910_modify_bits(pmic, reg,
756 (selector << LDO_SEL_SHIFT), LDO_SEL_MASK);
757 }
758
759 return -EINVAL;
760}
761
Axel Lin94732b92012-03-09 10:22:20 +0800762static int tps65911_set_voltage_sel(struct regulator_dev *dev,
763 unsigned selector)
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500764{
765 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
766 int reg, id = rdev_get_id(dev);
767
768 reg = pmic->get_ctrl_reg(id);
769 if (reg < 0)
770 return reg;
771
772 switch (id) {
773 case TPS65911_REG_LDO1:
774 case TPS65911_REG_LDO2:
775 case TPS65911_REG_LDO4:
776 return tps65910_modify_bits(pmic, reg,
777 (selector << LDO_SEL_SHIFT), LDO1_SEL_MASK);
778 case TPS65911_REG_LDO3:
779 case TPS65911_REG_LDO5:
780 case TPS65911_REG_LDO6:
781 case TPS65911_REG_LDO7:
782 case TPS65911_REG_LDO8:
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500783 return tps65910_modify_bits(pmic, reg,
784 (selector << LDO_SEL_SHIFT), LDO3_SEL_MASK);
Laxman Dewangane882eae2012-02-17 18:56:11 +0530785 case TPS65910_REG_VIO:
786 return tps65910_modify_bits(pmic, reg,
787 (selector << LDO_SEL_SHIFT), LDO_SEL_MASK);
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500788 }
789
790 return -EINVAL;
791}
792
793
Graeme Gregory518fb722011-05-02 16:20:08 -0500794static int tps65910_list_voltage_dcdc(struct regulator_dev *dev,
795 unsigned selector)
796{
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500797 int volt, mult = 1, id = rdev_get_id(dev);
Graeme Gregory518fb722011-05-02 16:20:08 -0500798
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500799 switch (id) {
800 case TPS65910_REG_VDD1:
801 case TPS65910_REG_VDD2:
Afzal Mohammed780dc9b2011-11-08 18:54:10 +0530802 mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500803 volt = VDD1_2_MIN_VOLT +
Afzal Mohammed780dc9b2011-11-08 18:54:10 +0530804 (selector % VDD1_2_NUM_VOLT_FINE) * VDD1_2_OFFSET;
Axel Lind04156b2011-07-10 21:44:09 +0800805 break;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500806 case TPS65911_REG_VDDCTRL:
807 volt = VDDCTRL_MIN_VOLT + (selector * VDDCTRL_OFFSET);
Axel Lind04156b2011-07-10 21:44:09 +0800808 break;
809 default:
810 BUG();
811 return -EINVAL;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500812 }
Graeme Gregory518fb722011-05-02 16:20:08 -0500813
814 return volt * 100 * mult;
815}
816
817static int tps65910_list_voltage(struct regulator_dev *dev,
818 unsigned selector)
819{
820 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
821 int id = rdev_get_id(dev), voltage;
822
823 if (id < TPS65910_REG_VIO || id > TPS65910_REG_VMMC)
824 return -EINVAL;
825
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530826 if (selector >= pmic->info[id]->n_voltages)
Graeme Gregory518fb722011-05-02 16:20:08 -0500827 return -EINVAL;
828 else
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530829 voltage = pmic->info[id]->voltage_table[selector] * 1000;
Graeme Gregory518fb722011-05-02 16:20:08 -0500830
831 return voltage;
832}
833
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500834static int tps65911_list_voltage(struct regulator_dev *dev, unsigned selector)
835{
836 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
837 int step_mv = 0, id = rdev_get_id(dev);
838
839 switch(id) {
840 case TPS65911_REG_LDO1:
841 case TPS65911_REG_LDO2:
842 case TPS65911_REG_LDO4:
843 /* The first 5 values of the selector correspond to 1V */
844 if (selector < 5)
845 selector = 0;
846 else
847 selector -= 4;
848
849 step_mv = 50;
850 break;
851 case TPS65911_REG_LDO3:
852 case TPS65911_REG_LDO5:
853 case TPS65911_REG_LDO6:
854 case TPS65911_REG_LDO7:
855 case TPS65911_REG_LDO8:
856 /* The first 3 values of the selector correspond to 1V */
857 if (selector < 3)
858 selector = 0;
859 else
860 selector -= 2;
861
862 step_mv = 100;
863 break;
864 case TPS65910_REG_VIO:
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530865 return pmic->info[id]->voltage_table[selector] * 1000;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500866 default:
867 return -EINVAL;
868 }
869
870 return (LDO_MIN_VOLT + selector * step_mv) * 1000;
871}
872
Laxman Dewangan18039e02012-03-14 13:00:58 +0530873static int tps65910_set_voltage_dcdc_time_sel(struct regulator_dev *dev,
874 unsigned int old_selector, unsigned int new_selector)
875{
876 int id = rdev_get_id(dev);
877 int old_volt, new_volt;
878
879 old_volt = tps65910_list_voltage_dcdc(dev, old_selector);
880 if (old_volt < 0)
881 return old_volt;
882
883 new_volt = tps65910_list_voltage_dcdc(dev, new_selector);
884 if (new_volt < 0)
885 return new_volt;
886
887 /* VDD1 and VDD2 are 12.5mV/us, VDDCTRL is 100mV/20us */
888 switch (id) {
889 case TPS65910_REG_VDD1:
890 case TPS65910_REG_VDD2:
891 return DIV_ROUND_UP(abs(old_volt - new_volt), 12500);
892 case TPS65911_REG_VDDCTRL:
893 return DIV_ROUND_UP(abs(old_volt - new_volt), 5000);
894 }
895 return -EINVAL;
896}
897
Graeme Gregory518fb722011-05-02 16:20:08 -0500898/* Regulator ops (except VRTC) */
899static struct regulator_ops tps65910_ops_dcdc = {
900 .is_enabled = tps65910_is_enabled,
901 .enable = tps65910_enable,
902 .disable = tps65910_disable,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530903 .enable_time = tps65910_enable_time,
Graeme Gregory518fb722011-05-02 16:20:08 -0500904 .set_mode = tps65910_set_mode,
905 .get_mode = tps65910_get_mode,
Laxman Dewangan18039e02012-03-14 13:00:58 +0530906 .get_voltage_sel = tps65910_get_voltage_dcdc_sel,
Axel Lin94732b92012-03-09 10:22:20 +0800907 .set_voltage_sel = tps65910_set_voltage_dcdc_sel,
Laxman Dewangan18039e02012-03-14 13:00:58 +0530908 .set_voltage_time_sel = tps65910_set_voltage_dcdc_time_sel,
Graeme Gregory518fb722011-05-02 16:20:08 -0500909 .list_voltage = tps65910_list_voltage_dcdc,
910};
911
912static struct regulator_ops tps65910_ops_vdd3 = {
913 .is_enabled = tps65910_is_enabled,
914 .enable = tps65910_enable,
915 .disable = tps65910_disable,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530916 .enable_time = tps65910_enable_time,
Graeme Gregory518fb722011-05-02 16:20:08 -0500917 .set_mode = tps65910_set_mode,
918 .get_mode = tps65910_get_mode,
919 .get_voltage = tps65910_get_voltage_vdd3,
920 .list_voltage = tps65910_list_voltage,
921};
922
923static struct regulator_ops tps65910_ops = {
924 .is_enabled = tps65910_is_enabled,
925 .enable = tps65910_enable,
926 .disable = tps65910_disable,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530927 .enable_time = tps65910_enable_time,
Graeme Gregory518fb722011-05-02 16:20:08 -0500928 .set_mode = tps65910_set_mode,
929 .get_mode = tps65910_get_mode,
Axel Lin1f904fd2012-05-09 09:22:47 +0800930 .get_voltage_sel = tps65910_get_voltage_sel,
Axel Lin94732b92012-03-09 10:22:20 +0800931 .set_voltage_sel = tps65910_set_voltage_sel,
Graeme Gregory518fb722011-05-02 16:20:08 -0500932 .list_voltage = tps65910_list_voltage,
933};
934
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500935static struct regulator_ops tps65911_ops = {
936 .is_enabled = tps65910_is_enabled,
937 .enable = tps65910_enable,
938 .disable = tps65910_disable,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530939 .enable_time = tps65910_enable_time,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500940 .set_mode = tps65910_set_mode,
941 .get_mode = tps65910_get_mode,
Axel Lin1f904fd2012-05-09 09:22:47 +0800942 .get_voltage_sel = tps65911_get_voltage_sel,
Axel Lin94732b92012-03-09 10:22:20 +0800943 .set_voltage_sel = tps65911_set_voltage_sel,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500944 .list_voltage = tps65911_list_voltage,
945};
946
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530947static int tps65910_set_ext_sleep_config(struct tps65910_reg *pmic,
948 int id, int ext_sleep_config)
949{
950 struct tps65910 *mfd = pmic->mfd;
951 u8 regoffs = (pmic->ext_sleep_control[id] >> 8) & 0xFF;
952 u8 bit_pos = (1 << pmic->ext_sleep_control[id] & 0xFF);
953 int ret;
954
955 /*
956 * Regulator can not be control from multiple external input EN1, EN2
957 * and EN3 together.
958 */
959 if (ext_sleep_config & EXT_SLEEP_CONTROL) {
960 int en_count;
961 en_count = ((ext_sleep_config &
962 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1) != 0);
963 en_count += ((ext_sleep_config &
964 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2) != 0);
965 en_count += ((ext_sleep_config &
966 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3) != 0);
Laxman Dewanganf30b0712012-03-07 18:21:49 +0530967 en_count += ((ext_sleep_config &
968 TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP) != 0);
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530969 if (en_count > 1) {
970 dev_err(mfd->dev,
971 "External sleep control flag is not proper\n");
972 return -EINVAL;
973 }
974 }
975
976 pmic->board_ext_control[id] = ext_sleep_config;
977
978 /* External EN1 control */
979 if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1)
980 ret = tps65910_set_bits(mfd,
981 TPS65910_EN1_LDO_ASS + regoffs, bit_pos);
982 else
983 ret = tps65910_clear_bits(mfd,
984 TPS65910_EN1_LDO_ASS + regoffs, bit_pos);
985 if (ret < 0) {
986 dev_err(mfd->dev,
987 "Error in configuring external control EN1\n");
988 return ret;
989 }
990
991 /* External EN2 control */
992 if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2)
993 ret = tps65910_set_bits(mfd,
994 TPS65910_EN2_LDO_ASS + regoffs, bit_pos);
995 else
996 ret = tps65910_clear_bits(mfd,
997 TPS65910_EN2_LDO_ASS + regoffs, bit_pos);
998 if (ret < 0) {
999 dev_err(mfd->dev,
1000 "Error in configuring external control EN2\n");
1001 return ret;
1002 }
1003
1004 /* External EN3 control for TPS65910 LDO only */
1005 if ((tps65910_chip_id(mfd) == TPS65910) &&
1006 (id >= TPS65910_REG_VDIG1)) {
1007 if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3)
1008 ret = tps65910_set_bits(mfd,
1009 TPS65910_EN3_LDO_ASS + regoffs, bit_pos);
1010 else
1011 ret = tps65910_clear_bits(mfd,
1012 TPS65910_EN3_LDO_ASS + regoffs, bit_pos);
1013 if (ret < 0) {
1014 dev_err(mfd->dev,
1015 "Error in configuring external control EN3\n");
1016 return ret;
1017 }
1018 }
1019
1020 /* Return if no external control is selected */
1021 if (!(ext_sleep_config & EXT_SLEEP_CONTROL)) {
1022 /* Clear all sleep controls */
1023 ret = tps65910_clear_bits(mfd,
1024 TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos);
1025 if (!ret)
1026 ret = tps65910_clear_bits(mfd,
1027 TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
1028 if (ret < 0)
1029 dev_err(mfd->dev,
1030 "Error in configuring SLEEP register\n");
1031 return ret;
1032 }
1033
1034 /*
1035 * For regulator that has separate operational and sleep register make
1036 * sure that operational is used and clear sleep register to turn
1037 * regulator off when external control is inactive
1038 */
1039 if ((id == TPS65910_REG_VDD1) ||
1040 (id == TPS65910_REG_VDD2) ||
1041 ((id == TPS65911_REG_VDDCTRL) &&
1042 (tps65910_chip_id(mfd) == TPS65911))) {
1043 int op_reg_add = pmic->get_ctrl_reg(id) + 1;
1044 int sr_reg_add = pmic->get_ctrl_reg(id) + 2;
1045 int opvsel = tps65910_reg_read(pmic, op_reg_add);
1046 int srvsel = tps65910_reg_read(pmic, sr_reg_add);
1047 if (opvsel & VDD1_OP_CMD_MASK) {
1048 u8 reg_val = srvsel & VDD1_OP_SEL_MASK;
1049 ret = tps65910_reg_write(pmic, op_reg_add, reg_val);
1050 if (ret < 0) {
1051 dev_err(mfd->dev,
1052 "Error in configuring op register\n");
1053 return ret;
1054 }
1055 }
1056 ret = tps65910_reg_write(pmic, sr_reg_add, 0);
1057 if (ret < 0) {
1058 dev_err(mfd->dev, "Error in settting sr register\n");
1059 return ret;
1060 }
1061 }
1062
1063 ret = tps65910_clear_bits(mfd,
1064 TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos);
Laxman Dewanganf30b0712012-03-07 18:21:49 +05301065 if (!ret) {
1066 if (ext_sleep_config & TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP)
1067 ret = tps65910_set_bits(mfd,
1068 TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
1069 else
1070 ret = tps65910_clear_bits(mfd,
1071 TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
1072 }
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +05301073 if (ret < 0)
1074 dev_err(mfd->dev,
1075 "Error in configuring SLEEP register\n");
Laxman Dewanganf30b0712012-03-07 18:21:49 +05301076
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +05301077 return ret;
1078}
1079
Graeme Gregory518fb722011-05-02 16:20:08 -05001080static __devinit int tps65910_probe(struct platform_device *pdev)
1081{
1082 struct tps65910 *tps65910 = dev_get_drvdata(pdev->dev.parent);
Mark Brownc1727082012-04-04 00:50:22 +01001083 struct regulator_config config = { };
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001084 struct tps_info *info;
Graeme Gregory518fb722011-05-02 16:20:08 -05001085 struct regulator_init_data *reg_data;
1086 struct regulator_dev *rdev;
1087 struct tps65910_reg *pmic;
1088 struct tps65910_board *pmic_plat_data;
Graeme Gregory518fb722011-05-02 16:20:08 -05001089 int i, err;
1090
1091 pmic_plat_data = dev_get_platdata(tps65910->dev);
1092 if (!pmic_plat_data)
1093 return -EINVAL;
1094
Axel Lin9eb0c422012-04-11 14:40:18 +08001095 pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), GFP_KERNEL);
Graeme Gregory518fb722011-05-02 16:20:08 -05001096 if (!pmic)
1097 return -ENOMEM;
1098
1099 mutex_init(&pmic->mutex);
1100 pmic->mfd = tps65910;
1101 platform_set_drvdata(pdev, pmic);
1102
1103 /* Give control of all register to control port */
1104 tps65910_set_bits(pmic->mfd, TPS65910_DEVCTRL,
1105 DEVCTRL_SR_CTL_I2C_SEL_MASK);
1106
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001107 switch(tps65910_chip_id(tps65910)) {
1108 case TPS65910:
1109 pmic->get_ctrl_reg = &tps65910_get_ctrl_register;
Axel Lin39aa9b62011-07-11 09:57:43 +08001110 pmic->num_regulators = ARRAY_SIZE(tps65910_regs);
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +05301111 pmic->ext_sleep_control = tps65910_ext_sleep_control;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001112 info = tps65910_regs;
Axel Lind04156b2011-07-10 21:44:09 +08001113 break;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001114 case TPS65911:
1115 pmic->get_ctrl_reg = &tps65911_get_ctrl_register;
Axel Lin39aa9b62011-07-11 09:57:43 +08001116 pmic->num_regulators = ARRAY_SIZE(tps65911_regs);
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +05301117 pmic->ext_sleep_control = tps65911_ext_sleep_control;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001118 info = tps65911_regs;
Axel Lind04156b2011-07-10 21:44:09 +08001119 break;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001120 default:
1121 pr_err("Invalid tps chip version\n");
1122 return -ENODEV;
1123 }
1124
Axel Lin39aa9b62011-07-11 09:57:43 +08001125 pmic->desc = kcalloc(pmic->num_regulators,
1126 sizeof(struct regulator_desc), GFP_KERNEL);
1127 if (!pmic->desc) {
1128 err = -ENOMEM;
Axel Lin9eb0c422012-04-11 14:40:18 +08001129 goto err_out;
Axel Lin39aa9b62011-07-11 09:57:43 +08001130 }
1131
1132 pmic->info = kcalloc(pmic->num_regulators,
1133 sizeof(struct tps_info *), GFP_KERNEL);
1134 if (!pmic->info) {
1135 err = -ENOMEM;
1136 goto err_free_desc;
1137 }
1138
1139 pmic->rdev = kcalloc(pmic->num_regulators,
1140 sizeof(struct regulator_dev *), GFP_KERNEL);
1141 if (!pmic->rdev) {
1142 err = -ENOMEM;
1143 goto err_free_info;
1144 }
1145
Kyle Mannac1fc1482011-11-03 12:08:06 -05001146 for (i = 0; i < pmic->num_regulators && i < TPS65910_NUM_REGS;
1147 i++, info++) {
1148
1149 reg_data = pmic_plat_data->tps65910_pmic_init_data[i];
1150
1151 /* Regulator API handles empty constraints but not NULL
1152 * constraints */
1153 if (!reg_data)
1154 continue;
1155
Graeme Gregory518fb722011-05-02 16:20:08 -05001156 /* Register the regulators */
1157 pmic->info[i] = info;
1158
1159 pmic->desc[i].name = info->name;
Axel Lin77fa44d2011-05-12 13:47:50 +08001160 pmic->desc[i].id = i;
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +05301161 pmic->desc[i].n_voltages = info->n_voltages;
Graeme Gregory518fb722011-05-02 16:20:08 -05001162
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001163 if (i == TPS65910_REG_VDD1 || i == TPS65910_REG_VDD2) {
Graeme Gregory518fb722011-05-02 16:20:08 -05001164 pmic->desc[i].ops = &tps65910_ops_dcdc;
Afzal Mohammed780dc9b2011-11-08 18:54:10 +05301165 pmic->desc[i].n_voltages = VDD1_2_NUM_VOLT_FINE *
1166 VDD1_2_NUM_VOLT_COARSE;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001167 } else if (i == TPS65910_REG_VDD3) {
1168 if (tps65910_chip_id(tps65910) == TPS65910)
1169 pmic->desc[i].ops = &tps65910_ops_vdd3;
1170 else
1171 pmic->desc[i].ops = &tps65910_ops_dcdc;
1172 } else {
1173 if (tps65910_chip_id(tps65910) == TPS65910)
1174 pmic->desc[i].ops = &tps65910_ops;
1175 else
1176 pmic->desc[i].ops = &tps65911_ops;
1177 }
Graeme Gregory518fb722011-05-02 16:20:08 -05001178
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +05301179 err = tps65910_set_ext_sleep_config(pmic, i,
1180 pmic_plat_data->regulator_ext_sleep_control[i]);
1181 /*
1182 * Failing on regulator for configuring externally control
1183 * is not a serious issue, just throw warning.
1184 */
1185 if (err < 0)
1186 dev_warn(tps65910->dev,
1187 "Failed to initialise ext control config\n");
1188
Graeme Gregory518fb722011-05-02 16:20:08 -05001189 pmic->desc[i].type = REGULATOR_VOLTAGE;
1190 pmic->desc[i].owner = THIS_MODULE;
1191
Mark Brownc1727082012-04-04 00:50:22 +01001192 config.dev = tps65910->dev;
1193 config.init_data = reg_data;
1194 config.driver_data = pmic;
1195
1196 rdev = regulator_register(&pmic->desc[i], &config);
Graeme Gregory518fb722011-05-02 16:20:08 -05001197 if (IS_ERR(rdev)) {
1198 dev_err(tps65910->dev,
1199 "failed to register %s regulator\n",
1200 pdev->name);
1201 err = PTR_ERR(rdev);
Axel Lin39aa9b62011-07-11 09:57:43 +08001202 goto err_unregister_regulator;
Graeme Gregory518fb722011-05-02 16:20:08 -05001203 }
1204
1205 /* Save regulator for cleanup */
1206 pmic->rdev[i] = rdev;
1207 }
1208 return 0;
1209
Axel Lin39aa9b62011-07-11 09:57:43 +08001210err_unregister_regulator:
Graeme Gregory518fb722011-05-02 16:20:08 -05001211 while (--i >= 0)
1212 regulator_unregister(pmic->rdev[i]);
Axel Lin39aa9b62011-07-11 09:57:43 +08001213 kfree(pmic->rdev);
1214err_free_info:
1215 kfree(pmic->info);
1216err_free_desc:
1217 kfree(pmic->desc);
Axel Lin9eb0c422012-04-11 14:40:18 +08001218err_out:
Graeme Gregory518fb722011-05-02 16:20:08 -05001219 return err;
1220}
1221
1222static int __devexit tps65910_remove(struct platform_device *pdev)
1223{
Axel Lin39aa9b62011-07-11 09:57:43 +08001224 struct tps65910_reg *pmic = platform_get_drvdata(pdev);
Graeme Gregory518fb722011-05-02 16:20:08 -05001225 int i;
1226
Axel Lin39aa9b62011-07-11 09:57:43 +08001227 for (i = 0; i < pmic->num_regulators; i++)
1228 regulator_unregister(pmic->rdev[i]);
Graeme Gregory518fb722011-05-02 16:20:08 -05001229
Axel Lin39aa9b62011-07-11 09:57:43 +08001230 kfree(pmic->rdev);
1231 kfree(pmic->info);
1232 kfree(pmic->desc);
Graeme Gregory518fb722011-05-02 16:20:08 -05001233 return 0;
1234}
1235
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +05301236static void tps65910_shutdown(struct platform_device *pdev)
1237{
1238 struct tps65910_reg *pmic = platform_get_drvdata(pdev);
1239 int i;
1240
1241 /*
1242 * Before bootloader jumps to kernel, it makes sure that required
1243 * external control signals are in desired state so that given rails
1244 * can be configure accordingly.
1245 * If rails are configured to be controlled from external control
1246 * then before shutting down/rebooting the system, the external
1247 * control configuration need to be remove from the rails so that
1248 * its output will be available as per register programming even
1249 * if external controls are removed. This is require when the POR
1250 * value of the control signals are not in active state and before
1251 * bootloader initializes it, the system requires the rail output
1252 * to be active for booting.
1253 */
1254 for (i = 0; i < pmic->num_regulators; i++) {
1255 int err;
1256 if (!pmic->rdev[i])
1257 continue;
1258
1259 err = tps65910_set_ext_sleep_config(pmic, i, 0);
1260 if (err < 0)
1261 dev_err(&pdev->dev,
1262 "Error in clearing external control\n");
1263 }
1264}
1265
Graeme Gregory518fb722011-05-02 16:20:08 -05001266static struct platform_driver tps65910_driver = {
1267 .driver = {
1268 .name = "tps65910-pmic",
1269 .owner = THIS_MODULE,
1270 },
1271 .probe = tps65910_probe,
1272 .remove = __devexit_p(tps65910_remove),
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +05301273 .shutdown = tps65910_shutdown,
Graeme Gregory518fb722011-05-02 16:20:08 -05001274};
1275
1276static int __init tps65910_init(void)
1277{
1278 return platform_driver_register(&tps65910_driver);
1279}
1280subsys_initcall(tps65910_init);
1281
1282static void __exit tps65910_cleanup(void)
1283{
1284 platform_driver_unregister(&tps65910_driver);
1285}
1286module_exit(tps65910_cleanup);
1287
1288MODULE_AUTHOR("Graeme Gregory <gg@slimlogic.co.uk>");
Axel Linae0e6542012-02-21 10:14:55 +08001289MODULE_DESCRIPTION("TPS65910/TPS65911 voltage regulator driver");
Graeme Gregory518fb722011-05-02 16:20:08 -05001290MODULE_LICENSE("GPL v2");
1291MODULE_ALIAS("platform:tps65910-pmic");