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review.shift-gmbh.com / SHIFTPHONES / kernel / common / 1cd55947f2bfdb99a2a741d65c7463d106ef9132 / . / arch / arm / boot / dts / imx7d-sdb.dts
blob: fdd1d7c9a5cc2608ac047f088f62e394d88db124 [file] [log] [blame]
Frank Li5db106b2015-05-19 02:45:05 +0800[diff] [blame]1/*
2 * Copyright (C) 2015 Freescale Semiconductor, Inc.
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
13 *
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * Or, alternatively,
20 *
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
28 * conditions:
29 *
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
41 */
42
43/dts-v1/;
44
45#include <dt-bindings/input/input.h>
46#include "imx7d.dtsi"
47
48/ {
49 model = "Freescale i.MX7 SabreSD Board";
50 compatible = "fsl,imx7d-sdb", "fsl,imx7d";
51
52 memory {
53 reg = <0x80000000 0x80000000>;
54 };
55
56 regulators {
57 compatible = "simple-bus";
58 #address-cells = <1>;
59 #size-cells = <0>;
60
61 reg_usb_otg1_vbus: regulator@0 {
62 compatible = "regulator-fixed";
63 reg = <0>;
64 regulator-name = "usb_otg1_vbus";
65 regulator-min-microvolt = <5000000>;
66 regulator-max-microvolt = <5000000>;
67 gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
68 enable-active-high;
69 };
70
71 reg_usb_otg2_vbus: regulator@1 {
72 compatible = "regulator-fixed";
73 reg = <1>;
74 regulator-name = "usb_otg2_vbus";
75 regulator-min-microvolt = <5000000>;
76 regulator-max-microvolt = <5000000>;
77 gpio = <&gpio4 7 GPIO_ACTIVE_HIGH>;
78 enable-active-high;
79 };
80
81 reg_can2_3v3: regulator@2 {
82 compatible = "regulator-fixed";
83 reg = <2>;
84 regulator-name = "can2-3v3";
85 regulator-min-microvolt = <3300000>;
86 regulator-max-microvolt = <3300000>;
87 gpio = <&gpio1 7 GPIO_ACTIVE_LOW>;
88 };
89
90 reg_vref_1v8: regulator@3 {
91 compatible = "regulator-fixed";
92 reg = <3>;
93 regulator-name = "vref-1v8";
94 regulator-min-microvolt = <1800000>;
95 regulator-max-microvolt = <1800000>;
96 };
97 };
98};
99
100&cpu0 {
101 arm-supply = <&sw1a_reg>;
102};
103
104&i2c1 {
105 pinctrl-names = "default";
106 pinctrl-0 = <&pinctrl_i2c1>;
107 status = "okay";
108
109 pmic: pfuze3000@08 {
110 compatible = "fsl,pfuze3000";
111 reg = <0x08>;
112
113 regulators {
114 sw1a_reg: sw1a {
115 regulator-min-microvolt = <700000>;
116 regulator-max-microvolt = <1475000>;
117 regulator-boot-on;
118 regulator-always-on;
119 regulator-ramp-delay = <6250>;
120 };
121
122 /* use sw1c_reg to align with pfuze100/pfuze200 */
123 sw1c_reg: sw1b {
124 regulator-min-microvolt = <700000>;
125 regulator-max-microvolt = <1475000>;
126 regulator-boot-on;
127 regulator-always-on;
128 regulator-ramp-delay = <6250>;
129 };
130
131 sw2_reg: sw2 {
132 regulator-min-microvolt = <1500000>;
133 regulator-max-microvolt = <1850000>;
134 regulator-boot-on;
135 regulator-always-on;
136 };
137
138 sw3a_reg: sw3 {
139 regulator-min-microvolt = <900000>;
140 regulator-max-microvolt = <1650000>;
141 regulator-boot-on;
142 regulator-always-on;
143 };
144
145 swbst_reg: swbst {
146 regulator-min-microvolt = <5000000>;
147 regulator-max-microvolt = <5150000>;
148 };
149
150 snvs_reg: vsnvs {
151 regulator-min-microvolt = <1000000>;
152 regulator-max-microvolt = <3000000>;
153 regulator-boot-on;
154 regulator-always-on;
155 };
156
157 vref_reg: vrefddr {
158 regulator-boot-on;
159 regulator-always-on;
160 };
161
162 vgen1_reg: vldo1 {
163 regulator-min-microvolt = <1800000>;
164 regulator-max-microvolt = <3300000>;
165 regulator-always-on;
166 };
167
168 vgen2_reg: vldo2 {
169 regulator-min-microvolt = <800000>;
170 regulator-max-microvolt = <1550000>;
171 };
172
173 vgen3_reg: vccsd {
174 regulator-min-microvolt = <2850000>;
175 regulator-max-microvolt = <3300000>;
176 regulator-always-on;
177 };
178
179 vgen4_reg: v33 {
180 regulator-min-microvolt = <2850000>;
181 regulator-max-microvolt = <3300000>;
182 regulator-always-on;
183 };
184
185 vgen5_reg: vldo3 {
186 regulator-min-microvolt = <1800000>;
187 regulator-max-microvolt = <3300000>;
188 regulator-always-on;
189 };
190
191 vgen6_reg: vldo4 {
192 regulator-min-microvolt = <1800000>;
193 regulator-max-microvolt = <3300000>;
194 regulator-always-on;
195 };
196 };
197 };
198};
199
200&i2c2 {
201 pinctrl-names = "default";
202 pinctrl-0 = <&pinctrl_i2c2>;
203 status = "okay";
204};
205
206&i2c3 {
207 pinctrl-names = "default";
208 pinctrl-0 = <&pinctrl_i2c3>;
209 status = "okay";
210};
211
212&i2c4 {
213 pinctrl-names = "default";
214 pinctrl-0 = <&pinctrl_i2c4>;
215 status = "okay";
216
217 codec: wm8960@1a {
218 compatible = "wlf,wm8960";
219 reg = <0x1a>;
220 clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>;
221 clock-names = "mclk";
222 wlf,shared-lrclk;
223 };
224};
225
226&uart1 {
227 pinctrl-names = "default";
228 pinctrl-0 = <&pinctrl_uart1>;
229 assigned-clocks = <&clks IMX7D_UART1_ROOT_SRC>;
230 assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
231 status = "okay";
232};
233
234&usdhc1 {
235 pinctrl-names = "default";
236 pinctrl-0 = <&pinctrl_usdhc1>;
Dong Aisheng1cd55942015-07-22 20:53:04 +0800[diff] [blame^]237 cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
238 wp-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
Frank Li5db106b2015-05-19 02:45:05 +0800[diff] [blame]239 enable-sdio-wakeup;
240 keep-power-in-suspend;
241 status = "okay";
242};
243
244&iomuxc {
245 pinctrl-names = "default";
246 pinctrl-0 = <&pinctrl_hog>;
247
248 imx7d-sdb {
249 pinctrl_hog: hoggrp {
250 fsl,pins = <
251 MX7D_PAD_UART3_CTS_B__GPIO4_IO7 0x14
252 MX7D_PAD_ECSPI2_SS0__GPIO4_IO23 0x34 /* bt reg on */
253 >;
254 };
255
256 pinctrl_i2c1: i2c1grp {
257 fsl,pins = <
258 MX7D_PAD_I2C1_SDA__I2C1_SDA 0x4000007f
259 MX7D_PAD_I2C1_SCL__I2C1_SCL 0x4000007f
260 >;
261 };
262
263 pinctrl_i2c2: i2c2grp {
264 fsl,pins = <
265 MX7D_PAD_I2C2_SDA__I2C2_SDA 0x4000007f
266 MX7D_PAD_I2C2_SCL__I2C2_SCL 0x4000007f
267 >;
268 };
269
270 pinctrl_i2c3: i2c3grp {
271 fsl,pins = <
272 MX7D_PAD_I2C3_SDA__I2C3_SDA 0x4000007f
273 MX7D_PAD_I2C3_SCL__I2C3_SCL 0x4000007f
274 >;
275 };
276
277 pinctrl_i2c4: i2c4grp {
278 fsl,pins = <
279 MX7D_PAD_SAI1_RX_BCLK__I2C4_SDA 0x4000007f
280 MX7D_PAD_SAI1_RX_SYNC__I2C4_SCL 0x4000007f
281 >;
282 };
283
284
285 pinctrl_uart1: uart1grp {
286 fsl,pins = <
287 MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX 0x79
288 MX7D_PAD_UART1_RX_DATA__UART1_DCE_RX 0x79
289 >;
290 };
291
292 pinctrl_uart5: uart5grp {
293 fsl,pins = <
294 MX7D_PAD_SAI1_TX_BCLK__UART5_DCE_TX 0x79
295 MX7D_PAD_SAI1_RX_DATA__UART5_DCE_RX 0x79
296 MX7D_PAD_SAI1_TX_SYNC__UART5_DCE_CTS 0x79
297 MX7D_PAD_SAI1_TX_DATA__UART5_DCE_RTS 0x79
298 >;
299 };
300
301 pinctrl_uart6: uart6grp {
302 fsl,pins = <
303 MX7D_PAD_ECSPI1_MOSI__UART6_DCE_TX 0x79
304 MX7D_PAD_ECSPI1_SCLK__UART6_DCE_RX 0x79
305 MX7D_PAD_ECSPI1_SS0__UART6_DCE_CTS 0x79
306 MX7D_PAD_ECSPI1_MISO__UART6_DCE_RTS 0x79
307 >;
308 };
309
310 pinctrl_usdhc1: usdhc1grp {
311 fsl,pins = <
312 MX7D_PAD_SD1_CMD__SD1_CMD 0x59
313 MX7D_PAD_SD1_CLK__SD1_CLK 0x19
314 MX7D_PAD_SD1_DATA0__SD1_DATA0 0x59
315 MX7D_PAD_SD1_DATA1__SD1_DATA1 0x59
316 MX7D_PAD_SD1_DATA2__SD1_DATA2 0x59
317 MX7D_PAD_SD1_DATA3__SD1_DATA3 0x59
318 MX7D_PAD_SD1_CD_B__GPIO5_IO0 0x59 /* CD */
319 MX7D_PAD_SD1_WP__GPIO5_IO1 0x59 /* WP */
320 MX7D_PAD_SD1_RESET_B__GPIO5_IO2 0x59 /* vmmc */
321 >;
322 };
323
324 pinctrl_usdhc2: usdhc2grp {
325 fsl,pins = <
326 MX7D_PAD_SD2_CMD__SD2_CMD 0x59
327 MX7D_PAD_SD2_CLK__SD2_CLK 0x19
328 MX7D_PAD_SD2_DATA0__SD2_DATA0 0x59
329 MX7D_PAD_SD2_DATA1__SD2_DATA1 0x59
330 MX7D_PAD_SD2_DATA2__SD2_DATA2 0x59
331 MX7D_PAD_SD2_DATA3__SD2_DATA3 0x59
332 MX7D_PAD_ECSPI2_MOSI__GPIO4_IO21 0x59 /* WL_REG_ON */
333 >;
334 };
335
336 pinctrl_usdhc2_100mhz: usdhc2grp_100mhz {
337 fsl,pins = <
338 MX7D_PAD_SD2_CMD__SD2_CMD 0x5a
339 MX7D_PAD_SD2_CLK__SD2_CLK 0x1a
340 MX7D_PAD_SD2_DATA0__SD2_DATA0 0x5a
341 MX7D_PAD_SD2_DATA1__SD2_DATA1 0x5a
342 MX7D_PAD_SD2_DATA2__SD2_DATA2 0x5a
343 MX7D_PAD_SD2_DATA3__SD2_DATA3 0x5a
344 >;
345 };
346
347 pinctrl_usdhc2_200mhz: usdhc2grp_200mhz {
348 fsl,pins = <
349 MX7D_PAD_SD2_CMD__SD2_CMD 0x5b
350 MX7D_PAD_SD2_CLK__SD2_CLK 0x1b
351 MX7D_PAD_SD2_DATA0__SD2_DATA0 0x5b
352 MX7D_PAD_SD2_DATA1__SD2_DATA1 0x5b
353 MX7D_PAD_SD2_DATA2__SD2_DATA2 0x5b
354 MX7D_PAD_SD2_DATA3__SD2_DATA3 0x5b
355 >;
356 };
357
358
359 pinctrl_usdhc3: usdhc3grp {
360 fsl,pins = <
361 MX7D_PAD_SD3_CMD__SD3_CMD 0x59
362 MX7D_PAD_SD3_CLK__SD3_CLK 0x19
363 MX7D_PAD_SD3_DATA0__SD3_DATA0 0x59
364 MX7D_PAD_SD3_DATA1__SD3_DATA1 0x59
365 MX7D_PAD_SD3_DATA2__SD3_DATA2 0x59
366 MX7D_PAD_SD3_DATA3__SD3_DATA3 0x59
367 MX7D_PAD_SD3_DATA4__SD3_DATA4 0x59
368 MX7D_PAD_SD3_DATA5__SD3_DATA5 0x59
369 MX7D_PAD_SD3_DATA6__SD3_DATA6 0x59
370 MX7D_PAD_SD3_DATA7__SD3_DATA7 0x59
371 MX7D_PAD_SD3_STROBE__SD3_STROBE 0x19
372 >;
373 };
374
375 pinctrl_usdhc3_100mhz: usdhc3grp_100mhz {
376 fsl,pins = <
377 MX7D_PAD_SD3_CMD__SD3_CMD 0x5a
378 MX7D_PAD_SD3_CLK__SD3_CLK 0x1a
379 MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5a
380 MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5a
381 MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5a
382 MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5a
383 MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5a
384 MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5a
385 MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5a
386 MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5a
387 MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1a
388 >;
389 };
390
391 pinctrl_usdhc3_200mhz: usdhc3grp_200mhz {
392 fsl,pins = <
393 MX7D_PAD_SD3_CMD__SD3_CMD 0x5b
394 MX7D_PAD_SD3_CLK__SD3_CLK 0x1b
395 MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5b
396 MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5b
397 MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5b
398 MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5b
399 MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5b
400 MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5b
401 MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5b
402 MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5b
403 MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1b
404 >;
405 };
406
407 };
408};