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Arun Kumar K2eae6132012-10-23 22:51:33 +09001* Samsung Multi Format Codec (MFC)
2
3Multi Format Codec (MFC) is the IP present in Samsung SoCs which
4supports high resolution decoding and encoding functionalities.
5The MFC device driver is a v4l2 driver which can encode/decode
6video raw/elementary streams and has support for all popular
7video codecs.
8
9Required properties:
10 - compatible : value should be either one among the following
11 (a) "samsung,mfc-v5" for MFC v5 present in Exynos4 SoCs
12 (b) "samsung,mfc-v6" for MFC v6 present in Exynos5 SoCs
13
14 - reg : Physical base address of the IP registers and length of memory
15 mapped region.
16
17 - interrupts : MFC interrupt number to the CPU.
Sachin Kamatdc3c8352013-04-10 19:01:51 +090018 - clocks : from common clock binding: handle to mfc clocks.
19 - clock-names : from common clock binding: must contain "sclk_mfc" and "mfc",
20 corresponding to entries in the clocks property.
Arun Kumar K2eae6132012-10-23 22:51:33 +090021
22 - samsung,mfc-r : Base address of the first memory bank used by MFC
23 for DMA contiguous memory allocation and its size.
24
25 - samsung,mfc-l : Base address of the second memory bank used by MFC
26 for DMA contiguous memory allocation and its size.
Sachin Kamat43afcba2013-02-08 13:56:06 -080027
28Optional properties:
29 - samsung,power-domain : power-domain property defined with a phandle
30 to respective power domain.
31
32Example:
33SoC specific DT entry:
34
35mfc: codec@13400000 {
36 compatible = "samsung,mfc-v5";
37 reg = <0x13400000 0x10000>;
38 interrupts = <0 94 0>;
39 samsung,power-domain = <&pd_mfc>;
Sachin Kamatdc3c8352013-04-10 19:01:51 +090040 clocks = <&clock 170>, <&clock 273>;
41 clock-names = "sclk_mfc", "mfc";
Sachin Kamat43afcba2013-02-08 13:56:06 -080042};
43
44Board specific DT entry:
45
46codec@13400000 {
47 samsung,mfc-r = <0x43000000 0x800000>;
48 samsung,mfc-l = <0x51000000 0x800000>;
49};