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Carlo Caionecfb61a42014-05-01 14:29:27 +02001/*
Chen-Yu Tsai4fd41152016-02-12 10:02:42 +08002 * MFD core driver for the X-Powers' Power Management ICs
Carlo Caionecfb61a42014-05-01 14:29:27 +02003 *
Jacob Panaf7e9062014-10-06 21:17:14 -07004 * AXP20x typically comprises an adaptive USB-Compatible PWM charger, BUCK DC-DC
5 * converters, LDOs, multiple 12-bit ADCs of voltage, current and temperature
6 * as well as configurable GPIOs.
Carlo Caionecfb61a42014-05-01 14:29:27 +02007 *
Chen-Yu Tsai4fd41152016-02-12 10:02:42 +08008 * This file contains the interface independent core functions.
9 *
Chen-Yu Tsaie7402352016-02-12 10:02:41 +080010 * Copyright (C) 2014 Carlo Caione
11 *
Carlo Caionecfb61a42014-05-01 14:29:27 +020012 * Author: Carlo Caione <carlo@caione.org>
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License version 2 as
16 * published by the Free Software Foundation.
17 */
18
19#include <linux/err.h>
Hans de Goede179dc632016-06-05 15:50:48 +020020#include <linux/delay.h>
Carlo Caionecfb61a42014-05-01 14:29:27 +020021#include <linux/interrupt.h>
22#include <linux/kernel.h>
23#include <linux/module.h>
24#include <linux/pm_runtime.h>
25#include <linux/regmap.h>
Carlo Caionecfb61a42014-05-01 14:29:27 +020026#include <linux/regulator/consumer.h>
27#include <linux/mfd/axp20x.h>
28#include <linux/mfd/core.h>
29#include <linux/of_device.h>
Jacob Panaf7e9062014-10-06 21:17:14 -070030#include <linux/acpi.h>
Carlo Caionecfb61a42014-05-01 14:29:27 +020031
32#define AXP20X_OFF 0x80
33
Krzysztof Kozlowskic31e8582015-03-24 11:21:17 +010034static const char * const axp20x_model_names[] = {
Michal Suchanekd8d79f82015-07-11 14:59:56 +020035 "AXP152",
Jacob Panaf7e9062014-10-06 21:17:14 -070036 "AXP202",
37 "AXP209",
Boris BREZILLONf05be582015-04-10 12:09:01 +080038 "AXP221",
Chen-Yu Tsai02071f02016-02-12 10:02:44 +080039 "AXP223",
Jacob Panaf7e9062014-10-06 21:17:14 -070040 "AXP288",
Chen-Yu Tsai20147f02016-03-29 17:22:26 +080041 "AXP809",
Jacob Panaf7e9062014-10-06 21:17:14 -070042};
43
Michal Suchanekd8d79f82015-07-11 14:59:56 +020044static const struct regmap_range axp152_writeable_ranges[] = {
45 regmap_reg_range(AXP152_LDO3456_DC1234_CTRL, AXP152_IRQ3_STATE),
46 regmap_reg_range(AXP152_DCDC_MODE, AXP152_PWM1_DUTY_CYCLE),
47};
48
49static const struct regmap_range axp152_volatile_ranges[] = {
50 regmap_reg_range(AXP152_PWR_OP_MODE, AXP152_PWR_OP_MODE),
51 regmap_reg_range(AXP152_IRQ1_EN, AXP152_IRQ3_STATE),
52 regmap_reg_range(AXP152_GPIO_INPUT, AXP152_GPIO_INPUT),
53};
54
55static const struct regmap_access_table axp152_writeable_table = {
56 .yes_ranges = axp152_writeable_ranges,
57 .n_yes_ranges = ARRAY_SIZE(axp152_writeable_ranges),
58};
59
60static const struct regmap_access_table axp152_volatile_table = {
61 .yes_ranges = axp152_volatile_ranges,
62 .n_yes_ranges = ARRAY_SIZE(axp152_volatile_ranges),
63};
64
Carlo Caionecfb61a42014-05-01 14:29:27 +020065static const struct regmap_range axp20x_writeable_ranges[] = {
66 regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ5_STATE),
67 regmap_reg_range(AXP20X_DCDC_MODE, AXP20X_FG_RES),
Bruno Prémont553ed4b2015-08-08 17:58:40 +020068 regmap_reg_range(AXP20X_RDC_H, AXP20X_OCV(AXP20X_OCV_MAX)),
Carlo Caionecfb61a42014-05-01 14:29:27 +020069};
70
71static const struct regmap_range axp20x_volatile_ranges[] = {
Bruno Prémont553ed4b2015-08-08 17:58:40 +020072 regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP20X_USB_OTG_STATUS),
73 regmap_reg_range(AXP20X_CHRG_CTRL1, AXP20X_CHRG_CTRL2),
Carlo Caionecfb61a42014-05-01 14:29:27 +020074 regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ5_STATE),
Bruno Prémont553ed4b2015-08-08 17:58:40 +020075 regmap_reg_range(AXP20X_ACIN_V_ADC_H, AXP20X_IPSOUT_V_HIGH_L),
76 regmap_reg_range(AXP20X_GPIO20_SS, AXP20X_GPIO3_CTRL),
77 regmap_reg_range(AXP20X_FG_RES, AXP20X_RDC_L),
Carlo Caionecfb61a42014-05-01 14:29:27 +020078};
79
80static const struct regmap_access_table axp20x_writeable_table = {
81 .yes_ranges = axp20x_writeable_ranges,
82 .n_yes_ranges = ARRAY_SIZE(axp20x_writeable_ranges),
83};
84
85static const struct regmap_access_table axp20x_volatile_table = {
86 .yes_ranges = axp20x_volatile_ranges,
87 .n_yes_ranges = ARRAY_SIZE(axp20x_volatile_ranges),
88};
89
Chen-Yu Tsai20147f02016-03-29 17:22:26 +080090/* AXP22x ranges are shared with the AXP809, as they cover the same range */
Boris BREZILLONf05be582015-04-10 12:09:01 +080091static const struct regmap_range axp22x_writeable_ranges[] = {
92 regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ5_STATE),
93 regmap_reg_range(AXP20X_DCDC_MODE, AXP22X_BATLOW_THRES1),
94};
95
96static const struct regmap_range axp22x_volatile_ranges[] = {
Hans de Goede15093252016-05-14 19:51:28 +020097 regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP20X_PWR_OP_MODE),
Boris BREZILLONf05be582015-04-10 12:09:01 +080098 regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ5_STATE),
Hans de Goede15093252016-05-14 19:51:28 +020099 regmap_reg_range(AXP22X_GPIO_STATE, AXP22X_GPIO_STATE),
100 regmap_reg_range(AXP20X_FG_RES, AXP20X_FG_RES),
Boris BREZILLONf05be582015-04-10 12:09:01 +0800101};
102
103static const struct regmap_access_table axp22x_writeable_table = {
104 .yes_ranges = axp22x_writeable_ranges,
105 .n_yes_ranges = ARRAY_SIZE(axp22x_writeable_ranges),
106};
107
108static const struct regmap_access_table axp22x_volatile_table = {
109 .yes_ranges = axp22x_volatile_ranges,
110 .n_yes_ranges = ARRAY_SIZE(axp22x_volatile_ranges),
111};
112
Jacob Panaf7e9062014-10-06 21:17:14 -0700113static const struct regmap_range axp288_writeable_ranges[] = {
114 regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ6_STATE),
115 regmap_reg_range(AXP20X_DCDC_MODE, AXP288_FG_TUNE5),
116};
117
118static const struct regmap_range axp288_volatile_ranges[] = {
119 regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IPSOUT_V_HIGH_L),
120};
121
122static const struct regmap_access_table axp288_writeable_table = {
123 .yes_ranges = axp288_writeable_ranges,
124 .n_yes_ranges = ARRAY_SIZE(axp288_writeable_ranges),
125};
126
127static const struct regmap_access_table axp288_volatile_table = {
128 .yes_ranges = axp288_volatile_ranges,
129 .n_yes_ranges = ARRAY_SIZE(axp288_volatile_ranges),
130};
131
Michal Suchanekd8d79f82015-07-11 14:59:56 +0200132static struct resource axp152_pek_resources[] = {
133 DEFINE_RES_IRQ_NAMED(AXP152_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
134 DEFINE_RES_IRQ_NAMED(AXP152_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
135};
136
Michael Haascd7cf272016-05-06 07:19:49 +0200137static struct resource axp20x_ac_power_supply_resources[] = {
138 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_PLUGIN, "ACIN_PLUGIN"),
139 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_REMOVAL, "ACIN_REMOVAL"),
140 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_OVER_V, "ACIN_OVER_V"),
141};
142
Carlo Caionecfb61a42014-05-01 14:29:27 +0200143static struct resource axp20x_pek_resources[] = {
144 {
145 .name = "PEK_DBR",
146 .start = AXP20X_IRQ_PEK_RIS_EDGE,
147 .end = AXP20X_IRQ_PEK_RIS_EDGE,
148 .flags = IORESOURCE_IRQ,
149 }, {
150 .name = "PEK_DBF",
151 .start = AXP20X_IRQ_PEK_FAL_EDGE,
152 .end = AXP20X_IRQ_PEK_FAL_EDGE,
153 .flags = IORESOURCE_IRQ,
154 },
155};
156
Hans de Goede8de4efd2015-08-08 17:58:41 +0200157static struct resource axp20x_usb_power_supply_resources[] = {
158 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"),
159 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"),
160 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_VALID, "VBUS_VALID"),
161 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_NOT_VALID, "VBUS_NOT_VALID"),
162};
163
Boris BREZILLONf05be582015-04-10 12:09:01 +0800164static struct resource axp22x_pek_resources[] = {
165 {
166 .name = "PEK_DBR",
167 .start = AXP22X_IRQ_PEK_RIS_EDGE,
168 .end = AXP22X_IRQ_PEK_RIS_EDGE,
169 .flags = IORESOURCE_IRQ,
170 }, {
171 .name = "PEK_DBF",
172 .start = AXP22X_IRQ_PEK_FAL_EDGE,
173 .end = AXP22X_IRQ_PEK_FAL_EDGE,
174 .flags = IORESOURCE_IRQ,
175 },
176};
177
Borun Fue56e5ad2015-10-14 16:16:26 +0800178static struct resource axp288_power_button_resources[] = {
179 {
180 .name = "PEK_DBR",
181 .start = AXP288_IRQ_POKN,
182 .end = AXP288_IRQ_POKN,
183 .flags = IORESOURCE_IRQ,
184 },
185 {
186 .name = "PEK_DBF",
187 .start = AXP288_IRQ_POKP,
188 .end = AXP288_IRQ_POKP,
189 .flags = IORESOURCE_IRQ,
190 },
191};
192
Todd Brandtd63878742015-02-02 15:41:41 -0800193static struct resource axp288_fuel_gauge_resources[] = {
Jacob Panaf7e9062014-10-06 21:17:14 -0700194 {
195 .start = AXP288_IRQ_QWBTU,
196 .end = AXP288_IRQ_QWBTU,
197 .flags = IORESOURCE_IRQ,
198 },
199 {
200 .start = AXP288_IRQ_WBTU,
201 .end = AXP288_IRQ_WBTU,
202 .flags = IORESOURCE_IRQ,
203 },
204 {
205 .start = AXP288_IRQ_QWBTO,
206 .end = AXP288_IRQ_QWBTO,
207 .flags = IORESOURCE_IRQ,
208 },
209 {
210 .start = AXP288_IRQ_WBTO,
211 .end = AXP288_IRQ_WBTO,
212 .flags = IORESOURCE_IRQ,
213 },
214 {
215 .start = AXP288_IRQ_WL2,
216 .end = AXP288_IRQ_WL2,
217 .flags = IORESOURCE_IRQ,
218 },
219 {
220 .start = AXP288_IRQ_WL1,
221 .end = AXP288_IRQ_WL1,
222 .flags = IORESOURCE_IRQ,
223 },
224};
225
Chen-Yu Tsai20147f02016-03-29 17:22:26 +0800226static struct resource axp809_pek_resources[] = {
227 {
228 .name = "PEK_DBR",
229 .start = AXP809_IRQ_PEK_RIS_EDGE,
230 .end = AXP809_IRQ_PEK_RIS_EDGE,
231 .flags = IORESOURCE_IRQ,
232 }, {
233 .name = "PEK_DBF",
234 .start = AXP809_IRQ_PEK_FAL_EDGE,
235 .end = AXP809_IRQ_PEK_FAL_EDGE,
236 .flags = IORESOURCE_IRQ,
237 },
238};
239
Michal Suchanekd8d79f82015-07-11 14:59:56 +0200240static const struct regmap_config axp152_regmap_config = {
241 .reg_bits = 8,
242 .val_bits = 8,
243 .wr_table = &axp152_writeable_table,
244 .volatile_table = &axp152_volatile_table,
245 .max_register = AXP152_PWM1_DUTY_CYCLE,
246 .cache_type = REGCACHE_RBTREE,
247};
248
Carlo Caionecfb61a42014-05-01 14:29:27 +0200249static const struct regmap_config axp20x_regmap_config = {
250 .reg_bits = 8,
251 .val_bits = 8,
252 .wr_table = &axp20x_writeable_table,
253 .volatile_table = &axp20x_volatile_table,
Bruno Prémont553ed4b2015-08-08 17:58:40 +0200254 .max_register = AXP20X_OCV(AXP20X_OCV_MAX),
Carlo Caionecfb61a42014-05-01 14:29:27 +0200255 .cache_type = REGCACHE_RBTREE,
256};
257
Boris BREZILLONf05be582015-04-10 12:09:01 +0800258static const struct regmap_config axp22x_regmap_config = {
259 .reg_bits = 8,
260 .val_bits = 8,
261 .wr_table = &axp22x_writeable_table,
262 .volatile_table = &axp22x_volatile_table,
263 .max_register = AXP22X_BATLOW_THRES1,
264 .cache_type = REGCACHE_RBTREE,
265};
266
Jacob Panaf7e9062014-10-06 21:17:14 -0700267static const struct regmap_config axp288_regmap_config = {
268 .reg_bits = 8,
269 .val_bits = 8,
270 .wr_table = &axp288_writeable_table,
271 .volatile_table = &axp288_volatile_table,
272 .max_register = AXP288_FG_TUNE5,
273 .cache_type = REGCACHE_RBTREE,
274};
275
276#define INIT_REGMAP_IRQ(_variant, _irq, _off, _mask) \
277 [_variant##_IRQ_##_irq] = { .reg_offset = (_off), .mask = BIT(_mask) }
Carlo Caionecfb61a42014-05-01 14:29:27 +0200278
Michal Suchanekd8d79f82015-07-11 14:59:56 +0200279static const struct regmap_irq axp152_regmap_irqs[] = {
280 INIT_REGMAP_IRQ(AXP152, LDO0IN_CONNECT, 0, 6),
281 INIT_REGMAP_IRQ(AXP152, LDO0IN_REMOVAL, 0, 5),
282 INIT_REGMAP_IRQ(AXP152, ALDO0IN_CONNECT, 0, 3),
283 INIT_REGMAP_IRQ(AXP152, ALDO0IN_REMOVAL, 0, 2),
284 INIT_REGMAP_IRQ(AXP152, DCDC1_V_LOW, 1, 5),
285 INIT_REGMAP_IRQ(AXP152, DCDC2_V_LOW, 1, 4),
286 INIT_REGMAP_IRQ(AXP152, DCDC3_V_LOW, 1, 3),
287 INIT_REGMAP_IRQ(AXP152, DCDC4_V_LOW, 1, 2),
288 INIT_REGMAP_IRQ(AXP152, PEK_SHORT, 1, 1),
289 INIT_REGMAP_IRQ(AXP152, PEK_LONG, 1, 0),
290 INIT_REGMAP_IRQ(AXP152, TIMER, 2, 7),
291 INIT_REGMAP_IRQ(AXP152, PEK_RIS_EDGE, 2, 6),
292 INIT_REGMAP_IRQ(AXP152, PEK_FAL_EDGE, 2, 5),
293 INIT_REGMAP_IRQ(AXP152, GPIO3_INPUT, 2, 3),
294 INIT_REGMAP_IRQ(AXP152, GPIO2_INPUT, 2, 2),
295 INIT_REGMAP_IRQ(AXP152, GPIO1_INPUT, 2, 1),
296 INIT_REGMAP_IRQ(AXP152, GPIO0_INPUT, 2, 0),
297};
298
Carlo Caionecfb61a42014-05-01 14:29:27 +0200299static const struct regmap_irq axp20x_regmap_irqs[] = {
Jacob Panaf7e9062014-10-06 21:17:14 -0700300 INIT_REGMAP_IRQ(AXP20X, ACIN_OVER_V, 0, 7),
301 INIT_REGMAP_IRQ(AXP20X, ACIN_PLUGIN, 0, 6),
302 INIT_REGMAP_IRQ(AXP20X, ACIN_REMOVAL, 0, 5),
303 INIT_REGMAP_IRQ(AXP20X, VBUS_OVER_V, 0, 4),
304 INIT_REGMAP_IRQ(AXP20X, VBUS_PLUGIN, 0, 3),
305 INIT_REGMAP_IRQ(AXP20X, VBUS_REMOVAL, 0, 2),
306 INIT_REGMAP_IRQ(AXP20X, VBUS_V_LOW, 0, 1),
307 INIT_REGMAP_IRQ(AXP20X, BATT_PLUGIN, 1, 7),
308 INIT_REGMAP_IRQ(AXP20X, BATT_REMOVAL, 1, 6),
309 INIT_REGMAP_IRQ(AXP20X, BATT_ENT_ACT_MODE, 1, 5),
310 INIT_REGMAP_IRQ(AXP20X, BATT_EXIT_ACT_MODE, 1, 4),
311 INIT_REGMAP_IRQ(AXP20X, CHARG, 1, 3),
312 INIT_REGMAP_IRQ(AXP20X, CHARG_DONE, 1, 2),
313 INIT_REGMAP_IRQ(AXP20X, BATT_TEMP_HIGH, 1, 1),
314 INIT_REGMAP_IRQ(AXP20X, BATT_TEMP_LOW, 1, 0),
315 INIT_REGMAP_IRQ(AXP20X, DIE_TEMP_HIGH, 2, 7),
316 INIT_REGMAP_IRQ(AXP20X, CHARG_I_LOW, 2, 6),
317 INIT_REGMAP_IRQ(AXP20X, DCDC1_V_LONG, 2, 5),
318 INIT_REGMAP_IRQ(AXP20X, DCDC2_V_LONG, 2, 4),
319 INIT_REGMAP_IRQ(AXP20X, DCDC3_V_LONG, 2, 3),
320 INIT_REGMAP_IRQ(AXP20X, PEK_SHORT, 2, 1),
321 INIT_REGMAP_IRQ(AXP20X, PEK_LONG, 2, 0),
322 INIT_REGMAP_IRQ(AXP20X, N_OE_PWR_ON, 3, 7),
323 INIT_REGMAP_IRQ(AXP20X, N_OE_PWR_OFF, 3, 6),
324 INIT_REGMAP_IRQ(AXP20X, VBUS_VALID, 3, 5),
325 INIT_REGMAP_IRQ(AXP20X, VBUS_NOT_VALID, 3, 4),
326 INIT_REGMAP_IRQ(AXP20X, VBUS_SESS_VALID, 3, 3),
327 INIT_REGMAP_IRQ(AXP20X, VBUS_SESS_END, 3, 2),
328 INIT_REGMAP_IRQ(AXP20X, LOW_PWR_LVL1, 3, 1),
329 INIT_REGMAP_IRQ(AXP20X, LOW_PWR_LVL2, 3, 0),
330 INIT_REGMAP_IRQ(AXP20X, TIMER, 4, 7),
331 INIT_REGMAP_IRQ(AXP20X, PEK_RIS_EDGE, 4, 6),
332 INIT_REGMAP_IRQ(AXP20X, PEK_FAL_EDGE, 4, 5),
333 INIT_REGMAP_IRQ(AXP20X, GPIO3_INPUT, 4, 3),
334 INIT_REGMAP_IRQ(AXP20X, GPIO2_INPUT, 4, 2),
335 INIT_REGMAP_IRQ(AXP20X, GPIO1_INPUT, 4, 1),
336 INIT_REGMAP_IRQ(AXP20X, GPIO0_INPUT, 4, 0),
337};
338
Boris BREZILLONf05be582015-04-10 12:09:01 +0800339static const struct regmap_irq axp22x_regmap_irqs[] = {
340 INIT_REGMAP_IRQ(AXP22X, ACIN_OVER_V, 0, 7),
341 INIT_REGMAP_IRQ(AXP22X, ACIN_PLUGIN, 0, 6),
342 INIT_REGMAP_IRQ(AXP22X, ACIN_REMOVAL, 0, 5),
343 INIT_REGMAP_IRQ(AXP22X, VBUS_OVER_V, 0, 4),
344 INIT_REGMAP_IRQ(AXP22X, VBUS_PLUGIN, 0, 3),
345 INIT_REGMAP_IRQ(AXP22X, VBUS_REMOVAL, 0, 2),
346 INIT_REGMAP_IRQ(AXP22X, VBUS_V_LOW, 0, 1),
347 INIT_REGMAP_IRQ(AXP22X, BATT_PLUGIN, 1, 7),
348 INIT_REGMAP_IRQ(AXP22X, BATT_REMOVAL, 1, 6),
349 INIT_REGMAP_IRQ(AXP22X, BATT_ENT_ACT_MODE, 1, 5),
350 INIT_REGMAP_IRQ(AXP22X, BATT_EXIT_ACT_MODE, 1, 4),
351 INIT_REGMAP_IRQ(AXP22X, CHARG, 1, 3),
352 INIT_REGMAP_IRQ(AXP22X, CHARG_DONE, 1, 2),
353 INIT_REGMAP_IRQ(AXP22X, BATT_TEMP_HIGH, 1, 1),
354 INIT_REGMAP_IRQ(AXP22X, BATT_TEMP_LOW, 1, 0),
355 INIT_REGMAP_IRQ(AXP22X, DIE_TEMP_HIGH, 2, 7),
356 INIT_REGMAP_IRQ(AXP22X, PEK_SHORT, 2, 1),
357 INIT_REGMAP_IRQ(AXP22X, PEK_LONG, 2, 0),
358 INIT_REGMAP_IRQ(AXP22X, LOW_PWR_LVL1, 3, 1),
359 INIT_REGMAP_IRQ(AXP22X, LOW_PWR_LVL2, 3, 0),
360 INIT_REGMAP_IRQ(AXP22X, TIMER, 4, 7),
361 INIT_REGMAP_IRQ(AXP22X, PEK_RIS_EDGE, 4, 6),
362 INIT_REGMAP_IRQ(AXP22X, PEK_FAL_EDGE, 4, 5),
363 INIT_REGMAP_IRQ(AXP22X, GPIO1_INPUT, 4, 1),
364 INIT_REGMAP_IRQ(AXP22X, GPIO0_INPUT, 4, 0),
365};
366
Jacob Panaf7e9062014-10-06 21:17:14 -0700367/* some IRQs are compatible with axp20x models */
368static const struct regmap_irq axp288_regmap_irqs[] = {
Jacob Panff3bbc52014-11-11 11:30:09 -0800369 INIT_REGMAP_IRQ(AXP288, VBUS_FALL, 0, 2),
370 INIT_REGMAP_IRQ(AXP288, VBUS_RISE, 0, 3),
371 INIT_REGMAP_IRQ(AXP288, OV, 0, 4),
Jacob Panaf7e9062014-10-06 21:17:14 -0700372
Jacob Panff3bbc52014-11-11 11:30:09 -0800373 INIT_REGMAP_IRQ(AXP288, DONE, 1, 2),
374 INIT_REGMAP_IRQ(AXP288, CHARGING, 1, 3),
Jacob Panaf7e9062014-10-06 21:17:14 -0700375 INIT_REGMAP_IRQ(AXP288, SAFE_QUIT, 1, 4),
376 INIT_REGMAP_IRQ(AXP288, SAFE_ENTER, 1, 5),
Jacob Panff3bbc52014-11-11 11:30:09 -0800377 INIT_REGMAP_IRQ(AXP288, ABSENT, 1, 6),
378 INIT_REGMAP_IRQ(AXP288, APPEND, 1, 7),
Jacob Panaf7e9062014-10-06 21:17:14 -0700379
380 INIT_REGMAP_IRQ(AXP288, QWBTU, 2, 0),
381 INIT_REGMAP_IRQ(AXP288, WBTU, 2, 1),
382 INIT_REGMAP_IRQ(AXP288, QWBTO, 2, 2),
Jacob Panff3bbc52014-11-11 11:30:09 -0800383 INIT_REGMAP_IRQ(AXP288, WBTO, 2, 3),
Jacob Panaf7e9062014-10-06 21:17:14 -0700384 INIT_REGMAP_IRQ(AXP288, QCBTU, 2, 4),
385 INIT_REGMAP_IRQ(AXP288, CBTU, 2, 5),
386 INIT_REGMAP_IRQ(AXP288, QCBTO, 2, 6),
387 INIT_REGMAP_IRQ(AXP288, CBTO, 2, 7),
388
389 INIT_REGMAP_IRQ(AXP288, WL2, 3, 0),
390 INIT_REGMAP_IRQ(AXP288, WL1, 3, 1),
391 INIT_REGMAP_IRQ(AXP288, GPADC, 3, 2),
392 INIT_REGMAP_IRQ(AXP288, OT, 3, 7),
393
394 INIT_REGMAP_IRQ(AXP288, GPIO0, 4, 0),
395 INIT_REGMAP_IRQ(AXP288, GPIO1, 4, 1),
396 INIT_REGMAP_IRQ(AXP288, POKO, 4, 2),
397 INIT_REGMAP_IRQ(AXP288, POKL, 4, 3),
398 INIT_REGMAP_IRQ(AXP288, POKS, 4, 4),
399 INIT_REGMAP_IRQ(AXP288, POKN, 4, 5),
400 INIT_REGMAP_IRQ(AXP288, POKP, 4, 6),
Jacob Panff3bbc52014-11-11 11:30:09 -0800401 INIT_REGMAP_IRQ(AXP288, TIMER, 4, 7),
Jacob Panaf7e9062014-10-06 21:17:14 -0700402
403 INIT_REGMAP_IRQ(AXP288, MV_CHNG, 5, 0),
404 INIT_REGMAP_IRQ(AXP288, BC_USB_CHNG, 5, 1),
Carlo Caionecfb61a42014-05-01 14:29:27 +0200405};
406
Chen-Yu Tsai20147f02016-03-29 17:22:26 +0800407static const struct regmap_irq axp809_regmap_irqs[] = {
408 INIT_REGMAP_IRQ(AXP809, ACIN_OVER_V, 0, 7),
409 INIT_REGMAP_IRQ(AXP809, ACIN_PLUGIN, 0, 6),
410 INIT_REGMAP_IRQ(AXP809, ACIN_REMOVAL, 0, 5),
411 INIT_REGMAP_IRQ(AXP809, VBUS_OVER_V, 0, 4),
412 INIT_REGMAP_IRQ(AXP809, VBUS_PLUGIN, 0, 3),
413 INIT_REGMAP_IRQ(AXP809, VBUS_REMOVAL, 0, 2),
414 INIT_REGMAP_IRQ(AXP809, VBUS_V_LOW, 0, 1),
415 INIT_REGMAP_IRQ(AXP809, BATT_PLUGIN, 1, 7),
416 INIT_REGMAP_IRQ(AXP809, BATT_REMOVAL, 1, 6),
417 INIT_REGMAP_IRQ(AXP809, BATT_ENT_ACT_MODE, 1, 5),
418 INIT_REGMAP_IRQ(AXP809, BATT_EXIT_ACT_MODE, 1, 4),
419 INIT_REGMAP_IRQ(AXP809, CHARG, 1, 3),
420 INIT_REGMAP_IRQ(AXP809, CHARG_DONE, 1, 2),
421 INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_HIGH, 2, 7),
422 INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_HIGH_END, 2, 6),
423 INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_LOW, 2, 5),
424 INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_LOW_END, 2, 4),
425 INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_HIGH, 2, 3),
426 INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_HIGH_END, 2, 2),
427 INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_LOW, 2, 1),
428 INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_LOW_END, 2, 0),
429 INIT_REGMAP_IRQ(AXP809, DIE_TEMP_HIGH, 3, 7),
430 INIT_REGMAP_IRQ(AXP809, LOW_PWR_LVL1, 3, 1),
431 INIT_REGMAP_IRQ(AXP809, LOW_PWR_LVL2, 3, 0),
432 INIT_REGMAP_IRQ(AXP809, TIMER, 4, 7),
433 INIT_REGMAP_IRQ(AXP809, PEK_RIS_EDGE, 4, 6),
434 INIT_REGMAP_IRQ(AXP809, PEK_FAL_EDGE, 4, 5),
435 INIT_REGMAP_IRQ(AXP809, PEK_SHORT, 4, 4),
436 INIT_REGMAP_IRQ(AXP809, PEK_LONG, 4, 3),
437 INIT_REGMAP_IRQ(AXP809, PEK_OVER_OFF, 4, 2),
438 INIT_REGMAP_IRQ(AXP809, GPIO1_INPUT, 4, 1),
439 INIT_REGMAP_IRQ(AXP809, GPIO0_INPUT, 4, 0),
440};
441
Michal Suchanekd8d79f82015-07-11 14:59:56 +0200442static const struct regmap_irq_chip axp152_regmap_irq_chip = {
443 .name = "axp152_irq_chip",
444 .status_base = AXP152_IRQ1_STATE,
445 .ack_base = AXP152_IRQ1_STATE,
446 .mask_base = AXP152_IRQ1_EN,
447 .mask_invert = true,
448 .init_ack_masked = true,
449 .irqs = axp152_regmap_irqs,
450 .num_irqs = ARRAY_SIZE(axp152_regmap_irqs),
451 .num_regs = 3,
452};
453
Carlo Caionecfb61a42014-05-01 14:29:27 +0200454static const struct regmap_irq_chip axp20x_regmap_irq_chip = {
455 .name = "axp20x_irq_chip",
456 .status_base = AXP20X_IRQ1_STATE,
457 .ack_base = AXP20X_IRQ1_STATE,
458 .mask_base = AXP20X_IRQ1_EN,
Carlo Caionecfb61a42014-05-01 14:29:27 +0200459 .mask_invert = true,
460 .init_ack_masked = true,
Jacob Panaf7e9062014-10-06 21:17:14 -0700461 .irqs = axp20x_regmap_irqs,
462 .num_irqs = ARRAY_SIZE(axp20x_regmap_irqs),
463 .num_regs = 5,
464
465};
466
Boris BREZILLONf05be582015-04-10 12:09:01 +0800467static const struct regmap_irq_chip axp22x_regmap_irq_chip = {
468 .name = "axp22x_irq_chip",
469 .status_base = AXP20X_IRQ1_STATE,
470 .ack_base = AXP20X_IRQ1_STATE,
471 .mask_base = AXP20X_IRQ1_EN,
472 .mask_invert = true,
473 .init_ack_masked = true,
474 .irqs = axp22x_regmap_irqs,
475 .num_irqs = ARRAY_SIZE(axp22x_regmap_irqs),
476 .num_regs = 5,
477};
478
Jacob Panaf7e9062014-10-06 21:17:14 -0700479static const struct regmap_irq_chip axp288_regmap_irq_chip = {
480 .name = "axp288_irq_chip",
481 .status_base = AXP20X_IRQ1_STATE,
482 .ack_base = AXP20X_IRQ1_STATE,
483 .mask_base = AXP20X_IRQ1_EN,
484 .mask_invert = true,
485 .init_ack_masked = true,
486 .irqs = axp288_regmap_irqs,
487 .num_irqs = ARRAY_SIZE(axp288_regmap_irqs),
488 .num_regs = 6,
489
Carlo Caionecfb61a42014-05-01 14:29:27 +0200490};
491
Chen-Yu Tsai20147f02016-03-29 17:22:26 +0800492static const struct regmap_irq_chip axp809_regmap_irq_chip = {
493 .name = "axp809",
494 .status_base = AXP20X_IRQ1_STATE,
495 .ack_base = AXP20X_IRQ1_STATE,
496 .mask_base = AXP20X_IRQ1_EN,
497 .mask_invert = true,
498 .init_ack_masked = true,
499 .irqs = axp809_regmap_irqs,
500 .num_irqs = ARRAY_SIZE(axp809_regmap_irqs),
501 .num_regs = 5,
502};
503
Carlo Caionecfb61a42014-05-01 14:29:27 +0200504static struct mfd_cell axp20x_cells[] = {
505 {
Hans de Goede8de4efd2015-08-08 17:58:41 +0200506 .name = "axp20x-pek",
507 .num_resources = ARRAY_SIZE(axp20x_pek_resources),
508 .resources = axp20x_pek_resources,
Carlo Caionecfb61a42014-05-01 14:29:27 +0200509 }, {
Hans de Goede8de4efd2015-08-08 17:58:41 +0200510 .name = "axp20x-regulator",
511 }, {
Michael Haascd7cf272016-05-06 07:19:49 +0200512 .name = "axp20x-ac-power-supply",
513 .of_compatible = "x-powers,axp202-ac-power-supply",
514 .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources),
515 .resources = axp20x_ac_power_supply_resources,
516 }, {
Hans de Goede8de4efd2015-08-08 17:58:41 +0200517 .name = "axp20x-usb-power-supply",
518 .of_compatible = "x-powers,axp202-usb-power-supply",
519 .num_resources = ARRAY_SIZE(axp20x_usb_power_supply_resources),
520 .resources = axp20x_usb_power_supply_resources,
Carlo Caionecfb61a42014-05-01 14:29:27 +0200521 },
522};
523
Boris BREZILLONf05be582015-04-10 12:09:01 +0800524static struct mfd_cell axp22x_cells[] = {
525 {
526 .name = "axp20x-pek",
527 .num_resources = ARRAY_SIZE(axp22x_pek_resources),
528 .resources = axp22x_pek_resources,
Chen-Yu Tsai6d4fa892015-04-10 12:09:06 +0800529 }, {
530 .name = "axp20x-regulator",
Boris BREZILLONf05be582015-04-10 12:09:01 +0800531 },
532};
533
Michal Suchanekd8d79f82015-07-11 14:59:56 +0200534static struct mfd_cell axp152_cells[] = {
535 {
536 .name = "axp20x-pek",
537 .num_resources = ARRAY_SIZE(axp152_pek_resources),
538 .resources = axp152_pek_resources,
539 },
540};
541
Jacob Panaf7e9062014-10-06 21:17:14 -0700542static struct resource axp288_adc_resources[] = {
543 {
544 .name = "GPADC",
545 .start = AXP288_IRQ_GPADC,
546 .end = AXP288_IRQ_GPADC,
547 .flags = IORESOURCE_IRQ,
548 },
549};
550
Ramakrishna Pallalabdb01f72015-04-03 00:49:47 +0530551static struct resource axp288_extcon_resources[] = {
552 {
553 .start = AXP288_IRQ_VBUS_FALL,
554 .end = AXP288_IRQ_VBUS_FALL,
555 .flags = IORESOURCE_IRQ,
556 },
557 {
558 .start = AXP288_IRQ_VBUS_RISE,
559 .end = AXP288_IRQ_VBUS_RISE,
560 .flags = IORESOURCE_IRQ,
561 },
562 {
563 .start = AXP288_IRQ_MV_CHNG,
564 .end = AXP288_IRQ_MV_CHNG,
565 .flags = IORESOURCE_IRQ,
566 },
567 {
568 .start = AXP288_IRQ_BC_USB_CHNG,
569 .end = AXP288_IRQ_BC_USB_CHNG,
570 .flags = IORESOURCE_IRQ,
571 },
572};
573
Jacob Panaf7e9062014-10-06 21:17:14 -0700574static struct resource axp288_charger_resources[] = {
575 {
576 .start = AXP288_IRQ_OV,
577 .end = AXP288_IRQ_OV,
578 .flags = IORESOURCE_IRQ,
579 },
580 {
581 .start = AXP288_IRQ_DONE,
582 .end = AXP288_IRQ_DONE,
583 .flags = IORESOURCE_IRQ,
584 },
585 {
586 .start = AXP288_IRQ_CHARGING,
587 .end = AXP288_IRQ_CHARGING,
588 .flags = IORESOURCE_IRQ,
589 },
590 {
591 .start = AXP288_IRQ_SAFE_QUIT,
592 .end = AXP288_IRQ_SAFE_QUIT,
593 .flags = IORESOURCE_IRQ,
594 },
595 {
596 .start = AXP288_IRQ_SAFE_ENTER,
597 .end = AXP288_IRQ_SAFE_ENTER,
598 .flags = IORESOURCE_IRQ,
599 },
600 {
601 .start = AXP288_IRQ_QCBTU,
602 .end = AXP288_IRQ_QCBTU,
603 .flags = IORESOURCE_IRQ,
604 },
605 {
606 .start = AXP288_IRQ_CBTU,
607 .end = AXP288_IRQ_CBTU,
608 .flags = IORESOURCE_IRQ,
609 },
610 {
611 .start = AXP288_IRQ_QCBTO,
612 .end = AXP288_IRQ_QCBTO,
613 .flags = IORESOURCE_IRQ,
614 },
615 {
616 .start = AXP288_IRQ_CBTO,
617 .end = AXP288_IRQ_CBTO,
618 .flags = IORESOURCE_IRQ,
619 },
620};
621
622static struct mfd_cell axp288_cells[] = {
623 {
624 .name = "axp288_adc",
625 .num_resources = ARRAY_SIZE(axp288_adc_resources),
626 .resources = axp288_adc_resources,
627 },
628 {
Ramakrishna Pallalabdb01f72015-04-03 00:49:47 +0530629 .name = "axp288_extcon",
630 .num_resources = ARRAY_SIZE(axp288_extcon_resources),
631 .resources = axp288_extcon_resources,
632 },
633 {
Jacob Panaf7e9062014-10-06 21:17:14 -0700634 .name = "axp288_charger",
635 .num_resources = ARRAY_SIZE(axp288_charger_resources),
636 .resources = axp288_charger_resources,
637 },
638 {
Todd Brandtd63878742015-02-02 15:41:41 -0800639 .name = "axp288_fuel_gauge",
640 .num_resources = ARRAY_SIZE(axp288_fuel_gauge_resources),
641 .resources = axp288_fuel_gauge_resources,
Jacob Panaf7e9062014-10-06 21:17:14 -0700642 },
Aaron Lud8139f62014-11-24 17:24:47 +0800643 {
Borun Fue56e5ad2015-10-14 16:16:26 +0800644 .name = "axp20x-pek",
645 .num_resources = ARRAY_SIZE(axp288_power_button_resources),
646 .resources = axp288_power_button_resources,
647 },
648 {
Aaron Lud8139f62014-11-24 17:24:47 +0800649 .name = "axp288_pmic_acpi",
650 },
Jacob Panaf7e9062014-10-06 21:17:14 -0700651};
652
Chen-Yu Tsai20147f02016-03-29 17:22:26 +0800653static struct mfd_cell axp809_cells[] = {
654 {
655 .name = "axp20x-pek",
656 .num_resources = ARRAY_SIZE(axp809_pek_resources),
657 .resources = axp809_pek_resources,
658 }, {
659 .name = "axp20x-regulator",
660 },
661};
662
Carlo Caionecfb61a42014-05-01 14:29:27 +0200663static struct axp20x_dev *axp20x_pm_power_off;
664static void axp20x_power_off(void)
665{
Jacob Panaf7e9062014-10-06 21:17:14 -0700666 if (axp20x_pm_power_off->variant == AXP288_ID)
667 return;
668
Carlo Caionecfb61a42014-05-01 14:29:27 +0200669 regmap_write(axp20x_pm_power_off->regmap, AXP20X_OFF_CTRL,
670 AXP20X_OFF);
Hans de Goede179dc632016-06-05 15:50:48 +0200671
672 /* Give capacitors etc. time to drain to avoid kernel panic msg. */
673 msleep(500);
Carlo Caionecfb61a42014-05-01 14:29:27 +0200674}
675
Chen-Yu Tsai4fd41152016-02-12 10:02:42 +0800676int axp20x_match_device(struct axp20x_dev *axp20x)
Jacob Panaf7e9062014-10-06 21:17:14 -0700677{
Chen-Yu Tsaie47a3cf2016-02-12 10:02:39 +0800678 struct device *dev = axp20x->dev;
Jacob Panaf7e9062014-10-06 21:17:14 -0700679 const struct acpi_device_id *acpi_id;
680 const struct of_device_id *of_id;
681
682 if (dev->of_node) {
Chen-Yu Tsaiaf7acc32016-02-12 10:02:40 +0800683 of_id = of_match_device(dev->driver->of_match_table, dev);
Jacob Panaf7e9062014-10-06 21:17:14 -0700684 if (!of_id) {
685 dev_err(dev, "Unable to match OF ID\n");
686 return -ENODEV;
687 }
Chen-Yu Tsai2260a452016-02-12 10:02:43 +0800688 axp20x->variant = (long)of_id->data;
Jacob Panaf7e9062014-10-06 21:17:14 -0700689 } else {
690 acpi_id = acpi_match_device(dev->driver->acpi_match_table, dev);
691 if (!acpi_id || !acpi_id->driver_data) {
692 dev_err(dev, "Unable to match ACPI ID and data\n");
693 return -ENODEV;
694 }
Chen-Yu Tsai2260a452016-02-12 10:02:43 +0800695 axp20x->variant = (long)acpi_id->driver_data;
Jacob Panaf7e9062014-10-06 21:17:14 -0700696 }
697
698 switch (axp20x->variant) {
Michal Suchanekd8d79f82015-07-11 14:59:56 +0200699 case AXP152_ID:
700 axp20x->nr_cells = ARRAY_SIZE(axp152_cells);
701 axp20x->cells = axp152_cells;
702 axp20x->regmap_cfg = &axp152_regmap_config;
703 axp20x->regmap_irq_chip = &axp152_regmap_irq_chip;
704 break;
Jacob Panaf7e9062014-10-06 21:17:14 -0700705 case AXP202_ID:
706 case AXP209_ID:
707 axp20x->nr_cells = ARRAY_SIZE(axp20x_cells);
708 axp20x->cells = axp20x_cells;
709 axp20x->regmap_cfg = &axp20x_regmap_config;
710 axp20x->regmap_irq_chip = &axp20x_regmap_irq_chip;
711 break;
Boris BREZILLONf05be582015-04-10 12:09:01 +0800712 case AXP221_ID:
Chen-Yu Tsai02071f02016-02-12 10:02:44 +0800713 case AXP223_ID:
Boris BREZILLONf05be582015-04-10 12:09:01 +0800714 axp20x->nr_cells = ARRAY_SIZE(axp22x_cells);
715 axp20x->cells = axp22x_cells;
716 axp20x->regmap_cfg = &axp22x_regmap_config;
717 axp20x->regmap_irq_chip = &axp22x_regmap_irq_chip;
718 break;
Jacob Panaf7e9062014-10-06 21:17:14 -0700719 case AXP288_ID:
720 axp20x->cells = axp288_cells;
721 axp20x->nr_cells = ARRAY_SIZE(axp288_cells);
722 axp20x->regmap_cfg = &axp288_regmap_config;
723 axp20x->regmap_irq_chip = &axp288_regmap_irq_chip;
724 break;
Chen-Yu Tsai20147f02016-03-29 17:22:26 +0800725 case AXP809_ID:
726 axp20x->nr_cells = ARRAY_SIZE(axp809_cells);
727 axp20x->cells = axp809_cells;
728 axp20x->regmap_cfg = &axp22x_regmap_config;
729 axp20x->regmap_irq_chip = &axp809_regmap_irq_chip;
730 break;
Jacob Panaf7e9062014-10-06 21:17:14 -0700731 default:
732 dev_err(dev, "unsupported AXP20X ID %lu\n", axp20x->variant);
733 return -EINVAL;
734 }
735 dev_info(dev, "AXP20x variant %s found\n",
Chen-Yu Tsai2260a452016-02-12 10:02:43 +0800736 axp20x_model_names[axp20x->variant]);
Jacob Panaf7e9062014-10-06 21:17:14 -0700737
738 return 0;
739}
Chen-Yu Tsai4fd41152016-02-12 10:02:42 +0800740EXPORT_SYMBOL(axp20x_match_device);
Jacob Panaf7e9062014-10-06 21:17:14 -0700741
Chen-Yu Tsai4fd41152016-02-12 10:02:42 +0800742int axp20x_device_probe(struct axp20x_dev *axp20x)
Carlo Caionecfb61a42014-05-01 14:29:27 +0200743{
Carlo Caionecfb61a42014-05-01 14:29:27 +0200744 int ret;
745
Chen-Yu Tsai4fd41152016-02-12 10:02:42 +0800746 ret = regmap_add_irq_chip(axp20x->regmap, axp20x->irq,
Carlo Caionecfb61a42014-05-01 14:29:27 +0200747 IRQF_ONESHOT | IRQF_SHARED, -1,
Jacob Panaf7e9062014-10-06 21:17:14 -0700748 axp20x->regmap_irq_chip,
Carlo Caionecfb61a42014-05-01 14:29:27 +0200749 &axp20x->regmap_irqc);
750 if (ret) {
Chen-Yu Tsai4fd41152016-02-12 10:02:42 +0800751 dev_err(axp20x->dev, "failed to add irq chip: %d\n", ret);
Carlo Caionecfb61a42014-05-01 14:29:27 +0200752 return ret;
753 }
754
Jacob Panaf7e9062014-10-06 21:17:14 -0700755 ret = mfd_add_devices(axp20x->dev, -1, axp20x->cells,
Chen-Yu Tsai2260a452016-02-12 10:02:43 +0800756 axp20x->nr_cells, NULL, 0, NULL);
Carlo Caionecfb61a42014-05-01 14:29:27 +0200757
758 if (ret) {
Chen-Yu Tsai4fd41152016-02-12 10:02:42 +0800759 dev_err(axp20x->dev, "failed to add MFD devices: %d\n", ret);
760 regmap_del_irq_chip(axp20x->irq, axp20x->regmap_irqc);
Carlo Caionecfb61a42014-05-01 14:29:27 +0200761 return ret;
762 }
763
764 if (!pm_power_off) {
765 axp20x_pm_power_off = axp20x;
766 pm_power_off = axp20x_power_off;
767 }
768
Chen-Yu Tsai4fd41152016-02-12 10:02:42 +0800769 dev_info(axp20x->dev, "AXP20X driver loaded\n");
Carlo Caionecfb61a42014-05-01 14:29:27 +0200770
771 return 0;
772}
Chen-Yu Tsai4fd41152016-02-12 10:02:42 +0800773EXPORT_SYMBOL(axp20x_device_probe);
Carlo Caionecfb61a42014-05-01 14:29:27 +0200774
Chen-Yu Tsai4fd41152016-02-12 10:02:42 +0800775int axp20x_device_remove(struct axp20x_dev *axp20x)
Carlo Caionecfb61a42014-05-01 14:29:27 +0200776{
Carlo Caionecfb61a42014-05-01 14:29:27 +0200777 if (axp20x == axp20x_pm_power_off) {
778 axp20x_pm_power_off = NULL;
779 pm_power_off = NULL;
780 }
781
782 mfd_remove_devices(axp20x->dev);
Chen-Yu Tsai4fd41152016-02-12 10:02:42 +0800783 regmap_del_irq_chip(axp20x->irq, axp20x->regmap_irqc);
Carlo Caionecfb61a42014-05-01 14:29:27 +0200784
785 return 0;
786}
Chen-Yu Tsai4fd41152016-02-12 10:02:42 +0800787EXPORT_SYMBOL(axp20x_device_remove);
Carlo Caionecfb61a42014-05-01 14:29:27 +0200788
789MODULE_DESCRIPTION("PMIC MFD core driver for AXP20X");
790MODULE_AUTHOR("Carlo Caione <carlo@caione.org>");
791MODULE_LICENSE("GPL");