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review.shift-gmbh.com / SHIFTPHONES / kernel / common / 14e1d9147d96e0e6cc7f14eb339a7754404b4b73 / . / arch / arm / boot / dts / r8a7778.dtsi
blob: ca88b3bc78e094afb5766aa5753c7625982c6f87 [file] [log] [blame]
Kuninori Morimotoccb7cc72013-03-21 03:01:36 -0700[diff] [blame]1/*
2 * Device Tree Source for Renesas r8a7778
3 *
4 * Copyright (C) 2013 Renesas Solutions Corp.
5 * Copyright (C) 2013 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
6 *
7 * based on r8a7779
8 *
9 * Copyright (C) 2013 Renesas Solutions Corp.
10 * Copyright (C) 2013 Simon Horman
11 *
12 * This file is licensed under the terms of the GNU General Public License
13 * version 2. This program is licensed "as is" without any warranty of any
14 * kind, whether express or implied.
15 */
16
17/include/ "skeleton.dtsi"
18
19/ {
20 compatible = "renesas,r8a7778";
21
22 cpus {
23 cpu@0 {
24 compatible = "arm,cortex-a9";
25 };
26 };
27
28 gic: interrupt-controller@fe438000 {
29 compatible = "arm,cortex-a9-gic";
30 #interrupt-cells = <3>;
31 interrupt-controller;
32 reg = <0xfe438000 0x1000>,
33 <0xfe430000 0x100>;
34 };
Laurent Pinchart0697ccc2013-05-09 15:05:57 +0200[diff] [blame]35
Kuninori Morimoto87f1ba82013-10-02 01:32:12 -0700[diff] [blame]36 /* irqpin: IRQ0 - IRQ3 */
37 irqpin: irqpin@fe78001c {
38 compatible = "renesas,intc-irqpin";
39 #interrupt-cells = <2>;
40 interrupt-controller;
41 status = "disabled"; /* default off */
42 reg = <0xfe78001c 4>,
43 <0xfe780010 4>,
44 <0xfe780024 4>,
45 <0xfe780044 4>,
46 <0xfe780064 4>;
47 interrupt-parent = <&gic>;
48 interrupts = <0 27 0x4
49 0 28 0x4
50 0 29 0x4
51 0 30 0x4>;
52 sense-bitfield-width = <2>;
53 };
54
Laurent Pinchartaaf7eda2013-05-10 15:51:14 +0200[diff] [blame]55 gpio0: gpio@ffc40000 {
56 compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
57 reg = <0xffc40000 0x2c>;
58 interrupt-parent = <&gic>;
59 interrupts = <0 103 0x4>;
60 #gpio-cells = <2>;
61 gpio-controller;
62 gpio-ranges = <&pfc 0 0 32>;
63 #interrupt-cells = <2>;
64 interrupt-controller;
65 };
66
67 gpio1: gpio@ffc41000 {
68 compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
69 reg = <0xffc41000 0x2c>;
70 interrupt-parent = <&gic>;
71 interrupts = <0 103 0x4>;
72 #gpio-cells = <2>;
73 gpio-controller;
74 gpio-ranges = <&pfc 0 32 32>;
75 #interrupt-cells = <2>;
76 interrupt-controller;
77 };
78
79 gpio2: gpio@ffc42000 {
80 compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
81 reg = <0xffc42000 0x2c>;
82 interrupt-parent = <&gic>;
83 interrupts = <0 103 0x4>;
84 #gpio-cells = <2>;
85 gpio-controller;
86 gpio-ranges = <&pfc 0 64 32>;
87 #interrupt-cells = <2>;
88 interrupt-controller;
89 };
90
91 gpio3: gpio@ffc43000 {
92 compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
93 reg = <0xffc43000 0x2c>;
94 interrupt-parent = <&gic>;
95 interrupts = <0 103 0x4>;
96 #gpio-cells = <2>;
97 gpio-controller;
98 gpio-ranges = <&pfc 0 96 32>;
99 #interrupt-cells = <2>;
100 interrupt-controller;
101 };
102
103 gpio4: gpio@ffc44000 {
104 compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
105 reg = <0xffc44000 0x2c>;
106 interrupt-parent = <&gic>;
107 interrupts = <0 103 0x4>;
108 #gpio-cells = <2>;
109 gpio-controller;
110 gpio-ranges = <&pfc 0 128 27>;
111 #interrupt-cells = <2>;
112 interrupt-controller;
113 };
114
Laurent Pinchart0697ccc2013-05-09 15:05:57 +0200[diff] [blame]115 pfc: pfc@fffc0000 {
116 compatible = "renesas,pfc-r8a7778";
Laurent Pinchart80d01fe2013-10-03 19:35:41 +0200[diff] [blame]117 reg = <0xfffc0000 0x118>;
Laurent Pinchart0697ccc2013-05-09 15:05:57 +0200[diff] [blame]118 };
Kuninori Morimoto3acb51b2013-10-03 23:44:15 -0700[diff] [blame]119
120 i2c0: i2c@ffc70000 {
121 #address-cells = <1>;
122 #size-cells = <0>;
123 compatible = "renesas,i2c-r8a7778";
124 reg = <0xffc70000 0x1000>;
125 interrupt-parent = <&gic>;
126 interrupts = <0 67 0x4>;
127 status = "disabled";
128 };
129
130 i2c1: i2c@ffc71000 {
131 #address-cells = <1>;
132 #size-cells = <0>;
133 compatible = "renesas,i2c-r8a7778";
134 reg = <0xffc71000 0x1000>;
135 interrupt-parent = <&gic>;
136 interrupts = <0 78 0x4>;
137 status = "disabled";
138 };
139
140 i2c2: i2c@ffc72000 {
141 #address-cells = <1>;
142 #size-cells = <0>;
143 compatible = "renesas,i2c-r8a7778";
144 reg = <0xffc72000 0x1000>;
145 interrupt-parent = <&gic>;
146 interrupts = <0 76 0x4>;
147 status = "disabled";
148 };
149
150 i2c3: i2c@ffc73000 {
151 #address-cells = <1>;
152 #size-cells = <0>;
153 compatible = "renesas,i2c-r8a7778";
154 reg = <0xffc73000 0x1000>;
155 interrupt-parent = <&gic>;
156 interrupts = <0 77 0x4>;
157 status = "disabled";
158 };
Kuninori Morimotof7b901752013-10-03 18:32:22 -0700[diff] [blame]159
Kuninori Morimoto14e1d912013-10-21 19:35:42 -0700[diff] [blame^]160 mmcif: mmc@ffe4e000 {
Kuninori Morimotof7b901752013-10-03 18:32:22 -0700[diff] [blame]161 compatible = "renesas,sh-mmcif";
162 reg = <0xffe4e000 0x100>;
163 interrupt-parent = <&gic>;
164 interrupts = <0 61 4>;
165 status = "disabled";
166 };
Kuninori Morimoto04cbd882013-10-10 23:35:46 -0700[diff] [blame]167
Kuninori Morimoto14e1d912013-10-21 19:35:42 -0700[diff] [blame^]168 sdhi0: sd@ffe4c000 {
Kuninori Morimoto04cbd882013-10-10 23:35:46 -0700[diff] [blame]169 compatible = "renesas,sdhi-r8a7778";
170 reg = <0xffe4c000 0x100>;
171 interrupt-parent = <&gic>;
172 interrupts = <0 87 4>;
173 cap-sd-highspeed;
174 cap-sdio-irq;
175 status = "disabled";
176 };
177
Kuninori Morimoto14e1d912013-10-21 19:35:42 -0700[diff] [blame^]178 sdhi1: sd@ffe4d000 {
Kuninori Morimoto04cbd882013-10-10 23:35:46 -0700[diff] [blame]179 compatible = "renesas,sdhi-r8a7778";
180 reg = <0xffe4d000 0x100>;
181 interrupt-parent = <&gic>;
182 interrupts = <0 88 4>;
183 cap-sd-highspeed;
184 cap-sdio-irq;
185 status = "disabled";
186 };
187
Kuninori Morimoto14e1d912013-10-21 19:35:42 -0700[diff] [blame^]188 sdhi2: sd@ffe4f000 {
Kuninori Morimoto04cbd882013-10-10 23:35:46 -0700[diff] [blame]189 compatible = "renesas,sdhi-r8a7778";
190 reg = <0xffe4f000 0x100>;
191 interrupt-parent = <&gic>;
192 interrupts = <0 86 4>;
193 cap-sd-highspeed;
194 cap-sdio-irq;
195 status = "disabled";
196 };
Kuninori Morimotoccb7cc72013-03-21 03:01:36 -0700[diff] [blame]197};