blob: d0165c88f705b193937606d174201ae3ec2722b7 [file] [log] [blame]
Zhichang Yuan031e3602018-03-15 02:15:50 +08001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2017 HiSilicon Limited, All Rights Reserved.
4 * Author: Gabriele Paoloni <gabriele.paoloni@huawei.com>
5 * Author: Zhichang Yuan <yuanzhichang@hisilicon.com>
6 */
7
8#define pr_fmt(fmt) "LOGIC PIO: " fmt
9
10#include <linux/of.h>
11#include <linux/io.h>
12#include <linux/logic_pio.h>
13#include <linux/mm.h>
14#include <linux/rculist.h>
15#include <linux/sizes.h>
16#include <linux/slab.h>
17
18/* The unique hardware address list */
19static LIST_HEAD(io_range_list);
20static DEFINE_MUTEX(io_range_mutex);
21
22/* Consider a kernel general helper for this */
23#define in_range(b, first, len) ((b) >= (first) && (b) < (first) + (len))
24
25/**
26 * logic_pio_register_range - register logical PIO range for a host
27 * @new_range: pointer to the IO range to be registered.
28 *
29 * Returns 0 on success, the error code in case of failure.
30 *
31 * Register a new IO range node in the IO range list.
32 */
33int logic_pio_register_range(struct logic_pio_hwaddr *new_range)
34{
35 struct logic_pio_hwaddr *range;
36 resource_size_t start;
37 resource_size_t end;
John Garry0a271422019-07-30 21:29:53 +080038 resource_size_t mmio_end = 0;
Zhichang Yuan031e3602018-03-15 02:15:50 +080039 resource_size_t iio_sz = MMIO_UPPER_LIMIT;
40 int ret = 0;
41
42 if (!new_range || !new_range->fwnode || !new_range->size)
43 return -EINVAL;
44
45 start = new_range->hw_start;
46 end = new_range->hw_start + new_range->size;
47
48 mutex_lock(&io_range_mutex);
John Garry06709e82019-07-30 21:29:52 +080049 list_for_each_entry(range, &io_range_list, list) {
Zhichang Yuan031e3602018-03-15 02:15:50 +080050 if (range->fwnode == new_range->fwnode) {
51 /* range already there */
52 goto end_register;
53 }
54 if (range->flags == LOGIC_PIO_CPU_MMIO &&
55 new_range->flags == LOGIC_PIO_CPU_MMIO) {
56 /* for MMIO ranges we need to check for overlap */
57 if (start >= range->hw_start + range->size ||
58 end < range->hw_start) {
John Garry0a271422019-07-30 21:29:53 +080059 mmio_end = range->io_start + range->size;
Zhichang Yuan031e3602018-03-15 02:15:50 +080060 } else {
61 ret = -EFAULT;
62 goto end_register;
63 }
64 } else if (range->flags == LOGIC_PIO_INDIRECT &&
65 new_range->flags == LOGIC_PIO_INDIRECT) {
66 iio_sz += range->size;
67 }
68 }
69
70 /* range not registered yet, check for available space */
71 if (new_range->flags == LOGIC_PIO_CPU_MMIO) {
John Garry0a271422019-07-30 21:29:53 +080072 if (mmio_end + new_range->size - 1 > MMIO_UPPER_LIMIT) {
Zhichang Yuan031e3602018-03-15 02:15:50 +080073 /* if it's too big check if 64K space can be reserved */
John Garry0a271422019-07-30 21:29:53 +080074 if (mmio_end + SZ_64K - 1 > MMIO_UPPER_LIMIT) {
Zhichang Yuan031e3602018-03-15 02:15:50 +080075 ret = -E2BIG;
76 goto end_register;
77 }
78 new_range->size = SZ_64K;
79 pr_warn("Requested IO range too big, new size set to 64K\n");
80 }
John Garry0a271422019-07-30 21:29:53 +080081 new_range->io_start = mmio_end;
Zhichang Yuan031e3602018-03-15 02:15:50 +080082 } else if (new_range->flags == LOGIC_PIO_INDIRECT) {
83 if (iio_sz + new_range->size - 1 > IO_SPACE_LIMIT) {
84 ret = -E2BIG;
85 goto end_register;
86 }
87 new_range->io_start = iio_sz;
88 } else {
89 /* invalid flag */
90 ret = -EINVAL;
91 goto end_register;
92 }
93
94 list_add_tail_rcu(&new_range->list, &io_range_list);
95
96end_register:
97 mutex_unlock(&io_range_mutex);
98 return ret;
99}
100
101/**
102 * find_io_range_by_fwnode - find logical PIO range for given FW node
103 * @fwnode: FW node handle associated with logical PIO range
104 *
105 * Returns pointer to node on success, NULL otherwise.
106 *
107 * Traverse the io_range_list to find the registered node for @fwnode.
108 */
109struct logic_pio_hwaddr *find_io_range_by_fwnode(struct fwnode_handle *fwnode)
110{
John Garry06709e82019-07-30 21:29:52 +0800111 struct logic_pio_hwaddr *range, *found_range = NULL;
Zhichang Yuan031e3602018-03-15 02:15:50 +0800112
John Garry06709e82019-07-30 21:29:52 +0800113 rcu_read_lock();
Zhichang Yuan031e3602018-03-15 02:15:50 +0800114 list_for_each_entry_rcu(range, &io_range_list, list) {
John Garry06709e82019-07-30 21:29:52 +0800115 if (range->fwnode == fwnode) {
116 found_range = range;
117 break;
118 }
Zhichang Yuan031e3602018-03-15 02:15:50 +0800119 }
John Garry06709e82019-07-30 21:29:52 +0800120 rcu_read_unlock();
121
122 return found_range;
Zhichang Yuan031e3602018-03-15 02:15:50 +0800123}
124
125/* Return a registered range given an input PIO token */
126static struct logic_pio_hwaddr *find_io_range(unsigned long pio)
127{
John Garry06709e82019-07-30 21:29:52 +0800128 struct logic_pio_hwaddr *range, *found_range = NULL;
Zhichang Yuan031e3602018-03-15 02:15:50 +0800129
John Garry06709e82019-07-30 21:29:52 +0800130 rcu_read_lock();
Zhichang Yuan031e3602018-03-15 02:15:50 +0800131 list_for_each_entry_rcu(range, &io_range_list, list) {
John Garry06709e82019-07-30 21:29:52 +0800132 if (in_range(pio, range->io_start, range->size)) {
133 found_range = range;
134 break;
135 }
Zhichang Yuan031e3602018-03-15 02:15:50 +0800136 }
John Garry06709e82019-07-30 21:29:52 +0800137 rcu_read_unlock();
138
139 if (!found_range)
140 pr_err("PIO entry token 0x%lx invalid\n", pio);
141
142 return found_range;
Zhichang Yuan031e3602018-03-15 02:15:50 +0800143}
144
145/**
146 * logic_pio_to_hwaddr - translate logical PIO to HW address
147 * @pio: logical PIO value
148 *
149 * Returns HW address if valid, ~0 otherwise.
150 *
151 * Translate the input logical PIO to the corresponding hardware address.
152 * The input PIO should be unique in the whole logical PIO space.
153 */
154resource_size_t logic_pio_to_hwaddr(unsigned long pio)
155{
156 struct logic_pio_hwaddr *range;
157
158 range = find_io_range(pio);
159 if (range)
160 return range->hw_start + pio - range->io_start;
161
162 return (resource_size_t)~0;
163}
164
165/**
166 * logic_pio_trans_hwaddr - translate HW address to logical PIO
167 * @fwnode: FW node reference for the host
168 * @addr: Host-relative HW address
169 * @size: size to translate
170 *
171 * Returns Logical PIO value if successful, ~0UL otherwise
172 */
173unsigned long logic_pio_trans_hwaddr(struct fwnode_handle *fwnode,
174 resource_size_t addr, resource_size_t size)
175{
176 struct logic_pio_hwaddr *range;
177
178 range = find_io_range_by_fwnode(fwnode);
179 if (!range || range->flags == LOGIC_PIO_CPU_MMIO) {
180 pr_err("IO range not found or invalid\n");
181 return ~0UL;
182 }
183 if (range->size < size) {
184 pr_err("resource size %pa cannot fit in IO range size %pa\n",
185 &size, &range->size);
186 return ~0UL;
187 }
188 return addr - range->hw_start + range->io_start;
189}
190
191unsigned long logic_pio_trans_cpuaddr(resource_size_t addr)
192{
193 struct logic_pio_hwaddr *range;
194
John Garry06709e82019-07-30 21:29:52 +0800195 rcu_read_lock();
Zhichang Yuan031e3602018-03-15 02:15:50 +0800196 list_for_each_entry_rcu(range, &io_range_list, list) {
197 if (range->flags != LOGIC_PIO_CPU_MMIO)
198 continue;
John Garry06709e82019-07-30 21:29:52 +0800199 if (in_range(addr, range->hw_start, range->size)) {
200 unsigned long cpuaddr;
201
202 cpuaddr = addr - range->hw_start + range->io_start;
203
204 rcu_read_unlock();
205 return cpuaddr;
206 }
Zhichang Yuan031e3602018-03-15 02:15:50 +0800207 }
John Garry06709e82019-07-30 21:29:52 +0800208 rcu_read_unlock();
209
210 pr_err("addr %pa not registered in io_range_list\n", &addr);
211
Zhichang Yuan031e3602018-03-15 02:15:50 +0800212 return ~0UL;
213}
214
215#if defined(CONFIG_INDIRECT_PIO) && defined(PCI_IOBASE)
216#define BUILD_LOGIC_IO(bw, type) \
217type logic_in##bw(unsigned long addr) \
218{ \
219 type ret = (type)~0; \
220 \
221 if (addr < MMIO_UPPER_LIMIT) { \
222 ret = read##bw(PCI_IOBASE + addr); \
223 } else if (addr >= MMIO_UPPER_LIMIT && addr < IO_SPACE_LIMIT) { \
224 struct logic_pio_hwaddr *entry = find_io_range(addr); \
225 \
226 if (entry && entry->ops) \
227 ret = entry->ops->in(entry->hostdata, \
228 addr, sizeof(type)); \
229 else \
230 WARN_ON_ONCE(1); \
231 } \
232 return ret; \
233} \
234 \
235void logic_out##bw(type value, unsigned long addr) \
236{ \
237 if (addr < MMIO_UPPER_LIMIT) { \
238 write##bw(value, PCI_IOBASE + addr); \
239 } else if (addr >= MMIO_UPPER_LIMIT && addr < IO_SPACE_LIMIT) { \
240 struct logic_pio_hwaddr *entry = find_io_range(addr); \
241 \
242 if (entry && entry->ops) \
243 entry->ops->out(entry->hostdata, \
244 addr, value, sizeof(type)); \
245 else \
246 WARN_ON_ONCE(1); \
247 } \
248} \
249 \
250void logic_ins##bw(unsigned long addr, void *buffer, \
251 unsigned int count) \
252{ \
253 if (addr < MMIO_UPPER_LIMIT) { \
254 reads##bw(PCI_IOBASE + addr, buffer, count); \
255 } else if (addr >= MMIO_UPPER_LIMIT && addr < IO_SPACE_LIMIT) { \
256 struct logic_pio_hwaddr *entry = find_io_range(addr); \
257 \
258 if (entry && entry->ops) \
259 entry->ops->ins(entry->hostdata, \
260 addr, buffer, sizeof(type), count); \
261 else \
262 WARN_ON_ONCE(1); \
263 } \
264 \
265} \
266 \
267void logic_outs##bw(unsigned long addr, const void *buffer, \
268 unsigned int count) \
269{ \
270 if (addr < MMIO_UPPER_LIMIT) { \
271 writes##bw(PCI_IOBASE + addr, buffer, count); \
272 } else if (addr >= MMIO_UPPER_LIMIT && addr < IO_SPACE_LIMIT) { \
273 struct logic_pio_hwaddr *entry = find_io_range(addr); \
274 \
275 if (entry && entry->ops) \
276 entry->ops->outs(entry->hostdata, \
277 addr, buffer, sizeof(type), count); \
278 else \
279 WARN_ON_ONCE(1); \
280 } \
281}
282
283BUILD_LOGIC_IO(b, u8)
284EXPORT_SYMBOL(logic_inb);
285EXPORT_SYMBOL(logic_insb);
286EXPORT_SYMBOL(logic_outb);
287EXPORT_SYMBOL(logic_outsb);
288
289BUILD_LOGIC_IO(w, u16)
290EXPORT_SYMBOL(logic_inw);
291EXPORT_SYMBOL(logic_insw);
292EXPORT_SYMBOL(logic_outw);
293EXPORT_SYMBOL(logic_outsw);
294
295BUILD_LOGIC_IO(l, u32)
296EXPORT_SYMBOL(logic_inl);
297EXPORT_SYMBOL(logic_insl);
298EXPORT_SYMBOL(logic_outl);
299EXPORT_SYMBOL(logic_outsl);
300
301#endif /* CONFIG_INDIRECT_PIO && PCI_IOBASE */