blob: 2af75f8088bbb02c3536d1cbc90f8dcf1d717d42 [file] [log] [blame]
Shawn Guo95ceafd2012-09-06 07:09:11 +00001/*
2 * Copyright (C) 2012 Freescale Semiconductor, Inc.
3 *
Viresh Kumar748c8762014-08-28 11:22:24 +05304 * Copyright (C) 2014 Linaro.
5 * Viresh Kumar <viresh.kumar@linaro.org>
6 *
Viresh Kumarbbcf0712014-09-09 19:58:03 +05307 * The OPP code in function set_target() is reused from
Shawn Guo95ceafd2012-09-06 07:09:11 +00008 * drivers/cpufreq/omap-cpufreq.c
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
16
17#include <linux/clk.h>
Sudeep KarkadaNageshae1825b22013-09-10 18:59:46 +010018#include <linux/cpu.h>
Eduardo Valentin77cff592013-07-15 09:09:14 -040019#include <linux/cpu_cooling.h>
Shawn Guo95ceafd2012-09-06 07:09:11 +000020#include <linux/cpufreq.h>
Thomas Petazzoni34e5a522014-10-19 11:30:28 +020021#include <linux/cpufreq-dt.h>
Eduardo Valentin77cff592013-07-15 09:09:14 -040022#include <linux/cpumask.h>
Shawn Guo95ceafd2012-09-06 07:09:11 +000023#include <linux/err.h>
24#include <linux/module.h>
25#include <linux/of.h>
Nishanth Menone4db1c72013-09-19 16:03:52 -050026#include <linux/pm_opp.h>
Shawn Guo5553f9e2013-01-30 14:27:49 +000027#include <linux/platform_device.h>
Shawn Guo95ceafd2012-09-06 07:09:11 +000028#include <linux/regulator/consumer.h>
29#include <linux/slab.h>
Eduardo Valentin77cff592013-07-15 09:09:14 -040030#include <linux/thermal.h>
Shawn Guo95ceafd2012-09-06 07:09:11 +000031
Viresh Kumard2f31f12014-08-28 11:22:28 +053032struct private_data {
33 struct device *cpu_dev;
34 struct regulator *cpu_reg;
35 struct thermal_cooling_device *cdev;
36 unsigned int voltage_tolerance; /* in percentage */
Viresh Kumar050794a2016-02-09 10:30:43 +053037 const char *reg_name;
Viresh Kumard2f31f12014-08-28 11:22:28 +053038};
Shawn Guo95ceafd2012-09-06 07:09:11 +000039
Bartlomiej Zolnierkiewicz21c36d32015-08-07 13:59:16 +020040static struct freq_attr *cpufreq_dt_attr[] = {
41 &cpufreq_freq_attr_scaling_available_freqs,
42 NULL, /* Extra space for boost-attr if required */
43 NULL,
44};
45
Viresh Kumarbbcf0712014-09-09 19:58:03 +053046static int set_target(struct cpufreq_policy *policy, unsigned int index)
Shawn Guo95ceafd2012-09-06 07:09:11 +000047{
Nishanth Menon47d43ba2013-09-19 16:03:51 -050048 struct dev_pm_opp *opp;
Viresh Kumard2f31f12014-08-28 11:22:28 +053049 struct cpufreq_frequency_table *freq_table = policy->freq_table;
50 struct clk *cpu_clk = policy->clk;
51 struct private_data *priv = policy->driver_data;
52 struct device *cpu_dev = priv->cpu_dev;
53 struct regulator *cpu_reg = priv->cpu_reg;
Andrzej Hajda929ca892015-12-30 12:18:42 +010054 unsigned long volt = 0, tol = 0;
55 int volt_old = 0;
Viresh Kumard4019f02013-08-14 19:38:24 +053056 unsigned int old_freq, new_freq;
Guennadi Liakhovetski0ca68432013-02-25 18:22:37 +010057 long freq_Hz, freq_exact;
Shawn Guo95ceafd2012-09-06 07:09:11 +000058 int ret;
59
Shawn Guo95ceafd2012-09-06 07:09:11 +000060 freq_Hz = clk_round_rate(cpu_clk, freq_table[index].frequency * 1000);
Paul Walmsley2209b0c2013-11-25 18:01:18 -080061 if (freq_Hz <= 0)
Shawn Guo95ceafd2012-09-06 07:09:11 +000062 freq_Hz = freq_table[index].frequency * 1000;
Shawn Guo95ceafd2012-09-06 07:09:11 +000063
Viresh Kumard4019f02013-08-14 19:38:24 +053064 freq_exact = freq_Hz;
65 new_freq = freq_Hz / 1000;
66 old_freq = clk_get_rate(cpu_clk) / 1000;
Shawn Guo95ceafd2012-09-06 07:09:11 +000067
Mark Brown4a511de2013-08-13 14:58:24 +020068 if (!IS_ERR(cpu_reg)) {
Stefan Wahren0a1e8792014-10-17 22:09:48 +000069 unsigned long opp_freq;
70
Nishanth Menon78e8eb82013-01-18 19:52:33 +000071 rcu_read_lock();
Nishanth Menon5d4879c2013-09-19 16:03:50 -050072 opp = dev_pm_opp_find_freq_ceil(cpu_dev, &freq_Hz);
Shawn Guo95ceafd2012-09-06 07:09:11 +000073 if (IS_ERR(opp)) {
Nishanth Menon78e8eb82013-01-18 19:52:33 +000074 rcu_read_unlock();
Viresh Kumarfbd48ca2014-08-28 11:22:27 +053075 dev_err(cpu_dev, "failed to find OPP for %ld\n",
76 freq_Hz);
Viresh Kumard4019f02013-08-14 19:38:24 +053077 return PTR_ERR(opp);
Shawn Guo95ceafd2012-09-06 07:09:11 +000078 }
Nishanth Menon5d4879c2013-09-19 16:03:50 -050079 volt = dev_pm_opp_get_voltage(opp);
Stefan Wahren0a1e8792014-10-17 22:09:48 +000080 opp_freq = dev_pm_opp_get_freq(opp);
Nishanth Menon78e8eb82013-01-18 19:52:33 +000081 rcu_read_unlock();
Viresh Kumard2f31f12014-08-28 11:22:28 +053082 tol = volt * priv->voltage_tolerance / 100;
Shawn Guo95ceafd2012-09-06 07:09:11 +000083 volt_old = regulator_get_voltage(cpu_reg);
Stefan Wahren0a1e8792014-10-17 22:09:48 +000084 dev_dbg(cpu_dev, "Found OPP: %ld kHz, %ld uV\n",
85 opp_freq / 1000, volt);
Shawn Guo95ceafd2012-09-06 07:09:11 +000086 }
87
Andrzej Hajda929ca892015-12-30 12:18:42 +010088 dev_dbg(cpu_dev, "%u MHz, %d mV --> %u MHz, %ld mV\n",
Stefan Wahren8197bb12014-10-17 22:09:49 +000089 old_freq / 1000, (volt_old > 0) ? volt_old / 1000 : -1,
Viresh Kumarfbd48ca2014-08-28 11:22:27 +053090 new_freq / 1000, volt ? volt / 1000 : -1);
Shawn Guo95ceafd2012-09-06 07:09:11 +000091
92 /* scaling up? scale voltage before frequency */
Viresh Kumard4019f02013-08-14 19:38:24 +053093 if (!IS_ERR(cpu_reg) && new_freq > old_freq) {
Shawn Guo95ceafd2012-09-06 07:09:11 +000094 ret = regulator_set_voltage_tol(cpu_reg, volt, tol);
95 if (ret) {
Viresh Kumarfbd48ca2014-08-28 11:22:27 +053096 dev_err(cpu_dev, "failed to scale voltage up: %d\n",
97 ret);
Viresh Kumard4019f02013-08-14 19:38:24 +053098 return ret;
Shawn Guo95ceafd2012-09-06 07:09:11 +000099 }
100 }
101
Guennadi Liakhovetski0ca68432013-02-25 18:22:37 +0100102 ret = clk_set_rate(cpu_clk, freq_exact);
Shawn Guo95ceafd2012-09-06 07:09:11 +0000103 if (ret) {
Viresh Kumarfbd48ca2014-08-28 11:22:27 +0530104 dev_err(cpu_dev, "failed to set clock rate: %d\n", ret);
Stefan Wahren8197bb12014-10-17 22:09:49 +0000105 if (!IS_ERR(cpu_reg) && volt_old > 0)
Shawn Guo95ceafd2012-09-06 07:09:11 +0000106 regulator_set_voltage_tol(cpu_reg, volt_old, tol);
Viresh Kumard4019f02013-08-14 19:38:24 +0530107 return ret;
Shawn Guo95ceafd2012-09-06 07:09:11 +0000108 }
109
110 /* scaling down? scale voltage after frequency */
Viresh Kumard4019f02013-08-14 19:38:24 +0530111 if (!IS_ERR(cpu_reg) && new_freq < old_freq) {
Shawn Guo95ceafd2012-09-06 07:09:11 +0000112 ret = regulator_set_voltage_tol(cpu_reg, volt, tol);
113 if (ret) {
Viresh Kumarfbd48ca2014-08-28 11:22:27 +0530114 dev_err(cpu_dev, "failed to scale voltage down: %d\n",
115 ret);
Viresh Kumard4019f02013-08-14 19:38:24 +0530116 clk_set_rate(cpu_clk, old_freq * 1000);
Shawn Guo95ceafd2012-09-06 07:09:11 +0000117 }
118 }
119
Viresh Kumarfd143b42013-04-01 12:57:44 +0000120 return ret;
Shawn Guo95ceafd2012-09-06 07:09:11 +0000121}
122
Viresh Kumar050794a2016-02-09 10:30:43 +0530123/*
124 * An earlier version of opp-v1 bindings used to name the regulator
125 * "cpu0-supply", we still need to handle that for backwards compatibility.
126 */
127static const char *find_supply_name(struct device *dev, struct device_node *np)
128{
129 struct property *pp;
130 int cpu = dev->id;
131
132 /* Try "cpu0" for older DTs */
133 if (!cpu) {
134 pp = of_find_property(np, "cpu0-supply", NULL);
135 if (pp)
136 return "cpu0";
137 }
138
139 pp = of_find_property(np, "cpu-supply", NULL);
140 if (pp)
141 return "cpu";
142
143 dev_dbg(dev, "no regulator for cpu%d\n", cpu);
144 return NULL;
145}
146
Viresh Kumar95b61052014-08-28 11:22:30 +0530147static int allocate_resources(int cpu, struct device **cdev,
Viresh Kumard2f31f12014-08-28 11:22:28 +0530148 struct regulator **creg, struct clk **cclk)
Shawn Guo95ceafd2012-09-06 07:09:11 +0000149{
Viresh Kumard2f31f12014-08-28 11:22:28 +0530150 struct device *cpu_dev;
151 struct regulator *cpu_reg;
152 struct clk *cpu_clk;
153 int ret = 0;
Viresh Kumar2d2c5e02014-08-28 11:22:29 +0530154 char *reg_cpu0 = "cpu0", *reg_cpu = "cpu", *reg;
Shawn Guo95ceafd2012-09-06 07:09:11 +0000155
Viresh Kumar95b61052014-08-28 11:22:30 +0530156 cpu_dev = get_cpu_device(cpu);
Sudeep KarkadaNageshae1825b22013-09-10 18:59:46 +0100157 if (!cpu_dev) {
Viresh Kumar95b61052014-08-28 11:22:30 +0530158 pr_err("failed to get cpu%d device\n", cpu);
Sudeep KarkadaNageshae1825b22013-09-10 18:59:46 +0100159 return -ENODEV;
160 }
Paolo Pisatif5c3ef22013-03-28 09:24:29 +0000161
Viresh Kumar2d2c5e02014-08-28 11:22:29 +0530162 /* Try "cpu0" for older DTs */
Viresh Kumar95b61052014-08-28 11:22:30 +0530163 if (!cpu)
164 reg = reg_cpu0;
165 else
166 reg = reg_cpu;
Viresh Kumar2d2c5e02014-08-28 11:22:29 +0530167
168try_again:
169 cpu_reg = regulator_get_optional(cpu_dev, reg);
Arnd Bergmannb331bc22016-01-25 16:45:48 +0100170 ret = PTR_ERR_OR_ZERO(cpu_reg);
171 if (ret) {
Nishanth Menonfc31d6f2013-05-01 13:38:12 +0000172 /*
Viresh Kumar95b61052014-08-28 11:22:30 +0530173 * If cpu's regulator supply node is present, but regulator is
Nishanth Menonfc31d6f2013-05-01 13:38:12 +0000174 * not yet registered, we should try defering probe.
175 */
Arnd Bergmannb331bc22016-01-25 16:45:48 +0100176 if (ret == -EPROBE_DEFER) {
Viresh Kumar95b61052014-08-28 11:22:30 +0530177 dev_dbg(cpu_dev, "cpu%d regulator not ready, retry\n",
178 cpu);
Arnd Bergmannb331bc22016-01-25 16:45:48 +0100179 return ret;
Nishanth Menonfc31d6f2013-05-01 13:38:12 +0000180 }
Viresh Kumar2d2c5e02014-08-28 11:22:29 +0530181
182 /* Try with "cpu-supply" */
183 if (reg == reg_cpu0) {
184 reg = reg_cpu;
185 goto try_again;
186 }
187
Arnd Bergmannb331bc22016-01-25 16:45:48 +0100188 dev_dbg(cpu_dev, "no regulator for cpu%d: %d\n", cpu, ret);
Nishanth Menonfc31d6f2013-05-01 13:38:12 +0000189 }
190
Lucas Stache3beb0a2014-05-16 12:20:42 +0200191 cpu_clk = clk_get(cpu_dev, NULL);
Arnd Bergmannb331bc22016-01-25 16:45:48 +0100192 ret = PTR_ERR_OR_ZERO(cpu_clk);
193 if (ret) {
Viresh Kumard2f31f12014-08-28 11:22:28 +0530194 /* put regulator */
195 if (!IS_ERR(cpu_reg))
196 regulator_put(cpu_reg);
197
Viresh Kumar48a86242014-08-28 11:22:26 +0530198 /*
199 * If cpu's clk node is present, but clock is not yet
200 * registered, we should try defering probe.
201 */
202 if (ret == -EPROBE_DEFER)
Viresh Kumar95b61052014-08-28 11:22:30 +0530203 dev_dbg(cpu_dev, "cpu%d clock not ready, retry\n", cpu);
Viresh Kumar48a86242014-08-28 11:22:26 +0530204 else
Abhilash Kesavan71796212014-10-31 18:09:33 +0530205 dev_err(cpu_dev, "failed to get cpu%d clock: %d\n", cpu,
206 ret);
Viresh Kumard2f31f12014-08-28 11:22:28 +0530207 } else {
208 *cdev = cpu_dev;
209 *creg = cpu_reg;
210 *cclk = cpu_clk;
211 }
Viresh Kumar48a86242014-08-28 11:22:26 +0530212
Viresh Kumard2f31f12014-08-28 11:22:28 +0530213 return ret;
214}
215
Viresh Kumarbbcf0712014-09-09 19:58:03 +0530216static int cpufreq_init(struct cpufreq_policy *policy)
Viresh Kumard2f31f12014-08-28 11:22:28 +0530217{
218 struct cpufreq_frequency_table *freq_table;
Viresh Kumard2f31f12014-08-28 11:22:28 +0530219 struct device_node *np;
220 struct private_data *priv;
221 struct device *cpu_dev;
222 struct regulator *cpu_reg;
223 struct clk *cpu_clk;
Bartlomiej Zolnierkiewicz953ba9f2015-09-08 18:41:03 +0200224 struct dev_pm_opp *suspend_opp;
Lucas Stach045ee452014-10-24 15:05:55 +0200225 unsigned long min_uV = ~0, max_uV = 0;
Viresh Kumard2f31f12014-08-28 11:22:28 +0530226 unsigned int transition_latency;
Viresh Kumar457e99e62016-02-09 10:30:41 +0530227 bool opp_v1 = false;
Viresh Kumar050794a2016-02-09 10:30:43 +0530228 const char *name;
Viresh Kumard2f31f12014-08-28 11:22:28 +0530229 int ret;
230
Viresh Kumar95b61052014-08-28 11:22:30 +0530231 ret = allocate_resources(policy->cpu, &cpu_dev, &cpu_reg, &cpu_clk);
Viresh Kumard2f31f12014-08-28 11:22:28 +0530232 if (ret) {
Geert Uytterhoevenedd52b12014-10-23 11:52:54 +0200233 pr_err("%s: Failed to allocate resources: %d\n", __func__, ret);
Viresh Kumard2f31f12014-08-28 11:22:28 +0530234 return ret;
235 }
236
237 np = of_node_get(cpu_dev->of_node);
238 if (!np) {
239 dev_err(cpu_dev, "failed to find cpu%d node\n", policy->cpu);
240 ret = -ENOENT;
241 goto out_put_reg_clk;
Shawn Guo95ceafd2012-09-06 07:09:11 +0000242 }
243
Viresh Kumar2e02d872015-07-29 16:23:10 +0530244 /* Get OPP-sharing information from "operating-points-v2" bindings */
Viresh Kumar8f8d37b2015-09-04 13:47:24 +0530245 ret = dev_pm_opp_of_get_sharing_cpus(cpu_dev, policy->cpus);
Viresh Kumar2e02d872015-07-29 16:23:10 +0530246 if (ret) {
247 /*
248 * operating-points-v2 not supported, fallback to old method of
249 * finding shared-OPPs for backward compatibility.
250 */
251 if (ret == -ENOENT)
Viresh Kumar457e99e62016-02-09 10:30:41 +0530252 opp_v1 = true;
Viresh Kumar2e02d872015-07-29 16:23:10 +0530253 else
254 goto out_node_put;
255 }
256
257 /*
Viresh Kumar050794a2016-02-09 10:30:43 +0530258 * OPP layer will be taking care of regulators now, but it needs to know
259 * the name of the regulator first.
260 */
261 name = find_supply_name(cpu_dev, np);
262 if (name) {
263 ret = dev_pm_opp_set_regulator(cpu_dev, name);
264 if (ret) {
265 dev_err(cpu_dev, "Failed to set regulator for cpu%d: %d\n",
266 policy->cpu, ret);
267 goto out_node_put;
268 }
269 }
270
271 /*
Viresh Kumar2e02d872015-07-29 16:23:10 +0530272 * Initialize OPP tables for all policy->cpus. They will be shared by
273 * all CPUs which have marked their CPUs shared with OPP bindings.
274 *
275 * For platforms not using operating-points-v2 bindings, we do this
276 * before updating policy->cpus. Otherwise, we will end up creating
277 * duplicate OPPs for policy->cpus.
278 *
279 * OPPs might be populated at runtime, don't check for error here
280 */
Viresh Kumar8f8d37b2015-09-04 13:47:24 +0530281 dev_pm_opp_of_cpumask_add_table(policy->cpus);
Viresh Kumar2e02d872015-07-29 16:23:10 +0530282
Viresh Kumar7d5d0c82015-09-02 14:36:48 +0530283 /*
284 * But we need OPP table to function so if it is not there let's
285 * give platform code chance to provide it for us.
286 */
287 ret = dev_pm_opp_get_opp_count(cpu_dev);
288 if (ret <= 0) {
Viresh Kumar896d6a42016-02-09 10:30:40 +0530289 dev_dbg(cpu_dev, "OPP table is not ready, deferring probe\n");
Viresh Kumar7d5d0c82015-09-02 14:36:48 +0530290 ret = -EPROBE_DEFER;
291 goto out_free_opp;
292 }
293
Viresh Kumar457e99e62016-02-09 10:30:41 +0530294 if (opp_v1) {
Viresh Kumar2e02d872015-07-29 16:23:10 +0530295 struct cpufreq_dt_platform_data *pd = cpufreq_get_driver_data();
296
297 if (!pd || !pd->independent_clocks)
298 cpumask_setall(policy->cpus);
299
300 /*
301 * OPP tables are initialized only for policy->cpu, do it for
302 * others as well.
303 */
Viresh Kumar8f8d37b2015-09-04 13:47:24 +0530304 ret = dev_pm_opp_set_sharing_cpus(cpu_dev, policy->cpus);
Viresh Kumar8bc86282015-09-02 14:36:49 +0530305 if (ret)
306 dev_err(cpu_dev, "%s: failed to mark OPPs as shared: %d\n",
307 __func__, ret);
Viresh Kumar2e02d872015-07-29 16:23:10 +0530308 }
Shawn Guo95ceafd2012-09-06 07:09:11 +0000309
Viresh Kumard2f31f12014-08-28 11:22:28 +0530310 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
311 if (!priv) {
312 ret = -ENOMEM;
Viresh Kumar2f0f6092014-11-25 16:04:21 +0530313 goto out_free_opp;
Viresh Kumard2f31f12014-08-28 11:22:28 +0530314 }
315
Viresh Kumar050794a2016-02-09 10:30:43 +0530316 priv->reg_name = name;
Viresh Kumard2f31f12014-08-28 11:22:28 +0530317 of_property_read_u32(np, "voltage-tolerance", &priv->voltage_tolerance);
Shawn Guo95ceafd2012-09-06 07:09:11 +0000318
Viresh Kumar391d9ae2016-02-09 10:30:42 +0530319 transition_latency = dev_pm_opp_get_max_clock_latency(cpu_dev);
Viresh Kumar2e02d872015-07-29 16:23:10 +0530320 if (!transition_latency)
Shawn Guo95ceafd2012-09-06 07:09:11 +0000321 transition_latency = CPUFREQ_ETERNAL;
322
Philipp Zabel43c638e2013-09-26 11:19:37 +0200323 if (!IS_ERR(cpu_reg)) {
Lucas Stach045ee452014-10-24 15:05:55 +0200324 unsigned long opp_freq = 0;
Shawn Guo95ceafd2012-09-06 07:09:11 +0000325
326 /*
Lucas Stach045ee452014-10-24 15:05:55 +0200327 * Disable any OPPs where the connected regulator isn't able to
328 * provide the specified voltage and record minimum and maximum
329 * voltage levels.
Shawn Guo95ceafd2012-09-06 07:09:11 +0000330 */
Lucas Stach045ee452014-10-24 15:05:55 +0200331 while (1) {
332 struct dev_pm_opp *opp;
333 unsigned long opp_uV, tol_uV;
334
335 rcu_read_lock();
336 opp = dev_pm_opp_find_freq_ceil(cpu_dev, &opp_freq);
337 if (IS_ERR(opp)) {
338 rcu_read_unlock();
339 break;
340 }
341 opp_uV = dev_pm_opp_get_voltage(opp);
342 rcu_read_unlock();
343
344 tol_uV = opp_uV * priv->voltage_tolerance / 100;
Viresh Kumara2022002015-09-02 14:36:50 +0530345 if (regulator_is_supported_voltage(cpu_reg,
346 opp_uV - tol_uV,
Lucas Stach045ee452014-10-24 15:05:55 +0200347 opp_uV + tol_uV)) {
348 if (opp_uV < min_uV)
349 min_uV = opp_uV;
350 if (opp_uV > max_uV)
351 max_uV = opp_uV;
352 } else {
353 dev_pm_opp_disable(cpu_dev, opp_freq);
354 }
355
356 opp_freq++;
357 }
358
Shawn Guo95ceafd2012-09-06 07:09:11 +0000359 ret = regulator_set_voltage_time(cpu_reg, min_uV, max_uV);
360 if (ret > 0)
361 transition_latency += ret * 1000;
362 }
363
Lucas Stach045ee452014-10-24 15:05:55 +0200364 ret = dev_pm_opp_init_cpufreq_table(cpu_dev, &freq_table);
365 if (ret) {
Viresh Kumar896d6a42016-02-09 10:30:40 +0530366 dev_err(cpu_dev, "failed to init cpufreq table: %d\n", ret);
Lucas Stach045ee452014-10-24 15:05:55 +0200367 goto out_free_priv;
368 }
369
Viresh Kumard2f31f12014-08-28 11:22:28 +0530370 priv->cpu_dev = cpu_dev;
371 priv->cpu_reg = cpu_reg;
372 policy->driver_data = priv;
373
374 policy->clk = cpu_clk;
Bartlomiej Zolnierkiewicz953ba9f2015-09-08 18:41:03 +0200375
376 rcu_read_lock();
377 suspend_opp = dev_pm_opp_get_suspend_opp(cpu_dev);
378 if (suspend_opp)
379 policy->suspend_freq = dev_pm_opp_get_freq(suspend_opp) / 1000;
380 rcu_read_unlock();
381
Thomas Petazzoni34e5a522014-10-19 11:30:28 +0200382 ret = cpufreq_table_validate_and_show(policy, freq_table);
383 if (ret) {
384 dev_err(cpu_dev, "%s: invalid frequency table: %d\n", __func__,
385 ret);
Viresh Kumar9a004422014-11-27 06:07:52 +0530386 goto out_free_cpufreq_table;
Thomas Petazzoni34e5a522014-10-19 11:30:28 +0200387 }
388
Viresh Kumard15fa862015-07-29 16:23:11 +0530389 /* Support turbo/boost mode */
390 if (policy_has_boost_freq(policy)) {
391 /* This gets disabled by core on driver unregister */
392 ret = cpufreq_enable_boost_support();
393 if (ret)
394 goto out_free_cpufreq_table;
Bartlomiej Zolnierkiewicz21c36d32015-08-07 13:59:16 +0200395 cpufreq_dt_attr[1] = &cpufreq_freq_attr_scaling_boost_freqs;
Viresh Kumard15fa862015-07-29 16:23:11 +0530396 }
397
Thomas Petazzoni34e5a522014-10-19 11:30:28 +0200398 policy->cpuinfo.transition_latency = transition_latency;
399
Lucas Stachf9739d22014-09-26 15:33:46 +0200400 of_node_put(np);
401
Shawn Guo95ceafd2012-09-06 07:09:11 +0000402 return 0;
403
Viresh Kumar9a004422014-11-27 06:07:52 +0530404out_free_cpufreq_table:
Nishanth Menon5d4879c2013-09-19 16:03:50 -0500405 dev_pm_opp_free_cpufreq_table(cpu_dev, &freq_table);
Lucas Stach045ee452014-10-24 15:05:55 +0200406out_free_priv:
407 kfree(priv);
Viresh Kumar2f0f6092014-11-25 16:04:21 +0530408out_free_opp:
Viresh Kumar8f8d37b2015-09-04 13:47:24 +0530409 dev_pm_opp_of_cpumask_remove_table(policy->cpus);
Viresh Kumar050794a2016-02-09 10:30:43 +0530410 if (name)
411 dev_pm_opp_put_regulator(cpu_dev);
Viresh Kumar2e02d872015-07-29 16:23:10 +0530412out_node_put:
Shawn Guo95ceafd2012-09-06 07:09:11 +0000413 of_node_put(np);
Viresh Kumard2f31f12014-08-28 11:22:28 +0530414out_put_reg_clk:
415 clk_put(cpu_clk);
416 if (!IS_ERR(cpu_reg))
417 regulator_put(cpu_reg);
418
419 return ret;
420}
421
Viresh Kumarbbcf0712014-09-09 19:58:03 +0530422static int cpufreq_exit(struct cpufreq_policy *policy)
Viresh Kumard2f31f12014-08-28 11:22:28 +0530423{
424 struct private_data *priv = policy->driver_data;
425
Markus Elfring17ad13b2015-02-03 19:21:21 +0100426 cpufreq_cooling_unregister(priv->cdev);
Viresh Kumard2f31f12014-08-28 11:22:28 +0530427 dev_pm_opp_free_cpufreq_table(priv->cpu_dev, &policy->freq_table);
Viresh Kumar8f8d37b2015-09-04 13:47:24 +0530428 dev_pm_opp_of_cpumask_remove_table(policy->related_cpus);
Viresh Kumar050794a2016-02-09 10:30:43 +0530429 if (priv->reg_name)
430 dev_pm_opp_put_regulator(priv->cpu_dev);
431
Viresh Kumard2f31f12014-08-28 11:22:28 +0530432 clk_put(policy->clk);
433 if (!IS_ERR(priv->cpu_reg))
434 regulator_put(priv->cpu_reg);
435 kfree(priv);
436
437 return 0;
438}
439
Viresh Kumar9a004422014-11-27 06:07:52 +0530440static void cpufreq_ready(struct cpufreq_policy *policy)
441{
442 struct private_data *priv = policy->driver_data;
443 struct device_node *np = of_node_get(priv->cpu_dev->of_node);
444
445 if (WARN_ON(!np))
446 return;
447
448 /*
449 * For now, just loading the cooling device;
450 * thermal DT code takes care of matching them.
451 */
452 if (of_find_property(np, "#cooling-cells", NULL)) {
Punit Agrawalf8fa8ae2015-11-17 12:06:22 +0000453 u32 power_coefficient = 0;
454
455 of_property_read_u32(np, "dynamic-power-coefficient",
456 &power_coefficient);
457
458 priv->cdev = of_cpufreq_power_cooling_register(np,
459 policy->related_cpus, power_coefficient, NULL);
Viresh Kumar9a004422014-11-27 06:07:52 +0530460 if (IS_ERR(priv->cdev)) {
461 dev_err(priv->cpu_dev,
462 "running cpufreq without cooling device: %ld\n",
463 PTR_ERR(priv->cdev));
464
465 priv->cdev = NULL;
466 }
467 }
468
469 of_node_put(np);
470}
471
Viresh Kumarbbcf0712014-09-09 19:58:03 +0530472static struct cpufreq_driver dt_cpufreq_driver = {
Viresh Kumard2f31f12014-08-28 11:22:28 +0530473 .flags = CPUFREQ_STICKY | CPUFREQ_NEED_INITIAL_FREQ_CHECK,
474 .verify = cpufreq_generic_frequency_table_verify,
Viresh Kumarbbcf0712014-09-09 19:58:03 +0530475 .target_index = set_target,
Viresh Kumard2f31f12014-08-28 11:22:28 +0530476 .get = cpufreq_generic_get,
Viresh Kumarbbcf0712014-09-09 19:58:03 +0530477 .init = cpufreq_init,
478 .exit = cpufreq_exit,
Viresh Kumar9a004422014-11-27 06:07:52 +0530479 .ready = cpufreq_ready,
Viresh Kumarbbcf0712014-09-09 19:58:03 +0530480 .name = "cpufreq-dt",
Bartlomiej Zolnierkiewicz21c36d32015-08-07 13:59:16 +0200481 .attr = cpufreq_dt_attr,
Bartlomiej Zolnierkiewicz953ba9f2015-09-08 18:41:03 +0200482 .suspend = cpufreq_generic_suspend,
Viresh Kumard2f31f12014-08-28 11:22:28 +0530483};
484
Viresh Kumarbbcf0712014-09-09 19:58:03 +0530485static int dt_cpufreq_probe(struct platform_device *pdev)
Viresh Kumard2f31f12014-08-28 11:22:28 +0530486{
487 struct device *cpu_dev;
488 struct regulator *cpu_reg;
489 struct clk *cpu_clk;
490 int ret;
491
492 /*
493 * All per-cluster (CPUs sharing clock/voltages) initialization is done
494 * from ->init(). In probe(), we just need to make sure that clk and
495 * regulators are available. Else defer probe and retry.
496 *
497 * FIXME: Is checking this only for CPU0 sufficient ?
498 */
Viresh Kumar95b61052014-08-28 11:22:30 +0530499 ret = allocate_resources(0, &cpu_dev, &cpu_reg, &cpu_clk);
Viresh Kumard2f31f12014-08-28 11:22:28 +0530500 if (ret)
501 return ret;
502
503 clk_put(cpu_clk);
504 if (!IS_ERR(cpu_reg))
505 regulator_put(cpu_reg);
506
Thomas Petazzoni34e5a522014-10-19 11:30:28 +0200507 dt_cpufreq_driver.driver_data = dev_get_platdata(&pdev->dev);
508
Viresh Kumarbbcf0712014-09-09 19:58:03 +0530509 ret = cpufreq_register_driver(&dt_cpufreq_driver);
Viresh Kumard2f31f12014-08-28 11:22:28 +0530510 if (ret)
511 dev_err(cpu_dev, "failed register driver: %d\n", ret);
512
Shawn Guo95ceafd2012-09-06 07:09:11 +0000513 return ret;
514}
Shawn Guo5553f9e2013-01-30 14:27:49 +0000515
Viresh Kumarbbcf0712014-09-09 19:58:03 +0530516static int dt_cpufreq_remove(struct platform_device *pdev)
Shawn Guo5553f9e2013-01-30 14:27:49 +0000517{
Viresh Kumarbbcf0712014-09-09 19:58:03 +0530518 cpufreq_unregister_driver(&dt_cpufreq_driver);
Shawn Guo5553f9e2013-01-30 14:27:49 +0000519 return 0;
520}
521
Viresh Kumarbbcf0712014-09-09 19:58:03 +0530522static struct platform_driver dt_cpufreq_platdrv = {
Shawn Guo5553f9e2013-01-30 14:27:49 +0000523 .driver = {
Viresh Kumarbbcf0712014-09-09 19:58:03 +0530524 .name = "cpufreq-dt",
Shawn Guo5553f9e2013-01-30 14:27:49 +0000525 },
Viresh Kumarbbcf0712014-09-09 19:58:03 +0530526 .probe = dt_cpufreq_probe,
527 .remove = dt_cpufreq_remove,
Shawn Guo5553f9e2013-01-30 14:27:49 +0000528};
Viresh Kumarbbcf0712014-09-09 19:58:03 +0530529module_platform_driver(dt_cpufreq_platdrv);
Shawn Guo95ceafd2012-09-06 07:09:11 +0000530
Felipe Balbi07949bf2015-05-08 14:57:30 -0500531MODULE_ALIAS("platform:cpufreq-dt");
Viresh Kumar748c8762014-08-28 11:22:24 +0530532MODULE_AUTHOR("Viresh Kumar <viresh.kumar@linaro.org>");
Shawn Guo95ceafd2012-09-06 07:09:11 +0000533MODULE_AUTHOR("Shawn Guo <shawn.guo@linaro.org>");
Viresh Kumarbbcf0712014-09-09 19:58:03 +0530534MODULE_DESCRIPTION("Generic cpufreq driver");
Shawn Guo95ceafd2012-09-06 07:09:11 +0000535MODULE_LICENSE("GPL");